CN203415975U - Two-way surge protection circuit - Google Patents
Two-way surge protection circuit Download PDFInfo
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- CN203415975U CN203415975U CN201320507782.9U CN201320507782U CN203415975U CN 203415975 U CN203415975 U CN 203415975U CN 201320507782 U CN201320507782 U CN 201320507782U CN 203415975 U CN203415975 U CN 203415975U
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Abstract
The utility model discloses a two-way surge protection circuit, comprising a positive electrode circuit and a negative electrode circuit which transmit current to a load. A positive protection circuit, which prevents surge impacts in the power supply direction, is connected between the positive electrode circuit and the negative electrode circuit, and a negative protection circuit, which prevents surge impacts in the load direction, is connected between the positive protection circuit and the load. The two-way surge protection circuit is additionally provided with the reverse protection circuit, which prevents the surge impacts in the load direction, on the basis of a conventional surge circuit, thereby avoiding large current of an individual load from damaging the positive protection circuit and other equipment connected with the positive protection circuit in parallel, thereby improving the stability of the circuit, and ensuring the safety of electronic equipment.
Description
Technical field
The utility model relates to electricity field, is specifically related to a kind of surging protection circuit that prevents from causing because of thunderbolt on circuit change in voltage.
Background technology
Electronic equipment is when work, usually in the moment of power connection, there is surge phenomenon, or occur in abnormal (current fluctuation producing as thunderbolt) situation that at circuit generation is much larger than peak current or the overload current of steady-state current, in its electric current short time, can produce strong pulse, it probably makes electronic equipment burning out in a flash at surge, as PN junction electric capacity punctures, resistance blows etc., therefore in general circuit, be all provided with surge protection circuit, conventional way is the protective circuit of utilizing non-linear element to design the responsive characteristic of high frequency (surge), simple and conventional is sized capacitors in parallel and series inductance, although this can play the effect that suppresses surge, but do not occurring in the time of surge, it is also in consumed power, improved the reactive loss in circuit.In addition existing surge circuit only can prevent the surge of electric current input direction, but when reality is used, surge phenomenon also can be produced by load direction, and this negative sense surge phenomenon can burn out protective circuit, and then can other load on circuit be damaged.
Utility model content
For solving the problem that the reactive loss of surge protection circuit in prior art is large and cannot two-wayly prevent surge, the utility model provides a kind of power consumption can reduce circuit and do not work time and the bidirectional protective circuit that prevents load direction surge.Concrete scheme is as follows: a kind of two-way surge protection circuit; comprise anodal circuit and the negative pole circuit of to load, carrying electric current; between anodal circuit and negative pole circuit, be connected with the forward protective circuit that prevents power supply direction surge impact; it is characterized in that, between forward protection circuit and load, be also connected with the negative sense protective circuit that prevents load direction surge impact.
For reducing the reactive loss of surge circuit: described forward protective circuit comprises field effect transistor Q1 and the triode VT1 being connected in parallel on anodal circuit, wherein the drain and gate of field effect transistor Q1 respectively with the emitter of triode VT1, base stage connects, the input of anodal circuit is connected on the line of field effect transistor Q1 drain electrode and triode VT1 emitter, and output is connected with the source electrode of field effect transistor Q1, the drain electrode of being on the scene effect pipe Q1 and source electrode two ends are connected with and fall leakage resistance R1, between the output of anodal circuit and load, be connected with the capacitor C of ground connection, after being connected with base stage, passes through by the collector electrode of triode VT1 current-limiting resistance R2 and negative pole connection, the grid of field effect transistor Q1 is connected with the collector electrode of triode VT1 after being connected with drain electrode.
For preventing the surge impact of load: described negative sense protective circuit comprises diode D1 and the field effect transistor Q2 being connected between anodal circuit and negative pole circuit; wherein the negative electrode of diode D1 is connected with the drain electrode of field effect transistor Q2 with anodal circuit jointed anode; the source electrode of field effect transistor Q2 and negative pole connection, grid and anodal connection.
Preferred version is: between the source electrode of described field effect transistor Q2 and drain electrode, be connected with parasitic diode D2.
Another preferred version is: between the grid of described field effect transistor Q2 and anodal circuit, be connected with shunt resistance R3.
Another preferred version is: between the source electrode of described field effect transistor Q2 and grid, connect buck diode D3.
Another preferred version is: between the source electrode of described field effect transistor Q2 and grid, be connected with the buffer capacitor C2 in parallel with buck diode D3.
Another preferred version is: 8, before capacitor C 2 and anodal circuit and negative pole circuit tie point, be respectively arranged with diode D4 and diode D5, wherein diode D5 is that Opposite direction connection is on negative pole circuit.
The utility model configures the reverse protection circuit that prevents load direction surge impact on conventional surge circuit again, to avoid the large electric current of indivedual loads to damage forward protection circuit and miscellaneous equipment in parallel, improve the stability of circuit, guaranteed the safety of electronic equipment.Reverse protection circuit is for suppressing to occur by load the backward current that short circuit Shi Eryan supply line sends.Negative sense protective circuit of the present utility model realizes releasing of negative sense surge current by a diode and a field effect transistor; with in prior art, by the release technology of surge current of piezo-resistance or Transient Voltage Suppressor, compare; because the conduction voltage drop of diode and field effect transistor is very low; can effectively force down the clamp voltage of negative sense surge; thereby facilitate the parts selection of breaking circuit, avoid negative sense surge to cause device failure.
Accompanying drawing explanation
Fig. 1 surge restraint circuit figure of the present utility model;
Attached number in the figure explanation: the anodal circuit of 1-, 2-negative pole circuit.
Embodiment
As shown in Figure 1; a kind of two-way surge protection circuit of the present utility model; comprise anodal circuit 1 and the negative pole circuit 2 of to load, carrying electric current; between anodal circuit 1 and negative pole circuit 2, be connected with the forward protective circuit that prevents power supply direction surge impact, between forward protection circuit and load, be also connected with the negative sense protective circuit that prevents load direction surge impact.The utility model configures the reverse protection circuit that prevents load direction surge impact on conventional surge circuit again, to avoid the large electric current of indivedual loads to damage forward protection circuit and miscellaneous equipment in parallel, improve the stability of circuit, guaranteed the safety of electronic equipment.Reverse protection circuit is for suppressing to occur by load the backward current that short circuit Shi Eryan supply line sends.
For the surge current producing in inhibition and elimination supply line, the forward protective circuit that the utility model adopts is as follows: described forward protective circuit comprises field effect transistor Q1 and the triode VT1 being connected in parallel on anodal circuit 1, wherein the drain and gate of field effect transistor Q1 respectively with the emitter of triode VT1, base stage connects, the input of anodal circuit 1 is connected on the line of field effect transistor Q1 drain electrode and triode VT1 emitter, and output is connected with the source electrode of field effect transistor Q1, the drain electrode of being on the scene effect pipe Q1 and source electrode two ends are connected with and fall leakage resistance R1, between the output of anodal circuit and load, be connected with the capacitor C with negative pole connection, after being connected with base stage, the collector electrode of triode VT1 is connected with negative pole circuit 2 by current-limiting resistance R2, the grid of field effect transistor Q1 is connected with the collector electrode of triode VT1 after being connected with drain electrode.
The course of work of forward protective circuit is as follows: when external power source is connected, because field effect transistor Q1 internal resistance and the resistance that falls leakage resistance R1 are all greater than the resistance of triode VT1, therefore the electric current of being carried by anodal circuit makes triode VT1 conducting, field effect transistor Q1 remains open, until the voltage at capacitor C 1 two ends is elevated to while being enough to turn-off triode VT1, within this time period, the resistance of current-limiting resistance R2 is less than the resistance that leakage resistance R1 falls in shunting, it provides starting current for other assembly in capacitor C 1 and circuit, when capacitor C 1 both end voltage is elevated to the pressure drop that makes triode VT1 lower than the conducting voltage of field effect transistor Q1, triode VT1 disconnects, field effect transistor Q1 conducting also provides a low-resistance transmission channel falling leakage resistance R1 two ends, for load provides a normal transmission line, when the no-voltage input of electrode line road is had no progeny in external power source pass, forward protective circuit resets with capacitor C 1 electric discharge.In the situation that there is surge, along with the electric current by field effect transistor Q1 increases, the pressure drop at field effect transistor Q1 two ends also increases because its inside exists resistance, when the voltage at field effect transistor Q1 two ends is down to the conducting voltage of triode VT1, triode VT1 conducting and field effect transistor Q1 disconnect, force load current by falling leakage resistance R1, load current is reduced.Therefore; when load is short-circuited; forward protective circuit reduces load current by falling leakage resistance R1; avoid load to burn phenomenon; after surge is eliminated; triode VT1 disconnects and field effect transistor Q1 conducting; circuit recovers normal operation; because field effect transistor Q1 internal resistance can serve as the detection resistor of short circuit load protection function; therefore short circuit threshold current can change with the characteristic of field effect transistor Q1; by selecting the resistance size of current-limiting resistance R1 and the on-resistance characteristics of field effect transistor Q1, the i.e. conducting of capable of regulating field effect transistor Q1 and disconnection threshold values.Forward protective circuit of the present utility model not only can effectively suppress surge voltage, but also has reduced the power loss of whole circuit, and the load protection function that opens circuit is provided, and effectively protection power source and data equipment are not affected by surge voltage and steady operation.
For preventing the reverse surge of load, destroy circuit; described negative sense protective circuit of the present utility model comprises diode D1 and the field effect transistor Q2 being connected between anodal circuit 1 and negative pole circuit 2; wherein the negative electrode of diode D1 is connected with the drain electrode of field effect transistor Q2 with anodal circuit 1 jointed anode; the source electrode of field effect transistor Q2 is connected with negative pole circuit 2, and grid is connected with anodal circuit 1.In the utility model, each field effect transistor all adopts N-MOS transistor npn npn; also can be according to the different field effect transistor that need to select other type; as P-MOS type, N-jFET etc.; when negative sense protective circuit works; anodal circuit normally powers to the load; the forward voltage being added between field effect transistor Q2 grid and drain electrode makes to form electromotive force between the grid of field effect transistor Q2 and source electrode, completes the charging of field effect transistor Q2.When there is negative sense surge; the reverse voltage that occurs moment in protective circuit; now; due to field effect transistor, Q2 is recharged; the electromotive force of having stored before can discharging while there is reverse surge; field effect transistor Q2 forms conducting state, and negative sense surge current is flowed into by the drain electrode of field effect transistor Q2, and is flowed out and completed releasing of negative sense surge by diode D1 by source electrode.By the connection of diode D1 and field effect transistor Q2, while making to occur negative sense surge, the forward conduction voltage drop sum that the voltage (clamp voltage) bearing on anodal circuit is the conduction voltage drop of field effect transistor Q2 and diode D1, for example, under the prerequisite of 220v input voltage, if there is the about 60v of the conduction voltage drop left and right of negative sense surge field effect transistor Q2, and the forward conduction voltage drop of diode D1 is only 0.1v, so clamp voltage can be controlled to the low-pressure state of 60.1v left and right.Thereby both for negative sense surge provides the path of releasing reliably, again can be when negative sense surge by clamper to very low, reduce the cost of surge protection circuit.
For preventing the both positive and negative polarity generation reversal connection phenomenon of input power supply, and field effect transistor is damaged, the utility model is connected with parasitic diode D2 between the source electrode of described field effect transistor Q2 and drain electrode.During initialization, field effect transistor Q2 is uncharged, if there is the situation of input both positive and negative polarity reversal connection, the parasitic diode D2 of field effect transistor Q2 will not have electric current and flow through in cut-off state, has prevented that input reverse power connection from causing damaging the electronic device in circuit compared with large reverse current inflow.
In order to prevent the grid of field effect transistor Q2 and the voltage generation thermal agitation between drain electrode, the utility model is connected with shunt resistance R3 between the grid of described field effect transistor Q2 and anodal circuit.Shunt resistance R3 regularly can share part voltage at surge or voltage instability, reduces the voltage that field effect transistor Q2 bears, and plays the effect of protection field effect transistor Q2.For reducing the voltage of field effect transistor, between the source electrode of described field effect transistor Q2 of the present utility model and grid, connect buck diode D3.The anode of buck diode D3 is connected with the source electrode of field effect transistor Q2, negative electrode is connected with the grid of field effect transistor Q2, operating voltage by the voltage clamping between the grid of field effect transistor Q2 and drain electrode to buck diode D3, so the magnitude of voltage of input access just can have larger adjustment space.For maintaining the ON time of field effect transistor Q2, between the source electrode of described field effect transistor Q2 of the present utility model and grid, be connected with the buffer capacitor C2 in parallel with buck diode D3.Buffer capacitor C2 can temporarily store the electromotive force of storing when normal operation that field effect transistor Q2 discharges; slow down the loss of electromotive force between field effect transistor Q2 grid source electrode; can maintain the conducting state of field effect transistor Q; extend the time that negative sense protective circuit is born negative sense surge, thereby fully release negative sense surge.In order to prevent that negative sense surge from entering late-class circuit, the utility model is being respectively arranged with diode D4 and diode D5 before capacitor C 2 and anodal circuit 1 and negative pole circuit 2 tie points, and wherein diode D5 is that Opposite direction connection is on negative pole circuit.Negative sense protective circuit of the present utility model realizes releasing of negative sense surge current by a diode and a field effect transistor; with in prior art, by the release technology of surge current of piezo-resistance or Transient Voltage Suppressor, compare; because the conduction voltage drop of diode and field effect transistor is very low; can effectively force down the clamp voltage of negative sense surge; thereby facilitate the parts selection of breaking circuit, avoid negative sense surge to cause device failure.
The above is only preferred embodiment of the present utility model, not the utility model is done to any pro forma restriction, although the utility model with preferred embodiment openly as above, yet not in order to limit the utility model, any technical staff who is familiar with this patent is not departing within the scope of technical solutions of the utility model, when can utilizing the technology contents of above-mentioned prompting to make a little change or being modified to the equivalent embodiment of equivalent variations, in every case be the content that does not depart from technical solutions of the utility model, any simple modification of above embodiment being done according to technical spirit of the present utility model, equivalent variations and modification, all still belong in the scope of the utility model scheme.
Claims (8)
1. a two-way surge protection circuit; comprise anodal circuit (1) and the negative pole circuit (2) of to load, carrying electric current; between anodal circuit (1) and negative pole circuit (2), be connected with the forward protective circuit that prevents power supply direction surge impact; it is characterized in that, between forward protection circuit and load, be also connected with the negative sense protective circuit that prevents load direction surge impact.
2. a kind of two-way surge protection circuit as claimed in claim 1, it is characterized in that, described forward protective circuit comprises field effect transistor Q1 and the triode VT1 being connected in parallel on anodal circuit (1), wherein the drain and gate of field effect transistor Q1 respectively with the emitter of triode VT1, base stage connects, the input of anodal circuit is connected on the line of field effect transistor Q1 drain electrode and triode VT1 emitter, and output is connected with the source electrode of field effect transistor Q1, the drain electrode of being on the scene effect pipe Q1 and source electrode two ends are connected with and fall leakage resistance R1, between the output of anodal circuit (1) and load, be connected with the capacitor C of ground connection, after being connected with base stage, the collector electrode of triode VT1 is connected with negative pole circuit (2) by current-limiting resistance R2, the grid of field effect transistor Q1 is connected with the collector electrode of triode VT1 after being connected with drain electrode.
3. a kind of two-way surge protection circuit as claimed in claim 1; it is characterized in that; described negative sense protective circuit comprises diode D1 and the field effect transistor Q2 being connected between anodal circuit (1) and negative pole circuit (2); wherein the negative electrode of diode D1 is connected with the drain electrode of field effect transistor Q2 with anodal circuit (1) jointed anode; the source electrode of field effect transistor Q2 is connected with negative pole circuit (2), and grid is connected with anodal circuit (1).
4. a kind of two-way surge protection circuit as claimed in claim 3, is characterized in that, between the source electrode of described field effect transistor Q2 and drain electrode, is connected with parasitic diode D2.
5. a kind of two-way surge protection circuit as claimed in claim 3, is characterized in that, between the grid of described field effect transistor Q2 and anodal circuit (1), is connected with shunt resistance R3.
6. a kind of two-way surge protection circuit as claimed in claim 3, is characterized in that, connects buck diode D3 between the source electrode of described field effect transistor Q2 and grid.
7. a kind of two-way surge protection circuit as claimed in claim 3, is characterized in that, is connected with the buffer capacitor C2 in parallel with buck diode D3 between the source electrode of described field effect transistor Q2 and grid.
8. a kind of two-way surge protection circuit as claimed in claim 7; it is characterized in that; before capacitor C 2 and anodal circuit (1) and negative pole circuit (2) tie point, be respectively arranged with diode D4 and diode D5, wherein diode D5 is that Opposite direction connection is on negative pole circuit (2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320507782.9U CN203415975U (en) | 2013-08-20 | 2013-08-20 | Two-way surge protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320507782.9U CN203415975U (en) | 2013-08-20 | 2013-08-20 | Two-way surge protection circuit |
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| Publication Number | Publication Date |
|---|---|
| CN203415975U true CN203415975U (en) | 2014-01-29 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320507782.9U Expired - Lifetime CN203415975U (en) | 2013-08-20 | 2013-08-20 | Two-way surge protection circuit |
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| Country | Link |
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| CN (1) | CN203415975U (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106941253A (en) * | 2017-05-15 | 2017-07-11 | 飞依诺科技(苏州)有限公司 | Surge current suppression circuit based on ultrasonic device, its control method and system |
| CN109361203A (en) * | 2018-12-26 | 2019-02-19 | 上海艾为电子技术股份有限公司 | A kind of protection circuit |
| CN109449911A (en) * | 2018-12-26 | 2019-03-08 | 上海艾为电子技术股份有限公司 | A kind of protection circuit |
| CN109449910A (en) * | 2018-12-26 | 2019-03-08 | 上海艾为电子技术股份有限公司 | A kind of protection circuit |
| CN110474309A (en) * | 2019-08-20 | 2019-11-19 | 广东浪潮大数据研究有限公司 | Inhibit the circuit of electric current of surging |
| CN111130086A (en) * | 2019-12-26 | 2020-05-08 | 兰州空间技术物理研究所 | Power supply system safety potential protection circuit |
| CN114069583A (en) * | 2021-11-30 | 2022-02-18 | 江南大学 | Electrostatic surge protection integrated circuit with bidirectional embedded MOS (Metal oxide semiconductor) tube and method |
-
2013
- 2013-08-20 CN CN201320507782.9U patent/CN203415975U/en not_active Expired - Lifetime
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106941253B (en) * | 2017-05-15 | 2019-01-01 | 飞依诺科技(苏州)有限公司 | Surge current suppression circuit, its control method and system based on ultrasonic device |
| CN106941253A (en) * | 2017-05-15 | 2017-07-11 | 飞依诺科技(苏州)有限公司 | Surge current suppression circuit based on ultrasonic device, its control method and system |
| CN109361203B (en) * | 2018-12-26 | 2023-11-21 | 上海艾为电子技术股份有限公司 | Protection circuit |
| CN109361203A (en) * | 2018-12-26 | 2019-02-19 | 上海艾为电子技术股份有限公司 | A kind of protection circuit |
| CN109449911A (en) * | 2018-12-26 | 2019-03-08 | 上海艾为电子技术股份有限公司 | A kind of protection circuit |
| CN109449910A (en) * | 2018-12-26 | 2019-03-08 | 上海艾为电子技术股份有限公司 | A kind of protection circuit |
| CN109449911B (en) * | 2018-12-26 | 2023-11-28 | 上海艾为电子技术股份有限公司 | Protection circuit |
| CN109449910B (en) * | 2018-12-26 | 2023-11-21 | 上海艾为电子技术股份有限公司 | Protection circuit |
| CN110474309A (en) * | 2019-08-20 | 2019-11-19 | 广东浪潮大数据研究有限公司 | Inhibit the circuit of electric current of surging |
| CN110474309B (en) * | 2019-08-20 | 2021-10-15 | 广东浪潮大数据研究有限公司 | Circuit for restraining surge current |
| CN111130086A (en) * | 2019-12-26 | 2020-05-08 | 兰州空间技术物理研究所 | Power supply system safety potential protection circuit |
| CN114069583B (en) * | 2021-11-30 | 2022-09-27 | 江南大学 | Static surge protection integrated circuit with bidirectional embedded MOS (Metal oxide semiconductor) tube and method |
| CN114069583A (en) * | 2021-11-30 | 2022-02-18 | 江南大学 | Electrostatic surge protection integrated circuit with bidirectional embedded MOS (Metal oxide semiconductor) tube and method |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20140129 |