CN215221777U - Battery equalization circuit - Google Patents
Battery equalization circuit Download PDFInfo
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- CN215221777U CN215221777U CN202120942142.5U CN202120942142U CN215221777U CN 215221777 U CN215221777 U CN 215221777U CN 202120942142 U CN202120942142 U CN 202120942142U CN 215221777 U CN215221777 U CN 215221777U
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- 239000003990 capacitor Substances 0.000 claims description 8
- 230000005669 field effect Effects 0.000 claims description 3
- 238000012544 monitoring process Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 3
- 238000012546 transfer Methods 0.000 abstract description 3
- 239000002699 waste material Substances 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000004146 energy storage Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
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Abstract
The application discloses a battery equalization circuit. The method comprises the following steps: the device comprises a boosting module, a voltage detection module and a processor, wherein the boosting module is used for connecting batteries in corresponding series battery packs, the voltage detection module is used for connecting the series battery packs and detecting the voltage values of the batteries, the processor is connected with the voltage detection module, and the processor is used for controlling the boosting module to balance the voltage values of the batteries according to the voltage values. Through setting up the module that steps up, with the electric charge of the battery storage that residual capacity is high, transfer to the battery that residual capacity is low after stepping up in, accomplish the electric quantity in the group battery and balance, and reduce the waste to the group battery electric quantity among the balanced process.
Description
Technical Field
The application relates to the technical field of battery equalization, in particular to a battery equalization circuit.
Background
With the development and application of electronic technology, the demand for chargeable and dischargeable battery energy storage products and systems is continuously expanding and developing, wherein the development of new energy industry is directly restricted by the good and bad consistency of battery performance, the safety performance of batteries and other factors. Although the existing battery is automatically produced in a large scale, the consistency of parameters such as the capacity and the internal resistance of a single battery is improved, after the battery is made into a battery pack, the internal resistance and the capacity of each battery cell are still inconsistent when the battery pack operates under various working conditions due to the influence of factors such as the heat dissipation design of the battery pack, the welding of the battery cells, the physical layout and the like, and the battery cell performance of the battery pack, the battery cluster and the battery stack is finally reduced due to the short plate effect. Therefore, the large-capacity energy storage product has an online balancing function, and the single batteries with low residual electricity in the battery module are supplemented or discharged to balance the electricity of the single batteries in the battery module.
In the related art, the energy which is high in the residual electric quantity of the battery monomer is consumed in a resistance heating mode, and the electric quantity stored in the battery is wasted in the balance mode.
SUMMERY OF THE UTILITY MODEL
The present application is directed to solving at least one of the problems in the prior art. Therefore, the application provides a battery equalization circuit, which can equalize the electric quantity of a battery with high electric quantity to a battery with low electric quantity, and reduce the waste of the electric quantity of the whole battery pack.
According to the battery equalizer circuit of this application embodiment, include: the device comprises a boosting module, a voltage detection module and a processor, wherein the boosting module is used for connecting batteries in corresponding series battery packs, the voltage detection module is used for connecting the series battery packs and detecting the voltage values of the batteries, the processor is connected with the voltage detection module, and the processor is used for controlling the boosting module to balance the voltage values of the batteries according to the voltage values.
According to the battery equalization circuit of the embodiment of the application, the following beneficial effects are at least achieved: through setting up the module that steps up, with the electric charge of the battery storage that residual capacity is high, transfer to the battery that residual capacity is low after stepping up in, accomplish the electric quantity in the group battery and balance, and reduce the waste to the group battery electric quantity among the balanced process.
According to some embodiments of the present application, the boost module comprises: the first boosting unit is connected with the PWM unit, and the PWM unit is used for controlling the first boosting unit to boost according to a control signal of the processor.
According to some embodiments of the present application, the first boosting unit includes: the first inductor, the first diode and the first switch tube are connected, the first switch tube is connected with the anode of the corresponding first battery, one end of the first inductor is connected with the first switch tube, the other end of the first inductor is connected with the cathode of the corresponding first battery, the cathode of the first diode is connected with the first switch tube, and the anode of the first diode is connected with the cathode of the corresponding second battery.
According to some embodiments of the present application, the first switching transistor is a P-type field effect transistor.
According to some embodiments of the present application, the boost module further comprises: and the second boosting unit is connected with the PWM unit, and the PWM unit is used for controlling the second boosting unit to boost according to the control signal of the processor.
According to some embodiments of the present application, the second boosting unit includes: the second switch tube is connected with the negative electrode of the second battery, one end of the second inductor is connected with the positive electrode of the second battery, the other end of the second inductor is connected with the second switch tube, the positive electrode of the second diode is connected with the second inductor, and the negative electrode of the second diode is connected with the positive electrode of the first battery.
According to some embodiments of the application, the second switching transistor is an N-type field effect transistor.
According to some embodiments of the application, the PWM unit comprises: the output end of the phase inverter is used for outputting PWM waves, one end of the resistor is connected with the input end of the phase inverter, the other end of the resistor is connected with the output end of the phase inverter, one end of the capacitor is connected with the input end of the phase inverter, and the other end of the capacitor is connected with the voltage detection module.
According to some embodiments of the present application, the voltage detection module comprises: a plurality of battery pack monitor chips for monitoring a voltage value of each battery in the series battery pack.
According to some embodiments of the present application, the multi-cell battery monitor chip is an LTC 6811.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The present application is further described with reference to the following figures and examples, in which:
FIG. 1 is a block diagram of a battery equalization circuit according to an embodiment of the present application;
FIG. 2 is a block diagram of a battery equalization circuit according to another embodiment of the present application;
FIG. 3 is a schematic diagram of a battery equalization circuit according to an embodiment of the present disclosure;
fig. 4 is a circuit diagram of a battery equalization circuit according to another embodiment of the present application.
Reference numerals:
the boost module 110, the voltage detection module 120, and the processor 130;
a first boosting unit 111, a second boosting unit 112, and a PWM unit 113.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In the description of the present application, the meaning of a plurality is one or more, the meaning of a plurality is two or more, and the above, below, exceeding, etc. are understood as excluding the present number, and the above, below, within, etc. are understood as including the present number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present application, unless otherwise expressly limited, terms such as set, mounted, connected and the like should be construed broadly, and those skilled in the art can reasonably determine the specific meaning of the terms in the present application by combining the detailed contents of the technical solutions.
In some embodiments, referring to fig. 1, a battery equalization circuit of the present application includes: the battery voltage balancing device comprises a boosting module 110, a voltage detection module 120 and a processor 130, wherein the boosting module 110 is used for connecting batteries in a corresponding series battery pack, the voltage detection module 120 is used for connecting the series battery pack and detecting the voltage value of the batteries, the processor 130 is connected with the voltage detection module 120, and the processor 130 is used for controlling the boosting module 110 to balance the voltage value of the batteries according to the voltage value.
Specifically, the number of the boosting modules 110 in the battery equalization circuit of the present application is the same as the number of the batteries, that is, each battery is correspondingly connected to one boosting module 110, the voltage detection module 120 is connected to each battery in the battery pack and is used for detecting a voltage value of each battery, and the processor 130 receives the voltage value sent by the voltage detection module 120 and formulates a corresponding equalization strategy according to the voltage value of each battery. Specifically, when the processor 130 detects that the voltage value of a certain battery is higher than the average voltage value of the battery pack, the processor 130 selects the boosting module 110 connected to the battery, controls the corresponding boosting module 110 to start working, and transfers the electric quantity of the battery to an adjacent battery after boosting. Because each battery is correspondingly provided with the boosting module 110, when the voltage values of a plurality of batteries are higher than the average value, the boosting modules 110 can be controlled to work simultaneously, and the overall balancing time is shortened. Through the continuous control of the processor 130, the voltage value of each battery in the battery pack can be equalized. And compare with the balanced scheme that resistance generates heat, unnecessary electric quantity in the battery can not be wasted to the scheme of this application.
In some other embodiments, the number of the batteries connected to the boost module 110 may be multiple, and the number of the boost module 110 in the equalization circuit may also be set according to actual requirements.
Some embodiments, referring to fig. 2, the boost module 110 includes: the first boosting unit 111 is connected to the PWM unit 113, and the PWM unit 113 is used for controlling the first boosting unit 111 to boost according to a control signal of the processor 130. The PWM unit 113 generates a PWM wave after receiving the control signal of the processor 130, and the first boost unit 111 extracts the electric quantity of the corresponding battery under the control of the PWM wave, boosts the electric quantity, and inputs the boosted electric quantity to other batteries, thereby completing the balance of the voltage values of the batteries.
Some embodiments, referring to fig. 3, the first boosting unit 111 includes: the first switch tube is connected with the anode of the corresponding first battery, one end of the first inductor is connected with the first switch tube, the other end of the first inductor is connected with the cathode of the corresponding first battery, the cathode of the first diode is connected with the first switch tube, and the anode of the first diode is connected with the cathode of the corresponding second battery.
Fig. 3 is a schematic diagram of an equalizing circuit in which 6 batteries B1 to B6 are connected in series, in the diagram, B1 to B3 are first batteries, and the first boosting units 111 connected to the first boosting units 111 and B1 to B3 respectively have the same structure and principle, and the boosting circuit of the battery B1 is taken as an example for explanation. When the PWM unit 113 operates under the control of the processor 130, the PWM wave sent by the PWM unit 113 may open and close the switch tube K1 periodically, when the switch tube K1 is in a closed state, the battery B1 and the inductor L1 form a loop, the battery B1 charges the inductor L1, when the switch tube K1 is in an open state, the diode D1 and the inductor L1 form a loop, and since the positive pole of the diode D1 is connected to the negative pole of the battery B4, the electric quantity stored in the inductor L1 is transferred to the adjacent batteries B2 to B4, thereby achieving the effect of equalizing the voltage value of the battery B1. In some other embodiments, the battery connected to the anode of diode D1 may be selected to allow the charge of battery B1 to be transferred to a different battery.
In some embodiments, the first switch is a P-type fet.
In some embodiments, the boost module 110 further comprises: and a second boosting unit 112, wherein the second boosting unit 112 is connected to the PWM unit 113, and the PWM unit 113 is used for controlling the second boosting unit 112 to boost according to the control signal of the processor 130. The PWM unit 113 may be a discrete circuit for generating PWM waves, or a PWM module in the processor 130 for directly sending multiple PWM waves to control the operation of the boost unit.
In some embodiments, the second boosting unit 112 includes: the second switch tube is connected with the negative electrode of the corresponding second battery, one end of the second inductor is connected with the positive electrode of the second battery, the other end of the second inductor is connected with the second switch tube, the positive electrode of the second diode is connected with the second inductor, and the negative electrode of the second diode is connected with the positive electrode of the first battery. In order to equalize the voltage of the second battery, a second voltage boosting unit 112 is correspondingly provided for equalizing the voltage value of the second battery.
Specifically, in fig. 3, the batteries B4 to B6 are the second batteries, and are respectively and correspondingly connected with the second boosting unit 112, the structure and principle of which are the same, and the second boosting unit 112 on the battery B4 is taken as an example for explanation. When the switch tube K4 is in a closed state, the battery B4 charges the inductor L4, and when the switch tube K4 is in an open state, a charging loop is formed among the inductor L4, the diode D4, the battery B1, the battery B2 and the battery B3, so that the electric quantity stored in the inductor L4 is equalized to the batteries B1 to B3, and the effect of equalizing the voltage value of the battery B4 is achieved. By arranging the first boosting unit 111 and the second boosting unit 112, the voltage value of each battery in the battery pack can be balanced, and the balancing strategy is formulated by the processor 130, so that the voltage balancing of the battery pack can be completed. And through the design of a symmetrical circuit structure, the back pressure born by each switching tube in the circuit is consistent, and the back pressure is Vbat (N/2+1) + UL, wherein Vbat is the voltage of the battery, N is the total number of the batteries connected in series, and UL is the inductive voltage. Under the condition, the back pressure born by the switching tube is minimum, the parameters of all paths of equalizing circuits are consistent, and the equalizing effect is best.
In some embodiments, the second switch is an N-type fet.
Some embodiments, referring to fig. 4, the PWM unit 113 includes: the PWM pulse width modulation circuit comprises a phase inverter, a resistor and a capacitor, wherein the output end of the phase inverter is used for outputting PWM waves, one end of the resistor is connected with the input end of the phase inverter, the other end of the resistor is connected with the output end of the phase inverter, one end of the capacitor is connected with the input end of the phase inverter, and the other end of the capacitor is connected with a voltage detection module 120. For example, the inverter U1B, the resistor R1, and the capacitor C1 constitute a PWM generator with a fixed duty ratio, and the generated PWM wave controls the first voltage boosting unit 111 to perform the voltage boosting function. The other discrete PWM units 113 have the same structure, and are not described in detail herein.
In some embodiments, the voltage detection module 120 includes: and the multi-battery pack monitor chip is used for monitoring the voltage value of each battery in the series-connected battery packs. The a 1-A3 ports of the multi-cell battery monitor chip are shown as voltage detection ports, and S1-S3 are control ports for controlling the operation of the inverter according to control signals sent from the processor 130. In some other embodiments, the processor 130 may also be directly connected to and control the PWM unit 113 to operate.
In some embodiments, the multi-cell battery monitor chip is LTC 6811. In some other embodiments, the multi-battery monitor chip may also be a battery monitor chip having an equalization output control function, such as LTC6813, AD1818, or the like. This application is based on this kind of chip, carries out the equalization function and improves, when improving balanced efficiency, the inside balanced switch pipe from taking of make full use of this kind of chip has avoided needing to increase more external switch pipe in the balanced scheme of conventional initiative, brings the problem that cost and complexity rise greatly.
In the description of the present application, reference to the description of the terms "some embodiments," "illustrative embodiments," "examples," "specific examples," or the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The embodiments of the present application have been described in detail with reference to the drawings, but the present application is not limited to the embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present application. Furthermore, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
Claims (10)
1. A battery equalization circuit, comprising:
the boosting module is used for connecting batteries in the corresponding series battery pack;
the voltage detection module is used for connecting the series battery pack and detecting the voltage value of the battery;
and the processor is connected with the voltage detection module and is used for controlling the voltage boosting module to balance the voltage value of the battery according to the voltage value.
2. The battery equalization circuit of claim 1, wherein the boost module comprises: the first boosting unit is connected with the PWM unit, and the PWM unit is used for controlling the first boosting unit to boost according to a control signal of the processor.
3. The battery equalization circuit of claim 2, wherein the first boost unit comprises: the first inductor, the first diode and the first switch tube are connected, the first switch tube is connected with the anode of the corresponding first battery, one end of the first inductor is connected with the first switch tube, the other end of the first inductor is connected with the cathode of the corresponding first battery, the cathode of the first diode is connected with the first switch tube, and the anode of the first diode is connected with the cathode of the corresponding second battery.
4. The battery equalization circuit of claim 3 wherein said first switch is a PFET.
5. The battery equalization circuit of claim 3, wherein the boost module further comprises: and the second boosting unit is connected with the PWM unit, and the PWM unit is used for controlling the second boosting unit to boost according to the control signal of the processor.
6. The battery equalization circuit of claim 5, wherein the second boost unit comprises: the second switch tube is connected with the negative electrode of the second battery, one end of the second inductor is connected with the positive electrode of the second battery, the other end of the second inductor is connected with the second switch tube, the positive electrode of the second diode is connected with the second inductor, and the negative electrode of the second diode is connected with the positive electrode of the first battery.
7. The battery equalization circuit of claim 6 wherein said second switching transistor is an N-type field effect transistor.
8. The battery equalization circuit of any of claims 2-7, wherein the PWM unit comprises: the output end of the phase inverter is used for outputting PWM waves, one end of the resistor is connected with the input end of the phase inverter, the other end of the resistor is connected with the output end of the phase inverter, one end of the capacitor is connected with the input end of the phase inverter, and the other end of the capacitor is connected with the voltage detection module.
9. The battery equalization circuit of claim 8, wherein the voltage detection module comprises: a plurality of battery pack monitor chips for monitoring a voltage value of each battery in the series battery pack.
10. The battery equalization circuit of claim 9, wherein said plurality of battery pack monitor chips are LTC 6811.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120942142.5U CN215221777U (en) | 2021-04-30 | 2021-04-30 | Battery equalization circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120942142.5U CN215221777U (en) | 2021-04-30 | 2021-04-30 | Battery equalization circuit |
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| CN215221777U true CN215221777U (en) | 2021-12-17 |
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| CN202120942142.5U Active CN215221777U (en) | 2021-04-30 | 2021-04-30 | Battery equalization circuit |
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- 2021-04-30 CN CN202120942142.5U patent/CN215221777U/en active Active
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