CN215064363U - Vertical semiconductor wafer TTV interference testing device - Google Patents

Vertical semiconductor wafer TTV interference testing device Download PDF

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Publication number
CN215064363U
CN215064363U CN202121558153.XU CN202121558153U CN215064363U CN 215064363 U CN215064363 U CN 215064363U CN 202121558153 U CN202121558153 U CN 202121558153U CN 215064363 U CN215064363 U CN 215064363U
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Prior art keywords
wafer
interference
vertical semiconductor
ttv
testing device
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CN202121558153.XU
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Chinese (zh)
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赵智亮
陈立华
赵子嘉
张志华
葛瑞红
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Chengdu Techo Photoelectricity Co ltd
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Chengdu Techo Photoelectricity Co ltd
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Abstract

The application relates to the technical field of wafer detection in the semiconductor industry, and discloses a vertical semiconductor wafer TTV interference testing device which is composed of a laser beam expanding collimation unit, an interference imaging unit, an interference measurement unit and a whole machine debugging unit. According to the method and the device, the actual working state of the wafer can be restored during measurement, so that parameters of the wafer in the actual working state can be tested, the test result is more accurate, the precision is higher, and the cost is lower.

Description

Vertical semiconductor wafer TTV interference testing device
Technical Field
The application relates to the technical field of wafer detection in the semiconductor industry, in particular to a vertical semiconductor wafer TTV interference testing device.
Background
With the rapid development of the whole semiconductor industry, the development trend of the domestic semiconductor industry in recent years is getting hotter and hotter. The development of the semiconductor industry cannot be separated from wafers, the wafers are the basis for manufacturing chips, and the data of the thickness uniformity, the curvature, the warping degree and the like of the wafers have great influence on the stress and the performance of the wafers, so that the wafer detection equipment is important precise detection and measurement equipment in the semiconductor industry.
At present, the full parameter testing device for wafer substrates adopts the following two testing methods: the first is interferometric measurement and the second is scanning measurement. In the two methods, the fastest measurement speed is interferometric measurement, but in the prior art, devices for measuring the wafer substrate by using the interferometric method are basically horizontal measurement structures, and the horizontal measurement structures cannot restore the actual photoetching working state of the wafer during measurement, so that the measurement result precision is not high, the cost is also high, and no semiconductor wafer TTV interferometric testing device with a vertical structure exists in the market at present.
Disclosure of Invention
Aiming at the problems and defects in the prior art, the invention provides the vertical semiconductor wafer TTV interference testing device, and during measurement, the state of the wafer is closer to the actual photoetching working state, so that the testing result is more accurate and the precision is higher.
In order to achieve the above object, the technical solution of the present application is as follows:
a vertical semiconductor wafer TTV interference testing device comprises a laser beam expanding collimation unit, an interference imaging unit, an interference measurement unit and a complete machine debugging unit; the laser beam expanding collimation unit comprises a light source, a first reflector, a focusing objective lens, a beam splitter prism, a second reflector and a collimating objective lens, wherein the first reflector is positioned in the output light direction of the light source; the interference imaging unit comprises an interference imaging lens and an industrial camera; the interference measurement unit comprises a TF standard mirror, and the TF standard mirror is horizontally arranged; the whole debugging unit comprises a two-dimensional adjusting mechanism, a wafer tray, a wafer workbench and a wafer to be tested, wherein the wafer to be tested is arranged on the wafer workbench; the light beam of light source output gets into on being located the wafer that awaits measuring on the wafer workstation through first speculum, focus objective, beam splitter prism, second mirror, collimating objective and TF standard mirror in proper order, the warp TF standard mirror reflection output standard light beam with the test light beam that the wafer reflection that awaits measuring formed returns along former light path beam splitter prism form and interfere the test stripe, this interference test stripe sees through beam splitter prism passes through image behind the interference imaging lens is in the central point of industry camera puts.
Further, the industrial camera is a CCD camera.
Further, the light source is a laser.
Furthermore, a positioning notch is formed in the wafer workbench and used for fixing the wafer to be tested.
Further, the surface shape of the wafer worktable is less than 60 nm.
Further, the surface shape of the TF standard mirror is less than 60 nm.
Further, the caliber of the TF standard mirror is 300 mm.
Further, the TF standard mirror 31 is a standard plane wedge mirror.
The beneficial effect of this application:
(1) the method can restore the actual working state of the wafer during measurement, reproduce the whole photoetching process,
therefore, the test result is more accurate, the precision is higher, and the cost is lower.
(2) In the application, the wafer worktable is provided with the positioning notch, so that the semiconductor wafer to be detected can be repeatedly positioned during measurement, and the consistency of the relative positions of the semiconductor wafer is ensured.
Drawings
The foregoing and following detailed description of the present application will become more apparent when read in conjunction with the following drawings, wherein:
fig. 1 is a schematic view of the overall structure of the present application.
In the figure:
1. a laser beam expanding and collimating unit; 2. an interference imaging unit; 3. an interferometric measuring unit; 4. a whole machine debugging unit; 11. a light source; 12. a first reflector; 13. a focusing objective lens; 14. a beam splitter prism; 15. a second reflector; 16. a collimating objective lens; 21. an interference imaging lens; 22. an industrial camera; 31. TF standard mirror; 41. a two-dimensional adjusting mechanism; 42. a wafer tray; 43. a wafer stage; 44. and testing the wafer.
Detailed Description
The technical solutions for achieving the objects of the present invention are further described below by using several specific examples, and it should be noted that the technical solutions claimed in the present application include, but are not limited to, the following examples.
Example 1
The embodiment discloses a vertical semiconductor wafer TTV interference testing device, which mainly comprises a laser beam expanding and collimating unit 1, an interference imaging unit 2, an interference measuring unit 3 and a whole machine debugging unit 4, and is shown in the attached figure 1 of the specification; specifically, the laser beam expanding and collimating unit 1 includes a light source 11, a first reflector 12, a focusing objective 13, a beam splitter prism 14, a second reflector 15, and a collimating objective 16, where the first reflector 12 is located in the output light direction of the light source 11; the interference imaging unit 2 comprises an interference imaging lens 21 and an industrial camera 22; the interference measurement unit 3 comprises a TF standard mirror 31, the TF standard mirror 31 is horizontally arranged, and the collimating objective 16 is positioned above the TF standard mirror 31 and is horizontally arranged; the whole debugging unit 4 is horizontally arranged below the TF standard mirror 31 and comprises a two-dimensional adjusting mechanism 41, a wafer tray 42, a wafer workbench 43 and a wafer 44 to be tested, wherein the wafer 44 to be tested is arranged on the wafer workbench 43, the wafer tray 42 is arranged on the two-dimensional adjusting mechanism 41, and the wafer workbench 43 is arranged on the upper surface of the wafer tray 42; the centers of the beam splitter prism 14, the interference imaging lens 21 and the industrial camera 22 keep a straight line, and the output end of the industrial camera 22 is connected with the PC end; an interference test cavity is formed between the front surface of the wafer 44 to be tested and the reference surface of the TF standard mirror 31.
In this embodiment, the interference imaging lens includes a concave lens and a convex lens, the concave lens is located at the forefront, and the convex lens is located between the concave lens and the industrial camera.
During measurement, the thickness of the upper surface of a semiconductor wafer is firstly tested, the wafer to be tested is placed on a wafer worktable and is placed below a TF standard mirror, a light source is started, adjusting the light path, the light beam output by the light source sequentially passes through a first reflector, a focusing objective lens, a spectroscope, a second reflector, a collimating lens and a TF standard lens to enter a wafer to be tested on a wafer worktable, the standard light beam output by the TF standard lens and a test light beam formed by the reflection of the wafer to be tested return along the original light path, an interference test stripe is formed on the beam splitter prism, the interference test fringe penetrates through the light splitting prism and is imaged at the central position of the industrial camera after passing through the interference imaging lens, the PC end analyzes the interference fringe image, phase shift calculation is carried out, the upper surface thickness of the wafer to be tested is obtained, and the calculation result is stored.
And then testing the thickness of the lower surface of the semiconductor wafer, turning the wafer to be tested on a wafer worktable, and repeating the operation step of testing the thickness of the upper surface of the semiconductor wafer to obtain the thickness of the upper surface of the wafer to be tested.
And finally, mutually detecting the measured thickness of the upper surface and the measured thickness of the lower surface of the wafer by the PC terminal to obtain the total thickness difference (TTV) of the semiconductor wafer, wherein the precision of the total thickness difference of the semiconductor wafer measured by the device is smaller than 100 nm.
When the wafer parameter is measured, the position and the direction of the wafer in the measurement mode are the same as those of the wafer in the actual working state, the state of the wafer in the measurement mode is closer to the actual photoetching state, and the whole photoetching process is repeated in the measurement process, so that the test result is more accurate, the precision is higher, and the cost is lower.
Example 2
In this embodiment, a vertical semiconductor wafer TTV interference testing apparatus is disclosed, and based on embodiment 1, the industrial camera 22 is a CCD camera.
Further, the light source 11 is a laser.
Further, a positioning notch is formed in the wafer table 43, and is used for fixing the wafer 44 to be tested. When measuring wafer parameters, after the test of upper surface thickness is accomplished, thereby need overturn the lower surface thickness of measuring the wafer to the wafer, consequently when the upset wafer, the location breach on the wafer workstation can carry out the repeated positioning to the wafer that awaits measuring, guarantees that semiconductor wafer's relative position is unanimous to guarantee the accuracy of test result.
Further, the surface profile of the wafer stage 43 is less than 60 nm.
Further, the surface shape of the TF standard mirror 31 is less than 60 nm.
Further, the caliber of the TF standard mirror 31 is 300mm, so that the device can test the parameters of a 12-inch wafer with the caliber of 300mm at one time.
Further, the TF standard mirror 31 is a standard plane wedge mirror, the front surface in the optical path advancing direction is a wedge angle surface, the wedge angle is 30', and the rear surface is a standard reference surface.
In the description of the present application, it is to be understood that the terms "center", "longitudinal", "lateral", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are used merely for convenience in describing the present application and for simplifying the description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and therefore should not be construed as limiting the scope of the present application.
In the description of the present application, it is further noted that, unless expressly stated or limited otherwise, the terms "disposed," "mounted," and "connected" are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
The foregoing is directed to embodiments of the present invention, which are not limited thereto, and any simple modifications and equivalents thereof according to the technical spirit of the present invention may be made within the scope of the present invention.

Claims (8)

1. A vertical semiconductor wafer TTV interference test device is characterized in that: the device comprises a laser beam expanding and collimating unit (1), an interference imaging unit (2), an interference measuring unit (3) and a complete machine debugging unit (4); the laser beam expanding and collimating unit (1) comprises a light source (11), a first reflector (12), a focusing objective lens (13), a beam splitter prism (14), a second reflector (15) and a collimating objective lens (16), wherein the first reflector (12) is positioned in the output light direction of the light source (11); the interference imaging unit (2) comprises an interference imaging lens (21) and an industrial camera (22); the interference measurement unit (3) comprises a TF standard mirror (31), and the TF standard mirror (31) is horizontally arranged; the whole debugging unit (4) comprises a two-dimensional adjusting mechanism (41), a wafer tray (42), a wafer workbench (43) and a wafer (44) to be tested, wherein the wafer (44) to be tested is arranged on the wafer workbench (43), the wafer tray (42) is arranged on the two-dimensional adjusting mechanism (41), and the wafer workbench (43) is arranged on the wafer tray (42); the light beam of light source (11) output gets into through first speculum (12), focus objective (13), beam splitter prism (14), second mirror (15), collimating objective (16) and TF standard mirror (31) in proper order and is located wafer (44) of awaiting measuring on wafer workstation (43), the warp TF standard mirror (31) reflection output's standard light beam with the test beam that wafer (44) of awaiting measuring reflection formed returns along former light path beam splitter prism (14) form the interference test fringe, this interference test fringe sees through beam splitter prism (14) and warp image behind interference imaging lens (21) is in the central point of industry camera (22) puts.
2. The vertical semiconductor wafer TTV interference testing device of claim 1, wherein: the industrial camera (22) is a CCD camera.
3. The vertical semiconductor wafer TTV interference testing device of claim 1, wherein: the light source (11) is a laser.
4. The vertical semiconductor wafer TTV interference testing device of claim 1, wherein: and a positioning notch is arranged on the wafer workbench (43) and used for fixing the wafer (44) to be tested.
5. The vertical semiconductor wafer TTV interference testing device of claim 1, wherein: the surface shape of the wafer workbench (43) is less than 60 nm.
6. The vertical semiconductor wafer TTV interference testing device of claim 1, wherein: the surface shape of the TF standard mirror (31) is less than 60 nm.
7. The vertical semiconductor wafer TTV interference testing device of claim 1, wherein: the caliber of the TF standard mirror (31) is 300 mm.
8. The vertical semiconductor wafer TTV interference testing device of claim 1, wherein: the TF standard mirror (31) is a standard plane wedge mirror.
CN202121558153.XU 2021-07-09 2021-07-09 Vertical semiconductor wafer TTV interference testing device Active CN215064363U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202121558153.XU CN215064363U (en) 2021-07-09 2021-07-09 Vertical semiconductor wafer TTV interference testing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202121558153.XU CN215064363U (en) 2021-07-09 2021-07-09 Vertical semiconductor wafer TTV interference testing device

Publications (1)

Publication Number Publication Date
CN215064363U true CN215064363U (en) 2021-12-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202121558153.XU Active CN215064363U (en) 2021-07-09 2021-07-09 Vertical semiconductor wafer TTV interference testing device

Country Status (1)

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CN (1) CN215064363U (en)

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