CN215006632U - Network data transmission system and router with built-in network data transmission system - Google Patents

Abstract

The utility model provides a network data transmission system and router of built-in this system, including central processing unit, exchange chip and programmable logic device, central processing unit includes PCIE interface 1, SATA interface, USB interface 2, GPIO interface, control interface, SPI interface, I2C interface, PICE interface 0, UART interface, MDI interface and USB interface 1; the central processing unit is connected with a PCIE interface of the exchange chip through a PCIE interface 1; the central processing unit is connected with the programmable logic device through a GPIO (general purpose input/output) interface; the central processing unit is connected with a control interface 0 of the programmable logic device through a control interface. Compared with the prior art, the utility model has the advantages of it is following: the core device is developed independently in China, network data transmission is safe and reliable, and the main control and forwarding integrated design can smoothly and simply expand capacity, so that the reliability of system power supply is greatly improved.

Description

Network data transmission system and router with built-in network data transmission system

Technical Field

The utility model belongs to the technical field of the network data transmission communication, concretely relates to network data transmission system and built-in router of this system.

Background

With the large-scale application of cloud services and the deep application of big data, network data transmission becomes a focus of more and more deep attention of people, and users not only need the accuracy, rapidity and stability of network transmission data, but also need the security of network transmission. The router is a core device in network transmission, and for the consideration of data transmission security, the localization of the switch is an essential link.

The utility model provides a network data transmission system and a router with the system inside, wherein the router system is designed based on an autonomous domestic hardware platform, and key devices such as a CPU (central processing unit), a network acceleration engine and the like are autonomous in domestic; the system meets the large trend of the localization of national network equipment, simultaneously adopts a main control forwarding integrated design, adopts a standard COM-E card design based on a domestic Feiteng processor, can perform smooth and simple capacity expansion, and greatly improves the reliability of system power supply by supporting 1+1 redundancy protection by a system power supply. The matched service daughter card supports the hot plug function, and replacement and maintenance of subsequent board cards in case of failure are facilitated.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a network data transmission system and built-in this system's router aims at satisfying the requirement of network data transmission safe and reliable to router network data transmission.

In order to achieve the above object, the present invention provides a network data transmission system, which comprises a central processing unit, a switching chip and a programmable logic device, wherein the central processing unit comprises a PCIE interface 1, a SATA interface, a USB interface 2, a GPIO interface, a control interface, an SPI interface, an I2C interface, a PICE interface 0, a UART interface, an MDI interface and a USB interface 1; the central processing unit is connected with a PCIE interface of the exchange chip through a PCIE interface 1; the central processing unit is connected with the programmable logic device through a GPIO (general purpose input/output) interface; the central processing unit is connected with a control interface 0 of the programmable logic device through a control interface.

Further, the exchange chip is connected with a control interface 2 of the programmable logic device through a control interface; the exchange chip is connected with an SMBUS interface 0 of the programmable logic device through an SMBUS interface; the switching chip is connected with an I2C interface 1 of the programmable logic device through an I2C interface.

Furthermore, the switching chip is connected with the SFP optical port through an SFI interface; the exchange chip is connected with the EEPROM chip and the FLASH chip 3 through the SPI interface; the switching chip is connected with the backplane connector through an SGMII interface 1.

Further, the switching chip is connected with the PHY chip through an SGMII interface 2; the PHY chip is connected with a network transformer 1 and a network transformer 2; and the network transformer 1 and the network transformer 2 are respectively connected with 2 service network ports.

Further, central processing unit passes through USB interface 1 and is connected with USB2.0 panel mouth, central processing unit passes through the MDI interface and is connected with the mode net gape of transferring, central processing unit passes through the UART interface and transfers the mode serial ports to be connected, central processing unit passes through PCIE interface 0 and is connected with the safety card, the safety card is connected with analog switch 1, central processing unit passes through the SPI interface and is connected with analog switch 1, analog switch 1 is connected with analog switch 2, analog switch 2 is connected with Flash chip 1, Flash chip 2.

Further, the programmable logic device is connected with the temperature chip through an I2C interface 0, and the programmable logic device is connected with the analog switch 1 and the analog switch 2 through a control interface 0.

Furthermore, the programmable logic device is connected with the LED indicator light, the power module, the key and the microprocessor monitoring circuit through the control interface 0.

Furthermore, the programmable logic device is connected with the double-output differential buffer through an SMBUS interface 1, and the programmable logic device is connected with the Norflash particles through a control interface 1.

Further, the programmable logic device is connected with the backplane connector through the control interface 1.

Further, the router at least comprises the network data transmission system.

Compared with the prior art, the utility model has the advantages of it is following: the core device is developed independently in China, network data transmission is safe and reliable, and the main control and forwarding integrated design can smoothly and simply expand capacity, so that the reliability of system power supply is greatly improved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic structural diagram of a network data transmission system of the present invention.

Detailed Description

The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

Referring to fig. 1, it should be noted that the drawings provided in the present embodiment are only schematic illustrations of the basic concept of the present invention, and only the components related to the present invention are shown in the drawings rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be changed at will, and the layout of the components may be more complicated.

As shown in fig. 1, the present embodiment provides a schematic structural diagram of a network data transmission system.

The system main body framework is composed of a domestic CPU chip Feiteng FT1500A and a domestic exchange chip Nanfei SF9056, and message processing and forwarding are achieved. The panel port side provides 4 gigabit Ethernet electrical interfaces and 2 gigabit Ethernet optical interfaces to the outside, and the back plate side outputs an expansion slot to the outside.

The system mainly comprises 3 large functional units, namely a service processing unit, a master control management unit and a clock power distribution unit.

A service processing unit: the 1 switching chip S9056 serves as a core of network data switching, provides 2-way SFI interfaces and 4-way SGMII interfaces for the front panel, and outputs 1 expansion slot to the rear panel. The 2-channel SFI interface of the exchange chip is used for the front panel to output 2 1G Ethernet optical interfaces; the 4-way SGMII interface of the switching chip is connected to 1 PHY (VSC 8512) chip and used for the front panel to output 4 gigabit Ethernet interfaces. And the other 4 paths of SGMII interfaces of the switching chip are used for outputting 4 extended daughter card interfaces to the outside by the back panel. The panel interface provides data access and output, the data is accessed through the panel interface, the data processing, analysis and message output path confirmation are carried out in the exchange chip through the exchange chip, the data message is sent out from the corresponding port according to the path confirmation result, if the protocol (data) message needing the participation of the CPU is the protocol (data) message, the exchange chip sends the message to the CPU according to the analysis result, and the protocol (data) message processed by the CPU can be sent to the appointed port of the router to be output according to the processing result of the CPU.

The master control management unit: an RS232 serial port and a gigabit RJ45 network port are provided for users on the panel for daily management and maintenance. The system management center which consists of a CPU and an EPLD is arranged in the board, and the power-on time sequence, the reset time sequence, the temperature closed-loop control, the lighting management and the like in the board are managed.

Clock power supply distribution unit: the system uses a clock module to generate four frequency clocks of 100MHz, 156.25MHz, 25MHz and 12MHz for the clock required by each chip, and uses a DC/DC secondary power supply module to generate four power supplies of 5.0V, 3.3V, 2.5V and 1.8V for the voltage required by each chip.

The utility model discloses network data transmission system includes central processing unit, exchange chip and programmable logic device, central processing unit includes PCIE interface 1, SATA interface, USB interface 2, GPIO interface, control interface, SPI interface, I2C interface, PICE interface 0, UART interface, MDI interface and USB interface 1; the central processing unit is connected with a PCIE interface of the exchange chip through a PCIE interface 1; the central processing unit is connected with the programmable logic device through a GPIO (general purpose input/output) interface; the central processing unit is connected with a control interface 0 of the programmable logic device through a control interface.

The exchange chip is connected with a control interface 2 of the programmable logic device through a control interface; the exchange chip is connected with an SMBUS interface 0 of the programmable logic device through an SMBUS interface; the switching chip is connected with an I2C interface 1 of the programmable logic device through an I2C interface. The switching chip is connected with the SFP optical port through the SFI interface; the exchange chip is connected with the EEPROM chip and the FLASH chip 3 through the SPI interface; the switching chip is connected with the backplane connector through an SGMII interface 1. The switching chip is connected with the PHY chip through an SGMII interface 2; the PHY chip is connected with a network transformer 1 and a network transformer 2; and the network transformer 1 and the network transformer 2 are respectively connected with 2 service network ports.

Central processing unit passes through USB interface 1 and is connected with USB2.0 panel mouth, central processing unit passes through the MDI interface and transfers the formula net gape to be connected, central processing unit passes through the UART interface and transfers the formula serial ports to be connected, central processing unit passes through PCIE interface 0 and is connected with the safety card, the safety card is connected with analog switch 1, central processing unit passes through the SPI interface and is connected with analog switch 1, analog switch 1 is connected with analog switch 2, analog switch 2 is connected with Flash chip 1, Flash chip 2.

The programmable logic device is connected with the temperature chip through an I2C interface 0, and is connected with the analog switch 1 and the analog switch 2 through a control interface 0. The programmable logic device is connected with the LED indicator light, the power supply module, the key and the microprocessor monitoring circuit through the control interface 0. The programmable logic device is connected with the double-output differential buffer through the SMBUS interface 1, and the programmable logic device is connected with the Norflash particles through the control interface 1. The programmable logic device is connected with the backplane connector through a control interface 1.

The router comprises at least one network data transmission system as described above. The router comprises the network data transmission system, and a circuit board inside the router is used as a carrier. The other hardware configuration of the router is not particularly limited. The utility model provides a relevant necessary hardware structures such as shell, antenna that the switch has general router and possesses.

The embodiments described above are only a part of the embodiments of the present invention, and not all of them. The components of embodiments of the present invention, as generally described and illustrated herein and in the figures, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiments of the present invention, all other changes or substitutions obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.

Claims (10)

1. A network data transmission system is characterized in that the system comprises a central processing unit, a switching chip and a programmable logic device, wherein the central processing unit comprises a PCIE interface 1, an SATA interface, a USB interface 2, a GPIO interface, a control interface, an SPI interface, an I2C interface, a PICE interface 0, a UART interface, an MDI interface and a USB interface 1; the central processing unit is connected with a PCIE interface of the exchange chip through a PCIE interface 1; the central processing unit is connected with the programmable logic device through a GPIO (general purpose input/output) interface; the central processing unit is connected with a control interface 0 of the programmable logic device through a control interface.

2. The network data transmission system according to claim 1, wherein the switch chip is connected to the control interface 2 of the programmable logic device through a control interface; the exchange chip is connected with an SMBUS interface 0 of the programmable logic device through an SMBUS interface; the switching chip is connected with an I2C interface 1 of the programmable logic device through an I2C interface.

3. The network data transmission system of claim 1 or 2, wherein the switch chip is connected to the SFP optical port through an SFI interface; the exchange chip is connected with the EEPROM chip and the FLASH chip 3 through the SPI interface; the switching chip is connected with the backplane connector through an SGMII interface 1.

4. The network data transmission system of claim 3, wherein the switch chip is connected to the PHY chip through SGMII interface 2; the PHY chip is connected with a network transformer 1 and a network transformer 2; and the network transformer 1 and the network transformer 2 are respectively connected with 2 service network ports.

5. The network data transmission system of claim 4, wherein the central processing unit is connected with a USB2.0 panel port through a USB interface 1, the central processing unit is connected with a tuning network port through an MDI interface, the central processing unit is connected with a tuning serial port through a UART interface, the central processing unit is connected with the safety card through a PCIE interface 0, the safety card is connected with the analog switch 1, the central processing unit is connected with the analog switch 1 through an SPI interface, the analog switch 1 is connected with the analog switch 2, and the analog switch 2 is connected with the Flash chip 1 and the Flash chip 2.

6. The network data transmission system of claim 5, wherein the programmable logic device is connected with the temperature chip through an I2C interface 0, and the programmable logic device is connected with the analog switch 1 and the analog switch 2 through a control interface 0.

7. The network data transmission system of claim 6, wherein the programmable logic device is connected to the LED indicator light, the power module, the key and the microprocessor monitoring circuit through a control interface 0.

8. The network data transmission system of claim 7, wherein the programmable logic device is connected to the dual output differential buffer through an SMBUS interface 1, and the programmable logic device is connected to the Norflash granule through a control interface 1.

9. The network data transmission system of claim 7, wherein the programmable logic device is connected to the backplane connector via control interface 1.

10. A router, characterized in that it comprises at least a network data transmission system according to any one of claims 1 to 9.

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