CN215005602U - Front-end sampling circuit system in mixed signal test circuit - Google Patents
Front-end sampling circuit system in mixed signal test circuit Download PDFInfo
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- CN215005602U CN215005602U CN202122658145.9U CN202122658145U CN215005602U CN 215005602 U CN215005602 U CN 215005602U CN 202122658145 U CN202122658145 U CN 202122658145U CN 215005602 U CN215005602 U CN 215005602U
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Abstract
The utility model relates to a front end sampling circuit system among mixed signal test circuit belongs to circuit detection technical field. The utility model discloses a digital-to-analog converter, adder module, enlarged module and analog-to-digital converter, adder module include first operational amplifier, first resistance, second resistance, third resistance and fourth resistance, and enlarged module includes second operational amplifier, fifth resistance and sixth resistance. The utility model effectively eliminates the influence of the blocking capacitor in the mixed signal test circuit on different frequency signals; the combination of the digital-analog converter and the operational amplifier circuit realizes the flexible processing of the common-mode voltage attenuation amplitude; the measuring range of the high-precision analog-digital converter is effectively utilized, so that the signal measuring precision is effectively improved.
Description
Technical Field
The utility model relates to a front end sampling circuit system among mixed signal test circuit belongs to circuit detection technical field.
Background
In the prior art, when an alternating current component of a signal to be measured with a common-mode voltage is measured, a capacitor is usually connected in series in a signal path to achieve a blocking effect. Because the capacitor device has capacitive reactance characteristic, a high-pass filtering structure is formed in the circuit, when the frequency of the measured signal is different, the influence of the capacitance on the signal is different, the amplitude of the signal is influenced, and the measurement and calibration are difficult.
In the prior art, the common-mode voltage value processed by the method of removing the common-mode voltage through the operational amplifier addition and subtraction structure is generally fixed. For signals with different amplitudes, a plurality of common-mode voltage processing units may be required to implement common-mode processing of different gears, and the effect of adjusting the common-mode voltage is not ideal and the flexibility is poor.
SUMMERY OF THE UTILITY MODEL
The utility model discloses to prior art's not enough, provide one kind and can effectively eliminate the influence of blocking electric capacity to different frequency signal among the mixed signal test circuit.
In order to achieve the purpose, the method adopts a digital-analog converter to generate a voltage with an amplitude opposite to that of a common-mode voltage, then adds the two voltages through an adder module consisting of operational amplifiers, inputs the added voltage into a rear-stage precise multiplying power amplifying circuit, amplifies a signal and transmits the amplified signal to an analog-digital converter, and the amplified signal is acquired and converted into a digital voltage value through the analog-digital converter, so that the effect of eliminating a direct current component in the signal is achieved. The invention specifically relates to a front-end sampling circuit system in a mixed signal test circuit, which comprises a digital-analog converter, an adder module, an amplification module and an analog-digital converter, wherein the adder module comprises a first operational amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor, the non-inverting input end of the first operational amplifier is respectively connected with an input signal source and the digital-analog converter, the inverting input end of the first operational amplifier is respectively grounded and connected with the output end of the first operational amplifier, and the output end of the first operational amplifier is connected with the amplification module; the amplifying module comprises a second operational amplifier, a fifth resistor and a sixth resistor, wherein the non-inverting input end of the second operational amplifier is connected with the output end of the first operational amplifier, the inverting input end of the second operational amplifier is respectively grounded and connected with the output end of the second operational amplifier, and the output end of the second operational amplifier is connected with the analog-digital converter.
The further improvement of the technical scheme is as follows: a third resistor is arranged between the non-inverting input end of the first operational amplifier and the input signal source, and a fourth resistor is arranged between the non-inverting input end of the first operational amplifier and the digital-to-analog converter; the inverting input end of the first operational amplifier is grounded through a first resistor, and the inverting input end of the first operational amplifier is connected with the output end of the first operational amplifier through a second resistor.
The further improvement of the technical scheme is as follows: and the inverting input end of the second operational amplifier is grounded through a fifth resistor, and is connected with the analog-digital converter through a sixth resistor.
The utility model discloses the beneficial effect who brings is: the utility model effectively eliminates the influence of the blocking capacitor in the mixed signal test circuit on different frequency signals; the combination of the digital-analog converter and the operational amplifier circuit realizes the flexible processing of the common-mode voltage attenuation amplitude; the measuring range of the high-precision analog-digital converter is effectively utilized, so that the signal measuring precision is effectively improved.
Drawings
The present invention will be further described with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a system according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments with reference to the accompanying drawings will make further detailed descriptions of the embodiments of the present invention, such as the mutual positions and connection relationships between the related parts, the functions and working principles of the related parts, the operation and use methods, etc., to help those skilled in the art to understand the concept and technical solutions of the present invention more completely, accurately and deeply.
Examples
As shown in fig. 1, a front-end sampling circuit system in a mixed signal test circuit includes a digital-to-analog converter, an adder module, an amplifying module, and an analog-to-digital converter.
The adder module comprises a first operational amplifier Oh1, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4, wherein the non-inverting input end of the first operational amplifier Oh1 is respectively connected with an input signal source and a digital-to-analog converter, the inverting input end of the first operational amplifier Oh1 is respectively grounded and connected with the output end of the first operational amplifier Oh1, and the output end of the first operational amplifier Oh1 is connected with the amplification module; a third resistor R3 is arranged between the non-inverting input end of the first operational amplifier Oh1 and the input signal source, and a fourth resistor R4 is arranged between the non-inverting input end of the first operational amplifier Oh1 and the digital-to-analog converter; the inverting input terminal of the first operational amplifier Oh1 is grounded via a first resistor R1, and the inverting input terminal of the first operational amplifier Oh1 is connected to the output terminal of the first operational amplifier Oh1 via a second resistor R2.
The amplifying module comprises a second operational amplifier Oh2, a fifth resistor R5 and a sixth resistor R6, wherein the non-inverting input end of the second operational amplifier Oh2 is connected with the output end of the first operational amplifier Oh1, the inverting input end of the second operational amplifier Oh2 is respectively grounded and connected with the output end of the second operational amplifier Oh2, and the output end of the second operational amplifier Oh2 is connected with an analog-digital converter. The inverting input terminal of the second operational amplifier Oh2 is connected to the ground through a fifth resistor R5, and the inverting input terminal of the second operational amplifier Oh2 is connected to the analog-digital converter through a sixth resistor R6.
The input signal of the input signal source and the reverse common mode voltage generated by the digital analog converter are added through the adder module, then amplified to be close to the full range of the analog digital converter through the amplification module, and finally the analog digital converter collects and converts the signals.
The treatment method of the utility model comprises the following steps:
the method comprises the following steps: after the input signal source generates an input signal and inputs the input signal into the system, the digital-to-analog converter generates a common-mode voltage.
Step two: the adder module adds the two voltages.
Step three: the amplification module amplifies the input signal according to a certain amplification factor.
Step four: the analog-digital converter collects the input signals after conversion and amplification.
Step five: and judging whether the maximum value and the minimum value of the acquired input signal exceed the range of the analog-digital converter or not.
If the input signal exceeds the range of the analog-digital converter, returning to the step one, and outputting a small negative voltage from zero by using the digital-analog converter to eliminate a part of common mode signals;
if the input signal is lower than the range of the analog-digital converter, the output level is increased by the digital-analog converter.
Until the signal voltage collected by the digital-to-analog converter does not exceed the range of the digital-to-analog converter.
Step six: the common mode voltage processing is ended.
The utility model discloses not being limited to above-mentioned embodiment, all adopt the technical scheme who equates the replacement and form, all fall in the utility model discloses the scope of protection that requires.
Claims (3)
1. A front end sampling circuitry in a mixed signal test circuit, comprising: the system comprises a digital-to-analog converter, an adder module, an amplification module and an analog-to-digital converter, wherein the adder module comprises a first operational amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor, the non-inverting input end of the first operational amplifier is respectively connected with an input signal source and the digital-to-analog converter, the inverting input end of the first operational amplifier is respectively grounded and connected with the output end of the first operational amplifier, and the output end of the first operational amplifier is connected with the amplification module; the amplifying module comprises a second operational amplifier, a fifth resistor and a sixth resistor, wherein the non-inverting input end of the second operational amplifier is connected with the output end of the first operational amplifier, the inverting input end of the second operational amplifier is respectively grounded and connected with the output end of the second operational amplifier, and the output end of the second operational amplifier is connected with the analog-digital converter.
2. Front-end sampling circuitry in a mixed signal test circuit according to claim 1, characterized by: a third resistor is arranged between the non-inverting input end of the first operational amplifier and the input signal source, and a fourth resistor is arranged between the non-inverting input end of the first operational amplifier and the digital-to-analog converter; the inverting input end of the first operational amplifier is grounded through a first resistor, and the inverting input end of the first operational amplifier is connected with the output end of the first operational amplifier through a second resistor.
3. Front-end sampling circuitry in a mixed signal test circuit according to claim 1, characterized by: and the inverting input end of the second operational amplifier is grounded through a fifth resistor, and is connected with the analog-digital converter through a sixth resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122658145.9U CN215005602U (en) | 2021-11-02 | 2021-11-02 | Front-end sampling circuit system in mixed signal test circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122658145.9U CN215005602U (en) | 2021-11-02 | 2021-11-02 | Front-end sampling circuit system in mixed signal test circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114839501A (en) * | 2022-07-04 | 2022-08-02 | 南京宏泰半导体科技有限公司 | Efficient test system and method for turn-off voltage of junction field effect transistor |
-
2021
- 2021-11-02 CN CN202122658145.9U patent/CN215005602U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114839501A (en) * | 2022-07-04 | 2022-08-02 | 南京宏泰半导体科技有限公司 | Efficient test system and method for turn-off voltage of junction field effect transistor |
| CN114839501B (en) * | 2022-07-04 | 2023-08-18 | 南京宏泰半导体科技股份有限公司 | High-efficiency test system and method for turn-off voltage of junction field effect transistor |
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Address after: 210000 floor 2, building 26, South Park, Jiangsu Kecheng science and Technology Industrial Park, No. 19, Lanhua Road, Pukou District, Nanjing, Jiangsu Province Patentee after: Nanjing Hongtai Semiconductor Technology Co.,Ltd. Address before: 211806 floor 2, building 26, South Park, Jiangsu Kecheng science and Technology Industrial Park, No. 19, Lanhua Road, Pukou District, Nanjing, Jiangsu Province Patentee before: Nanjing Hongtai Semiconductor Technology Co.,Ltd. |