CN214812810U

CN214812810U - Chip screening device

Info

Publication number: CN214812810U
Application number: CN202120937128.6U
Authority: CN
Inventors: 叶操; 杨思明; 袁媛; 冯永生; 曹桢; 夏超; 祖安; 唐彦夫; 陈丛笑
Original assignee: Beijing Navistar Cloud Technology Co ltd
Current assignee: Beijing Navistar Cloud Technology Co ltd
Priority date: 2021-04-30
Filing date: 2021-04-30
Publication date: 2021-11-23
Anticipated expiration: 2031-04-30

Abstract

The utility model discloses a chip screening device, the chip screening device who discloses includes core module, the interface board passes through the cable with single or a plurality of core module and links to each other, link to each other with outside PC external equipment through the cable simultaneously, wherein core module contains nuclear core plate and core module box body, nuclear core plate includes chip test socket and cable connector, the interface board includes the button, the pilot lamp, cable connector and external interface, the external interface of interface board includes the power, the serial ports, USB, PCIE etc. Aiming at the scenes with the requirements on environmental indexes, the cost of the screening device is reduced through the split design of the core modules and the interface board, and meanwhile, the testing efficiency is improved through testing a plurality of core modules simultaneously.

Description

Chip screening device

Technical Field

The utility model relates to chip detects technical field, especially relates to a chip screening device.

Background

In addition to the requirements on the functions and performance indexes of the chip, military-grade products also have requirements on the environmental indexes of the chip due to special application scenes, so that the domestic chip meeting the requirements is preferred in chip selection. However, in practical designs, we may find that some chips are not or are not mature at home, only imported chips can be selected, and the chips are still of commercial grade. When the imported commercial grade chip is applied to products meeting military grade requirements, strict screening must be carried out, and only products meeting all index requirements are tested to pass. The existing scheme mainly aims at screening chip function and performance indexes, and relates to the technical field that environmental indexes are screened through a whole product, and if the defects of the whole product are removed due to the defects of the chip, the product cost is greatly improved.

Therefore, how to test and verify the functions, the performance and the environment of the commercial chips before the chips enter the whole machine and eliminate the chips which do not meet the standard so as to reduce the screening cost becomes a problem to be solved urgently by the technical personnel in the field.

Disclosure of Invention

Based on above-mentioned technical difficult problem, the utility model provides a chip sieving mechanism contains core module, interface board, wherein:

the core module comprises a core module box body and a core board, the core board comprises a chip test socket and a first cable connecting module, and the chip test socket is connected with the first cable connecting module through an onboard high-speed data channel;

the interface board comprises a button/indicator light, an external interface module and a second cable connecting module, the second cable connecting module is connected with the external interface module through an onboard high-speed data channel, and the button/indicator light is respectively connected with the second cable connecting module and the external interface module;

the interface board is connected with the first cable connecting modules of the core board or the core boards through the second cable connecting modules through cables;

and the second cable connecting module is connected with an external PC/external equipment through a cable.

Preferably, the core board is fixed in the core module case.

Preferably, the core module box body comprises a cable connector interface hole, a heat dissipation hole and a chip heat sink, wherein the chip heat sink is fixed on the core module box body and is positioned at the top of the chip test socket, the heat dissipation hole is positioned at the top of the core module box body, and the cable connector interface hole is positioned on the side surface of the core module box body.

Preferably, the core board is designed by adopting components and circuits meeting the requirements of military product environmental indexes.

Preferably, the external interface module includes a serial port, a USB interface, a PCIE interface, a UART interface, and a power interface.

Preferably, the interface board is a commercial grade component.

Preferably, the second cable connection module comprises a single or multiple cable connectors.

Preferably, the button/indicator light comprises a core board communication indicator light, a PC/device communication indicator light, a power indicator light, and a power button.

The utility model has the advantages that: through the device, realize screening the function and the performance index of commercial chip, simultaneously through carrying out split type design with core module and interface board, can carry out the screening of environmental index before commercial chip gets into the complete machine, greatly reduced the screening cost of military grade product, test when passing through many core modules simultaneously, improved the environmental test efficiency of chip.

Drawings

FIG. 1 is a block diagram schematically illustrating the structure of a chip screening apparatus provided by the present invention;

fig. 2 is the utility model provides a chip screening device environmental test schematic block diagram.

Detailed Description

In order to make the technical solution of the present invention better understood by those skilled in the art, the present invention will be further described in detail with reference to the accompanying drawings.

Referring to fig. 1, fig. 1 is a block diagram schematically illustrating a structure of a chip screening apparatus according to the present invention. The utility model provides a pair of chip sieving mechanism contains core module 100, interface board 300, wherein:

the core module 100 comprises a core module box body 102 and a core board 200, wherein the core board 200 comprises a chip test socket 201 and a first cable connection module 202, and the chip test socket 200 is connected with the first cable connection module 202 through an on-board high-speed data channel;

the interface board 300 comprises a button/indicator light 303, an external interface module 302 and a second cable connection module 301, the second cable connection module 301 is connected with the external interface module 302 through an onboard high-speed data channel, and the button/indicator light 303 is respectively connected with the second cable connection module 301 and the external interface module 302;

the interface board 300 is connected to the first cable connection modules 202 of the core board or core boards 200 via cables through the second cable connection modules 301;

the second cable connection module 301 is connected to an external PC/external device through a cable.

Further, the core board 200 is fixed in the core module case 102.

Further, the core module case 102 includes cable connector interface holes, heat dissipation holes, and a chip heat sink 101, wherein the chip heat sink 101 is fixed on the core module case 102 and located at the top of the chip test socket 201, the heat dissipation holes are located at the top of the core module case 102, and the first cable connection module interface holes are located at the side of the core module case 102.

Further, core board 200 adopts the components and parts and the circuit design that accord with military products environmental index requirement, can guarantee to work under the repeated environmental condition changes, can support repeated chip high and low temperature environment test.

Further, the external interface module 302 includes a serial port, a USB interface, a PCIE interface, a UART interface, and a power interface.

Further, the interface board 300 employs commercial-grade components.

Further, the cable connection module 301 includes a single or multiple cable connectors.

Further, the buttons/indicators 303 include a core board communication indicator, a PC/device communication indicator, and a power indicator.

Adopt to being surveyed the chip the utility model provides a chip screening device carries out function and performance screening under the normal atmospheric temperature: inserting a chip to be tested into the chip test socket 201, connecting a single or a plurality of core modules 100 with the interface board 300 through cables, and connecting the external interface module 302 of the interface board 300 to a PC/external equipment through a standard interface cable; supplying power to the chip screening device and the PC/external equipment; and performing function and performance tests on the chip placed in the chip screening device through the PC/external equipment, reading a test result, and if the function and performance tests reach test indexes, executing high and low temperature environment screening, otherwise, screening the tested chip to be unqualified.

Adopt chip through normal atmospheric temperature function and capability test the utility model provides a chip screening device carries out the screening of high low temperature environment: referring to fig. 2, a chip to be tested is inserted into a chip test socket 201, a single or multiple core modules 100 are connected through a cable, the single or multiple core modules 100 are placed in a high and low temperature test box, the cable connected with the single or multiple core modules 100 passes through a window of the high and low temperature test box to the outside, the cable is connected with an interface board 300, and an external interface module 302 of the interface board 300 is connected with a PC/external device through a standard interface cable; supplying power to the chip screening device and the PC/external equipment; setting the test temperature (60 ℃ high/40 ℃ low) and the test time (24 hours) of the high and low temperature test box; after the temperature of the high-low temperature test box reaches a preset value, the PC/external equipment performs function and performance tests on the chip placed in the chip screening device, and reads a test result, if the function and performance indexes of the tested chip are normal in the process of testing the time length (24 hours) of the high-low temperature test box, and simultaneously after the testing time length (24 hours) is finished, the function and performance indexes are normal, the tested chip is qualified under the conditions of the testing temperature (60 ℃ C./low-temperature-40 ℃ C.) and the testing time length (24 hours), and if the function and performance indexes of the tested chip are abnormal after the testing time length (24 hours) of the high-low temperature test box or the testing time length (24 hours) is finished, the chip is unqualified under the environments of the testing temperature (60 ℃ C./low-temperature-40 ℃ C.) and the testing time length (24 hours); setting different environment test temperatures and durations required by screening the chip, and executing tests in different setting scenes; if the function and performance indexes of the tested chip are qualified in all test scenes, the tested chip meets the requirements, and if any test item is unqualified, the tested chip is unqualified.

The utility model provides a chip screening device can carry out the detection of function, performance and environmental index to the import commercial level chip that powerful, interface are complicated. Through the split design of the core modules 100 and the interface board 300, the screening cost is reduced, and the efficiency of chip environment detection is improved by simultaneously carrying out high-temperature and low-temperature environment detection on a plurality of core modules 100.

It is right above the utility model provides a chip sieving mechanism introduces in detail. The principles and embodiments of the present invention have been explained herein using specific examples, and the above descriptions of the embodiments are only used to help understand the core concepts of the present invention. It should be noted that, for those skilled in the art, without departing from the principle of the present invention, the present invention can be further modified and modified, and such modifications and modifications also fall within the protection scope of the appended claims.

Claims

1. The utility model provides a chip sieving mechanism which characterized in that, includes core module, interface board, wherein:

the interface board is connected with the first cable connecting modules of the single or multiple core modules through second cable connecting modules through cables;

2. The apparatus of claim 1, wherein the core plate is secured to the core module housing.

3. The device of claim 2, wherein the core module case includes cable connector interface holes, heat dissipation holes, and a chip heat sink, wherein the chip heat sink is fixed on the core module case and located at the top of the chip test socket, the heat dissipation holes are located at the top of the core module case, and the cable connector interface holes are located at the side of the core module case.

4. The chip screening apparatus of claim 1, wherein the core board is designed with components and circuits that meet environmental standards of military products.

5. The chip screening apparatus according to claim 1, wherein the external interface module includes a serial port, a USB interface, a PCIE interface, a UART interface, and a power interface.

6. The apparatus of claim 5, wherein the interface board is a commercial-grade device.

7. The apparatus of claim 6, wherein the second cable connection module comprises one or more cable connectors.

8. The apparatus of claim 7, wherein the button/indicator lights comprise a core board communication indicator light, a PC/device communication indicator light, a power indicator light, and a power button.