CN214799427U - Ultra-wideband distributed power amplifier - Google Patents
Ultra-wideband distributed power amplifier Download PDFInfo
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- CN214799427U CN214799427U CN202120893308.9U CN202120893308U CN214799427U CN 214799427 U CN214799427 U CN 214799427U CN 202120893308 U CN202120893308 U CN 202120893308U CN 214799427 U CN214799427 U CN 214799427U
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Abstract
The utility model discloses an ultra wide band distributed power amplifier, which comprises an input port, an output port and a plurality of power amplification units which are sequentially cascaded and are positioned between the input port and the output port; each stage of the power amplification unit comprises a microstrip transmission line Mline and a cascode transistor module; each cascode transistor module comprises a plurality of PHEMT transistors; from the input port to the output port, the sizes of the PHEMT tubes in the cascode transistor modules of the power amplification units of each stage are gradually decreased. The utility model discloses a PHEMT pipe's among the power amplification unit at different levels size degressive structure step by step for demand on bandwidth and the output has been satisfied simultaneously to ultra wide band distributing type power amplifier, and the chip consumption is little, and reliable performance is high.
Description
Technical Field
The utility model relates to an integrated circuit technical field, in particular to power amplifier.
Background
A wideband power amplifier is an indispensable part of a transmitter system in which an output port of a transmitter is a power amplifier. The power amplifier amplifies the small signal from the mixer to reach the signal strength suitable for long-distance transmission of the antenna, and the transmission of the signal is completed. If the output power of the power amplifier is not enough, the signal is excessively attenuated on an output path, a signal link is interrupted, and the use of a user is influenced critically. Meanwhile, with the development of the technology, the working frequency band of the transmitter system is becoming wider, and the application and implementation of the ultra-wideband power amplifier become more and more important.
The structure of a broadband power amplifier based on GaAs PHEMT technology in the prior art is generally shown in fig. 1, and includes N PHEMT tubes which are sequentially cascaded: PHEMT1, PHEMT2 to PHEMTN, and microstrip transmission lines Mline1, Mline2 to MlineN. According to the bandwidth and performance requirements, the design selects corresponding stages, tube sizes and peripheral microstrip line sizes, wherein the PHEMT1 to PHEMTN generally adopt PHEMT tubes with the same size. However, common distributed amplifiers are not easily able to coexist between high power and bandwidth. Generally, if a high bandwidth is required, a slightly smaller PHEMT tube size will be used, but this in turn limits the output power of the amplifier. This problem is urgently to be solved.
Disclosure of Invention
The purpose of the invention is as follows: in order to solve the deficiencies in the prior art, the utility model provides an ultra wide band distributed power amplifier.
The technical scheme is as follows: in order to solve the above technical problem, the utility model provides an ultra wide band distributed power amplifier, which comprises an input port, an output port, and a plurality of power amplification units which are arranged between the input port and the output port and are sequentially cascaded;
each stage of the power amplification unit comprises a microstrip transmission line Mline and a cascode transistor module; each cascode transistor module comprises a plurality of PHEMT transistors;
from the input port to the output port, the sizes of the PHEMT tubes in the cascode transistor modules of the power amplification units of each stage are gradually decreased.
Preferably, the PHEMT transistors in the cascode transistor modules of the same-stage power amplification units are the same in size.
As another preferred mode, the PHEMT transistors in the cascode transistor modules of the same-stage power amplification units are similar in size.
Further preferably, the cascode transistor module of each stage of the power amplification unit includes M PHEMT transistors, where M is greater than or equal to 2, where: the source electrode of the first PHEMT tube is grounded; the grid electrode of the first PHEMT tube is connected with the input port; the source electrode of the ith PHEMT tube is connected with the drain electrode of the (i-1) th PHEMT tube, and i is more than or equal to 2 and less than or equal to M; and the drain electrode of the Mth PHEMT tube is connected with one end of the microstrip transmission line Mline in the power amplification unit.
Preferably, in the two adjacent stages of power amplification units, the other end of the microstrip transmission line Mline in the previous stage of power amplification unit is connected with one end of the microstrip transmission line Mline in the next stage of power amplification unit; the other end of the microstrip transmission line Mline in the last stage of power amplification unit is connected with an output port.
Preferably, the device further comprises a capacitor C0; one end of the capacitor C0 is grounded, and the other end is connected to the input port.
The utility model also provides an ultra wide band distributed power amplifier, which comprises an input port, an output port and a plurality of power amplification units which are sequentially cascaded and are positioned between the input port and the output port;
each stage of power amplification unit comprises a microstrip transmission line Mline and a PHEMT tube;
from the input port to the output port, the sizes of the PHEMT tubes in the power amplification units of all stages are gradually reduced.
Preferably, the source of the PHEMT in each stage of power amplification unit is grounded, the gate is connected to the input port, and the drain is connected to one end of the microstrip transmission line Mline in the stage of power amplification unit.
Preferably, in the two adjacent stages of power amplification units, the other end of the microstrip transmission line Mline in the previous stage of power amplification unit is connected with one end of the microstrip transmission line Mline in the next stage of power amplification unit; the other end of the microstrip transmission line Mline in the last stage of power amplification unit is connected with an output port.
Preferably, the device further comprises a capacitor C0; one end of the capacitor C0 is grounded, and the other end is connected to the input port.
Has the advantages that: compared with the prior art, the utility model provides an ultra wide band distributed power amplifier, the size through the PHEMT pipe in the power amplification unit at different levels degressive structural configuration step by step for ultra wide band distributed power amplifier has satisfied the demand on bandwidth and output simultaneously.
Further, the utility model discloses in adopted the cascode transistor module including a plurality of PHEMT pipes in power amplification unit at different levels, when having improved distributed amplifier's gain, further promoted output.
And simultaneously, the utility model provides an ultra wide band distributing type power amplifier can integrate in the radio frequency front end transmitting system based on GaAs PHEMT technology, forms the monolithic transmitting system, can reduce the system volume greatly, and the chip consumption is little, is suitable for long-term use and reliable performance height.
Drawings
FIG. 1 is a schematic block diagram of a circuit structure of a broadband power amplifier based on GaAs PHEMT process in the prior art;
fig. 2 is a schematic block diagram of a circuit structure of an ultra-wideband distributed power amplifier provided by an embodiment;
fig. 3 is a schematic diagram of a test result of a small signal characteristic of an ultra-wideband distributed power amplifier provided by an embodiment;
FIG. 4 is a diagram illustrating the test results of an ultra-wideband distributed power amplifier with output power (Psat) of 0.1-1GHz according to an embodiment;
fig. 5 is a schematic diagram of the output power (Psat) test result of one of the ultra-wideband distributed power amplifiers at 1-22GHz according to the embodiment.
Detailed Description
The present invention will be described in further detail with reference to the following examples and drawings, but the present invention is not limited to the following examples.
As shown in fig. 2, the ultra-wideband distributed power amplifier provided in this embodiment includes an input port, an output port, and a plurality of power amplification units, which are sequentially cascaded between the input port and the output port;
each stage of the power amplification unit comprises a microstrip transmission line Mline and a cascode transistor module; each cascode transistor module comprises a plurality of PHEMT transistors;
from the input port to the output port, the sizes of the PHEMT tubes in the cascode transistor modules of the power amplification units of each stage are gradually decreased. Namely: the sizes of the PHEMT tubes in the cascode transistor modules of the power amplification units of all stages are gradually decreased from the input port to the output port. The utility model discloses under this structural configuration, can provide the high power at the time of the preceding stage pipe, lean on the small-size pipe of back stage to provide wideer bandwidth.
In this embodiment, the PHEMT transistors in the cascode transistor modules of the same-stage power amplification units have the same size. Namely: the PHEMT tubes in the same cascode transistor module are the same in size.
The utility model provides an ultra wide band distributing type power amplifier, total N level cascaded power amplification unit in proper order between input port and the output port, N is greater than or equal to 2.
In the ultra-wideband distributed power amplifier provided by the utility model, the cascode transistor module of each stage of power amplification unit comprises M PHEMT transistors, wherein M is more than or equal to 2; wherein (that is, in the cascode transistor module of the same stage of power amplification unit, it can also be said to be in the same cascode transistor module): the source electrode of the first PHEMT tube is grounded; the grid electrode of the first PHEMT tube is connected with the input port; the source electrode of the ith PHEMT tube is connected with the drain electrode of the (i-1) th PHEMT tube, and i is more than or equal to 2 and less than or equal to M; and the drain electrode of the Mth PHEMT tube is connected with one end of the microstrip transmission line Mline in the power amplification unit. In some embodiments, the gates of the 2 nd to M th PHEMT transistors are connected to a radio frequency grounding network (not shown), where the radio frequency grounding network is a resistor-capacitor series ground, or in other words, the gates of the 2 nd to M th PHEMT transistors are grounded through the resistor-capacitor series connection. The grid of each PHEMT is connected to a power supply (not shown). In each cascode transistor module, the first PHEMT operates in a common source state, and the 2-mth PHEMT operates in a common gate state. The utility model discloses an in the cascode transistor module with the stack structure imbeds distributed power amplifier, can improve distributed amplifier's gain, effectively solved distributed power amplifier gain and crossed the problem low excessively, promoted distributed power amplifier's output simultaneously.
In the ultra-wideband distributed power amplifier provided in this embodiment, as shown in fig. 2, the cascode transistor module of each stage of the power amplification unit includes 3 PHEMT transistors, that is, M ═ 3.
Specifically, as shown in fig. 2, the first-stage power amplification unit includes a microstrip transmission line Mline1 and a cascode transistor module, and the cascode transistor module in the first-stage power amplification unit includes 3 PHEMT transistors: a transistor PHEMT11, a transistor PHEMT12, and a transistor PHEMT 13; the second-stage power amplification unit comprises a microstrip transmission line Mline2 and a cascode transistor module, and the cascode transistor module in the second-stage power amplification unit comprises 3 PHEMT transistors: a transistor PHEMT21, a transistor PHEMT22, and a transistor PHEMT 23; by analogy, the nth-stage power amplification unit comprises a microstrip transmission line MlineN and a cascode transistor module, and the cascode transistor module in the nth-stage power amplification unit comprises 3 PHEMT transistors: transistor PHEMTN1, transistor PHEMTN2, and transistor PHEMTN 3.
Taking the first stage power amplifying unit as an example, the source of the first PHEMT (also called transistor PHEMT11) is grounded; the gate of the first PHEMT tube (i.e., transistor PHEMT11) is connected to the input port; the gates of the other 2 nd to M PHEMT transistors (i.e., transistor PHEMT12 and transistor PHEMT13) may be terminated by a radio frequency ground network (not shown); the source of the 2 nd PHEMT (also called transistor PHEMT12) is connected to the drain of the 1 st PHEMT (also called transistor PHEMT11), and the source of the 3 rd PHEMT (also called transistor PHEMT13) is connected to the drain of the 2 nd PHEMT (also called transistor PHEMT 12); the drain of the 3 rd PHEMT (also called transistor PHEMT13) is connected to one end of the microstrip transmission line Mline1 in the power amplification unit stage. The grid of each PHEMT is connected to a power supply (not shown). And the other power amplification units at different levels are analogized in turn and are not described in detail.
In the ultra-wideband distributed power amplifier provided by the utility model, in the adjacent two-stage power amplification units, the other end of the microstrip transmission line Mline in the previous-stage power amplification unit is connected with one end of the microstrip transmission line Mline in the next-stage (also can be said to be the next-stage) power amplification unit; the other end of the microstrip transmission line Mline in the last stage of power amplification unit is connected with an output port. Namely: the microstrip transmission lines Mline in each stage of power amplification unit are connected in series in sequence (or in series in sequence), and the microstrip transmission line Mline in the last stage of power amplification unit is connected with the output port. Under the structure, the cascade connection of a plurality of stages of power amplification units between the input port and the output port is realized.
Specifically, in this embodiment, as shown in fig. 2, the other end of the microstrip transmission line Mline1 in the first-stage power amplification unit is connected to one end of the microstrip transmission line Mline2 in the second-stage power amplification unit; one end of a microstrip transmission line Mline2 in the second-stage power amplification unit is connected with the drain of the 3 rd PHEMT (also called a transistor PHEMT23) in the cascode transistor module in the second-stage power amplification unit, and the other end of the microstrip transmission line Mline2 in the second-stage power amplification unit is connected with one end of a microstrip transmission line Mline3 (not shown in the figure) in the third-stage power amplification unit; … … and so on in the other stages of power amplifying units, which will not be described in detail. One end of the microstrip transmission line MlineN in the last stage of power amplification unit (namely, the Nth stage of power amplification unit) is connected with the other end of the microstrip transmission line MlineN-1 in the previous stage of power amplification unit (namely, the Nth stage of power amplification unit), and is simultaneously connected with the drain electrode of the 3 rd PHEMT transistor (namely, the transistor PHEMTN3) in the cascode transistor module of the last stage of power amplification unit (namely, the Nth stage of power amplification unit); the other end of the microstrip transmission line mlinenn in the last stage power amplification unit (i.e. the nth stage power amplification unit) is connected with the output port.
In this embodiment, the ultra-wideband distributed power amplifier further includes a capacitor C0; one end of the capacitor C0 is grounded, and the other end is connected to the input port.
The "/" as referred to herein means an or. PHEMT, also referred to herein as pHEMT, is described. The cascode transistor module may also be referred to herein as a transistor module. The dimensions of the PHEMT tube described herein, i.e., the gate width of the PHEMT tube.
The ultra-wideband distributed power amplifier provided by the embodiment can be integrated in a radio frequency front end transmitting system based on a GaAs PHEMT process to form a monolithic transmitting system. Meanwhile, the ultra-wideband distributed power amplifier provided by the embodiment is a monolithic microwave integrated circuit manufactured based on a 0.25um GaAs PHEMT process, the size of the ultra-wideband distributed power amplifier can be 2000um × 3150um, the ultra-wideband distributed power amplifier is very convenient to integrate in a system for cascade use, the system volume can be greatly reduced, the chip power consumption is low, the use is convenient, and the long-term reliability is high.
The ultra-wideband distributed power amplifier provided by the embodiment can realize high output power of 2W (namely 33dBm) in an ultra-wideband section of 0.1GHz-22 GHz; the ultra-wideband distributed power amplifier can realize an absolute stable state in a full frequency band, and a stability matching circuit is not required to be designed outside a chip; the gain of the ultra-wideband distributed power amplifier can reach 10-12 dB; the input standing wave of the ultra-wideband distributed power amplifier in the frequency band of 0.1GHz-22GHz is lower than-10 dB, and the output standing wave is lower than-14 dB.
Meanwhile, in the ultra-wideband distributed power amplifier provided in this embodiment, there are 7 stages of sequentially cascaded power amplification units between the input port and the output port, that is, N is 7.
The ultra-wideband distributed power amplifier (M is 3 and N is 7) provided in the above embodiment may be manufactured into a monolithic microwave integrated circuit based on a 0.25um GaAs PHEMT process, the chip size is 2000um 3150um, and the experimental test is performed using a bandwidth of 0.1GHz-22 GHz:
fig. 3 is a schematic diagram of a test result of a small signal characteristic of the ultra-wideband distributed power amplifier provided in this embodiment, which may also be referred to as a schematic diagram of a test result of a gain characteristic, an input standing wave characteristic, and an output standing wave characteristic of the power amplifier, where: the abscissa is frequency (i.e., operating frequency) in GHz; the ordinate is the small signal SP value, in dB; in the figure, Gain represents the Gain, S11 represents the input standing wave, and S22 represents the output standing wave.
As can be seen from FIG. 3, the Gain of the ultra-wideband distributed power amplifier is 10-12dB in the frequency range of 0.1GHz-22 GHz.
Meanwhile, as can be seen from FIG. 3, in the frequency range of 0.1GHz-22GHz, the input standing wave S11 of the ultra-wideband distributed power amplifier is < -10 dB.
Meanwhile, as can be seen from FIG. 3, the output standing wave S22 of the full frequency band of the ultra-wideband distributed power amplifier is < -14dB in the frequency range of 0.1GHz-22 GHz.
Fig. 4 is a schematic diagram of the test result of the ultra-wideband distributed power amplifier provided by the embodiment at 0.1-1GHz output power (Psat). Wherein: the abscissa is frequency, in GHz; the ordinate is the output power in dBm. As can be seen from fig. 4, the typical output power of the ultra-wideband distributed power amplifier is greater than 33dBm in the frequency range of 0.1GHz-1 GHz.
Fig. 5 is a schematic diagram of the test result of the ultra-wideband distributed power amplifier provided by the embodiment at 1-22GHz output power (Psat). Wherein: the abscissa is frequency, in GHz; the ordinate is the output power in dBm. As can be seen from fig. 5, the typical output power of the ultra-wideband distributed power amplifier is more than 33dBm in the frequency range of 1GHz-20 GHz. Meanwhile, as can be seen from fig. 5, the typical output power of the ultra-wideband distributed power amplifier is more than 28dBm in the frequency range of 20-22 GHz.
The frequencies corresponding to the abscissa in fig. 3, 4, and 5 are the operating frequencies.
In some embodiments, the PHEMT transistors in the cascode transistor modules of the same stage of power amplification unit are similar in size, that is, the PHEMT transistors in the cascode transistor modules of the same stage of power amplification unit are slightly different in size, or the PHEMT transistors in the same cascode transistor module are similar in size or slightly different in size. Under the structure, the power consumption of the chip can be further reduced under the condition of ensuring that the power and the gain of the power amplifier are unchanged.
In some embodiments, Vds of each PHEMT in the cascode transistor module of the same-stage power amplification unit (for example, the transistor PHEMT11, the transistor PHEMT12, and the transistor PHEMT13 in the cascode transistor module of the first-stage power amplification unit) is unevenly distributed, that is, Vds of each PHEMT in the same cascode transistor module is different, and with this structure, the output power of the distributed power amplifier can be further improved.
Another ultra-wideband distributed power amplifier provided in another embodiment of the present invention includes an input port, an output port, and a plurality of power amplification units sequentially cascaded between the input port and the output port; each stage of power amplification unit comprises a microstrip transmission line Mline and a PHEMT tube; from the input port to the output port, the sizes of the PHEMT tubes in the power amplification units of all stages are gradually reduced. Namely: the sizes of the PHEMT tubes in the power amplification units of all stages are gradually decreased from the input port to the output port. The utility model discloses under this structural configuration, can provide the high power at the time of the preceding stage pipe, lean on the small-size pipe of back stage to provide wideer bandwidth.
In this other embodiment, the source of the PHEMT in each stage of the power amplifier unit is grounded, the gate is connected to the input port, and the drain is connected to one end of the microstrip transmission line Mline in the stage (or the same stage) of the power amplifier unit. In the two adjacent power amplification units, the other end of the microstrip transmission line Mline in the previous power amplification unit is connected with one end of the microstrip transmission line Mline in the next (or next) power amplification unit; the other end of the microstrip transmission line Mline in the last stage of power amplification unit is connected with an output port. Namely: the microstrip transmission lines Mline in each stage of power amplification unit are connected in series/in series in sequence, and the microstrip transmission line Mline in the last stage of power amplification unit is connected with the output port. Under the structure, the cascade connection of a plurality of stages of power amplification units between the input port and the output port is realized. In some embodiments, the ultra-wideband distributed power amplifier further comprises a capacitor C0; one end of the capacitor C0 is grounded, and the other end is connected to the input port.
The above is only the preferred embodiment of the present invention, it should be pointed out that the above embodiments are right the present invention does not constitute a limitation, and the related working personnel are not departing from the technical idea of the present invention, and the various changes and modifications performed all fall within the protection scope of the present invention.
Claims (9)
1. An ultra-wideband distributed power amplifier, characterized by: the power amplifier comprises an input port, an output port and a plurality of power amplification units which are sequentially cascaded between the input port and the output port;
each stage of the power amplification unit comprises a microstrip transmission line Mline and a cascode transistor module; each cascode transistor module comprises a plurality of PHEMT transistors;
from the input port to the output port, the sizes of the PHEMT tubes in the cascode transistor modules of the power amplification units of each stage are gradually decreased.
2. The ultra-wideband distributed power amplifier of claim 1, wherein: the PHEMT tubes in the cascode transistor modules of the same-stage power amplification units are the same or similar in size.
3. The ultra-wideband distributed power amplifier of claim 1, wherein:
the cascode transistor module of each stage of power amplification unit comprises M PHEMT transistors, wherein M is more than or equal to 2, and the power amplification unit comprises the following components: the source electrode of the first PHEMT tube is grounded; the grid electrode of the first PHEMT tube is connected with the input port; the source electrode of the ith PHEMT tube is connected with the drain electrode of the (i-1) th PHEMT tube, and i is more than or equal to 2 and less than or equal to M; and the drain electrode of the Mth PHEMT tube is connected with one end of the microstrip transmission line Mline in the power amplification unit.
4. The ultra-wideband distributed power amplifier of claim 3, wherein:
in the adjacent two stages of power amplification units, the other end of the microstrip transmission line Mline in the previous stage of power amplification unit is connected with one end of the microstrip transmission line Mline in the next stage of power amplification unit; the other end of the microstrip transmission line Mline in the last stage of power amplification unit is connected with an output port.
5. The ultra-wideband distributed power amplifier of claim 1, wherein: also included is a capacitor C0; one end of the capacitor C0 is grounded, and the other end is connected to the input port.
6. An ultra-wideband distributed power amplifier, characterized by: the power amplifier comprises an input port, an output port and a plurality of power amplification units which are sequentially cascaded between the input port and the output port;
each stage of power amplification unit comprises a microstrip transmission line Mline and a PHEMT tube;
from the input port to the output port, the sizes of the PHEMT tubes in the power amplification units of all stages are gradually reduced.
7. The ultra-wideband distributed power amplifier of claim 6, wherein:
the source electrode of the PHEMT tube in each stage of power amplification unit is grounded, the grid electrode of the PHEMT tube is connected with the input port, and the drain electrode of the PHEMT tube is connected with one end of the microstrip transmission line Mline in the stage of power amplification unit.
8. The ultra-wideband distributed power amplifier of claim 7, wherein:
in the adjacent two stages of power amplification units, the other end of the microstrip transmission line Mline in the previous stage of power amplification unit is connected with one end of the microstrip transmission line Mline in the next stage of power amplification unit; the other end of the microstrip transmission line Mline in the last stage of power amplification unit is connected with an output port.
9. The ultra-wideband distributed power amplifier of claim 6, wherein: also included is a capacitor C0; one end of the capacitor C0 is grounded, and the other end is connected to the input port.
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| CN117375544A (en) * | 2023-10-23 | 2024-01-09 | 华南理工大学 | Ultra-wideband distributed low-noise amplifier with triple cascade structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117375544A (en) * | 2023-10-23 | 2024-01-09 | 华南理工大学 | Ultra-wideband distributed low-noise amplifier with triple cascade structure |
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Address after: 211100 9 Jiangning Road, Jiangning economic and Technological Development Zone, Nanjing, China Patentee after: Nanjing Milewei Microelectronics Technology Co.,Ltd. Country or region after: China Address before: 211100 9 Jiangning Road, Jiangning economic and Technological Development Zone, Nanjing, China Patentee before: NANJING MILEWEI Corp. Country or region before: China |
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