CN214411183U - Power SIP module packaging structure - Google Patents
Power SIP module packaging structure Download PDFInfo
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- CN214411183U CN214411183U CN202023209849.XU CN202023209849U CN214411183U CN 214411183 U CN214411183 U CN 214411183U CN 202023209849 U CN202023209849 U CN 202023209849U CN 214411183 U CN214411183 U CN 214411183U
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Abstract
The utility model provides a power SIP module packaging structure, include: a power SIP module configured to house a power chip; a PCB motherboard configured to carry one or more power SIP modules; a separation device configured to be connected between the power SIP module and the PCB motherboard, and to separate the power SIP module from the PCB motherboard when heat absorbed by the separation device exceeds a threshold; manufacturing a power SIP module, and packaging a power chip in the power SIP module; manufacturing a separation device on a first surface of the power SIP module, and attaching the separation device to the PCB motherboard; separating the power SIP module from the PCB motherboard when the heat absorbed by the separation device exceeds a threshold.
Description
Technical Field
The utility model relates to an integrated circuit technical field, in particular to power SIP module packaging structure.
Background
Compared with System In a Package (SIP) which is integrated on a printed circuit board, the SIP can optimize System performance to the maximum extent, avoid repeated packaging, shorten development period, reduce cost and improve integration level. Compared with a System On Chip (SOC), the SIP has the characteristics of high flexibility, high integration level, short design period, low development cost, easy access and the like.
With the increase of power density of the power chip and the complex use environment, the probability of failure of the power chip is higher and higher, and the packaging heat dissipation mode has the following disadvantages: (1) the power chip is easy to burn out and damage the PCB due to short circuit; (2) the damaged PCB cannot be repaired, and the failure cost is higher.
A conventional power SIP module 101 is soldered to a PCB motherboard 102 as shown in fig. 1. The PCB motherboard 102 has a pad 103 thereon, and the power SIP module 101 is connected to the pad 103 by solder 104, and when the power SIP module 101 generates heat or even burns, the heat is conducted to the pad 103 and the PCB motherboard 102 by the solder 104, so that the PCB motherboard 102 is damaged by heat. The PCB motherboard 102 is expensive and can cause significant economic loss if damaged.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a power SIP module packaging structure to solve current power chip and take place the problem that the short circuit very easily burns out and damages the PCB board.
In order to solve the technical problem, the utility model provides a power SIP module packaging structure, include:
at least one power SIP module configured to be attached to a PCB motherboard by a separate device, wherein a power chip is built in the power SIP module;
wherein the at least one power SIP module is separated from the PCB motherboard when the amount of heat absorbed by the separation device exceeds a threshold.
Optionally, in the power SIP module package structure, the separating device includes a spring plate and a solid-liquid two-state material layer, wherein:
the spring piece is accommodated in the solid of the solid-liquid two-state material layer in a pressed deformation state;
when the heat absorbed by the solid-liquid two-state material layer exceeds a threshold value, the solid-liquid two-state material layer is melted into liquid from solid, and the spring piece is restored to the normal original state from the compression deformation state.
Optionally, in the power SIP module package structure, the length of the spring plate in a compression deformation state is 30 to 100 micrometers;
the length of the spring piece in the normal original state is 80-500 microns.
Optionally, in the power SIP module package structure, the reflow temperature of the solid-liquid two-state material layer is below 200 ℃ or below 300 ℃,
when the reflux temperature is below 200 ℃, the solid-liquid two-state material layer melts at a temperature higher than 200 ℃ and is solidified at a temperature lower than 200 ℃;
when the reflux temperature is below 300 ℃, the solid-liquid two-state material layer melts above 300 ℃ and solidifies below 300 ℃.
Optionally, in the power SIP module package structure, the solid-liquid two-state material layer is a prefabricated solder, and the prefabricated solder has conductivity.
Optionally, in the power SIP module package structure, the solder is made of tin, a tin-indium system or a tin-silver system alloy, and the spring piece is a shape memory alloy spring.
Optionally, in the power SIP module package structure, the specific heat value of the shape memory alloy is 10 to 50J · K-1·mol-1When the absorption is 4730 to 23650 J.mol-1Or 3730 to 28650 J.mol-1And when the shape memory alloy is heated, the temperature of the shape memory alloy is higher than the melting temperature of the solid-liquid two-state material layer, and the shape memory alloy conducts heat to the solid-liquid two-state material layer.
Optionally, in the power SIP module package structure, the pre-solder is formed in the following manner:
manufacturing prefabricated welding flux on a pin of the power SiP module;
heating the prefabricated welding flux to form a softening paste;
implanting a spring piece into the prefabricated welding flux, and pasting the spring piece by a chip mounter;
cooling and solidifying the prefabricated welding flux to form a solid state;
and welding the prefabricated welding flux with the welding pad on the PCB motherboard.
Optionally, in the power SIP module package structure, the method further includes:
the prefabricated solder is coated on the pins of the power SIP module through a steel mesh printing or a dispensing mode.
The utility model provides an among the power SIP module packaging structure, through the power SIP module of preparation holding power chip, make separator on the first face of power SIP module, attach separator to the PCB mother board, when separator absorbing heat exceeded the threshold value, separate power SIP module and PCB mother board, can generate heat when burning even at power SIP module, separate power SIP module and PCB mother board, thereby reduce welding area of contact and reduce the heat-conduction of power SIP module to the PCB mother board, thereby play the effect from the loss prevention.
The utility model is directed to above problem, the utility model provides an improve power SIP packaging structure and preparation method, through the prefabricated solder of power SIP module pin, implant the spring leaf in the prefabricated solder, shape memory alloy's temperature just can take place the shape when being higher than the reflux temperature of prefabricated solder and warp the extension and resume, trigger the spring leaf and take place to warp the extension when the power SIP module takes place to burn out, with the separation of power SIP module and PCB mother board, thereby reduce the welding area of contact and reduce the heat-conduction of power SIP module to the PCB mother board, thereby play the effect from the loss prevention.
The utility model discloses a form prefabricated solder on the pin of power SIP module to implant the spring leaf in the solder, the spring leaf takes place to warp the extension when the power SIP module takes place to burn out, with the separation of power SIP module and PCB mother board, thereby reduce welding area of contact and reduce the heat-conduction of power SIP module to PCB, thereby play the effect from the loss prevention, have very big using value in power electronic packaging field.
Drawings
Fig. 1 is a schematic diagram of a conventional power SIP module package structure;
fig. 2 is a schematic diagram of a power SIP module package structure according to an embodiment of the present invention;
fig. 3 is a schematic diagram illustrating a solid-liquid two-state material layer formed by the power SIP module packaging method according to an embodiment of the present invention;
FIG. 4 is a schematic view of an embodiment of the present invention illustrating a spring plate embedded in a power SIP module packaging method;
fig. 5 is a schematic diagram of a power SIP module packaging method soldered to a PCB motherboard according to an embodiment of the present invention;
shown in the figure: 1-a power SIP module; 2-PCB mother board; 3-a bonding pad; 4-spring lamination; 5-solid-liquid two-state material layer/prefabricated solder; 6-pin.
Detailed Description
The present invention provides a power SIP module package structure, which is described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more fully apparent from the following description and appended claims. It should be noted that the drawings are in simplified form and are not to precise scale, and are provided for convenience and clarity in order to facilitate the description of the embodiments of the present invention.
Furthermore, features in different embodiments of the invention may be combined with each other, unless otherwise specified. For example, a feature of the second embodiment may be substituted for a corresponding or functionally equivalent or similar feature of the first embodiment, and the resulting embodiments are likewise within the scope of the disclosure or recitation of the present application.
The utility model discloses a core thought lies in providing a power SIP module packaging structure to solve current power chip and take place the problem that the short circuit very easily burns out and damages the PCB board.
In order to realize the above idea, the utility model provides a power SIP module packaging structure, include: a power SIP module configured to house a power chip; a PCB motherboard configured to carry one or more power SIP modules; a separation device configured to be connected between the power SIP module and the PCB motherboard, and to separate the power SIP module from the PCB motherboard when heat absorbed by the separation device exceeds a threshold; manufacturing a power SIP module, and packaging a power chip in the power SIP module; manufacturing a separation device on a first surface of the power SIP module, and attaching the separation device to the PCB motherboard; separating the power SIP module from the PCB motherboard when the heat absorbed by the separation device exceeds a threshold.
The present embodiment provides a self-loss-prevention power SIP module package structure, as shown in fig. 2, including: a power SIP module 1 configured to house a power chip; a PCB motherboard 2 configured to carry one or more power SIP modules 1; and a separation device configured to be connected between the power SIP module 1 and the PCB motherboard 2, and to separate the power SIP module 1 from the PCB motherboard 2 when the amount of heat absorbed by the separation device exceeds a threshold value.
In an embodiment of the present invention, in the self-loss-prevention power SIP module package structure, the separating device includes a spring plate 4 and a solid-liquid two-state material layer 5, wherein: at normal temperature, the spring piece 4 is accommodated in the solid-liquid two-state material layer 5 in a compression deformation state; when the heat absorbed by the solid-liquid two-state material layer 5 exceeds a threshold value, the solid-liquid two-state material layer 5 melts, and the spring piece 4 is restored to the normal original state from the compressed deformation state.
In an embodiment of the present invention, in the self-loss-prevention power SIP module package structure, the length of the spring plate 4 in the compression deformation state is 30 to 100 micrometers, preferably 50 to 100 micrometers; the spring piece 4 has a length of 80 to 500 micrometers, preferably 100 to 500 micrometers, in a normal original state.
In an embodiment of the present invention, in the self-loss-prevention power SIP module package structure, the reflow temperature of the solid-liquid two-state material layer is below 200 ℃ or below 300 ℃, when the reflow temperature is below 200 ℃, the solid-liquid two-state material layer melts above 200 ℃ and solidifies below 200 ℃; when the reflux temperature is below 300 ℃, the solid-liquid two-state material layer melts above 300 ℃ and solidifies below 300 ℃.
In an embodiment of the present invention, in the self-damage-prevention power SIP module package structure, the solid-liquid two-state material layer 5 is a pre-solder 5, and the pre-solder 5 can electrically connect the power SIP module 1 and the PCB motherboard 2.
In an embodiment of the present invention, in the self-loss-prevention power SIP module package structure, the material of the solder 5 is tin, tin-indium system or tin-silver system copper alloy, the spring piece is a shape memory alloy spring, the material of the spring piece is TiNi system memory alloy with a recovery temperature below 200 ℃, TiNi-Pd system high temperature memory alloy with a recovery temperature above 300 ℃.
In an embodiment of the present invention, in the self-loss-prevention SIP module package structure, the specific heat value of the shape memory alloy is 10-50J · K-1·mol-1When it absorbs (4730--1Or (3730-28650) J.mol-1And when the shape memory alloy is heated, the temperature of the shape memory alloy is higher than the melting temperature of the solid-liquid two-state material layer, and the shape memory alloy conducts heat to the solid-liquid two-state material layer.
The embodiment also provides a self-loss-prevention power SIP module packaging method, which includes: as shown in fig. 3 to 5, a power SIP module 1 is manufactured, and a power chip is packaged in the power SIP module 1; manufacturing a separation device on a first surface of the power SIP module 1, and attaching the separation device to the PCB motherboard 2; when the heat absorbed by the separating means exceeds a threshold value, the power SIP module 1 is separated from the PCB motherboard 2.
In an embodiment of the present invention, in the self-loss-prevention power SIP module packaging method, the method further includes: as shown in fig. 3, a pre-solder 5 is formed on the pin 6 of the power SIP module 1; heating the prefabricated welding flux 5 to enable the prefabricated welding flux 5 to form a softening paste; as shown in fig. 4, the spring plate 4 is implanted in the prefabricated solder 5, and the spring plate 4 is pasted with a chip by a chip mounter; cooling and solidifying the prefabricated welding flux 5 to enable the prefabricated welding flux 5 to be solid; as shown in fig. 5, the pre-formed solder 5 is soldered to the pads 3 on the PCB motherboard 2.
In an embodiment of the present invention, in the self-loss-prevention power SIP module 1 packaging method, the manufacturing method of the pre-solder 5 includes: the prefabricated solder is SnIn system solder, SnBi system solder, SnPd system solder or SnAg system solder; the prefabricated solder is coated on the pins of the power SIP module through a steel mesh printing or a dispensing mode. The spring or the spring piece is fixed with the solder in a reflow furnace, the reflow temperature is determined according to the melting temperature of the solder, the recovery temperature of the shape memory alloy spring needs to be higher than the reflow temperature, for example, the recovery temperature of TiNi series memory alloy is below 200 ℃, and the shape recovery temperature of TiNi-Pd series high-temperature memory alloy is above 300 ℃.
The utility model provides an among the self loss prevention power SIP module packaging structure, power SIP module 1 through preparation holding power chip, preparation separator on power SIP module 1's the first face, attach separator to PCB mother board 2, when separator absorbing heat exceeded the threshold value, separate power SIP module 1 and PCB mother board 2, can generate heat when burning even at power SIP module 1, with power SIP module 1 and the separation of PCB mother board 2, thereby reduce welding area of contact and reduce the heat-conduction of power SIP module 1 to PCB mother board 2, thereby play the effect from the loss prevention.
The utility model is directed to above problem, improved power SIP packaging structure and preparation method are provided, through 1 pin 6 precast welding material 5 of power SIP module, implant spring leaf 4 in the precast welding material 5, shape memory alloy's temperature just can take place the shape when being higher than precast welding material 5's reflux temperature and warp the extension and resume, trigger spring leaf 4 when power SIP module 1 takes place to burn out and take place to warp the extension, with the separation of power SIP module 1 and PCB mother board 2, thereby reduce welding area of contact and reduce the heat-conduction of power SIP module 1 to PCB mother board 2, thereby play the effect from the loss prevention.
The utility model discloses a form prefabricated solder 5 on power SIP module 1's pin 6 to implant spring leaf 4 in the solder, spring leaf 4 takes place to warp the extension when power SIP module 1 takes place to burn out, with the separation of power SIP module 1 and PCB mother board 2, thereby reduce welding area of contact and reduce power SIP module 1 to PCB's heat-conduction, thereby play the effect from the loss prevention, have very big using value in power electronic packaging field.
The SIP is not in a certain form, and as for the arrangement of chips, the SIP can be a planar 2D package of a Multi-chip module (MCM), and can also utilize a 3D package structure to effectively reduce the package area; the internal Bonding technique may be Wire Bonding (Wire Bonding) or Flip Chip (Flip Chip), or a combination of the two. In addition to 2D and 3D packages, other ways of integrating components with a multi-functional substrate are also encompassed by SIP. The technology mainly embeds different components in the multifunctional substrate, and can also be regarded as the concept of SIP, thereby achieving the purpose of function integration. Different chip arrangement modes are matched with different internal bonding technologies, so that various combinations are generated in the packaging types of the SIP, and the SIP can be customized or flexibly produced according to the requirements of customers or products.
The elements that make up SIP technology are package carriers and assembly processes. The former includes PCB, LTCC, Silicon Submount (which itself may also be an IC). The latter include traditional packaging processes (Wire bond and Flip Chip) and SMT equipment. Passive devices are an important component of SIP, some of which may be integrated with a carrier (e.g., Embedded, MCM-D), and others (e.g., high-precision, high-Q, high-value inductors, capacitors, etc.) are assembled on the carrier by SMT. The mainstream packaging form of SIP is BGA. As far as the state of the art is concerned, SIP has no particular process or material per se. This is not to say that SIP technology is mastered with traditional advanced packaging techniques. Since the industrial model of SIP is no longer a single agent, module partitioning and circuit design are additional important factors. The module division refers to separating a function from the electronic equipment, which is convenient for subsequent whole machine integration and SIP packaging. The circuit design takes into account details inside the module, the relationship of the module to the outside, the integrity of the signal (delay, distribution, noise, etc.). With the increase of module complexity and the increase of operating frequency (clock frequency or carrier frequency), the difficulty of system design will increase continuously, resulting in multiple iterations of product development and cost increase, and besides design experience, numerical simulation of system performance must participate in the design process.
SIP will break the industrial landscape of integrated circuits and change the package is just a matter of a back-end process plant. In the future, a lot of entities combining design capability and packaging process will appear in the integrated circuit industry, and products and profits with own brands are mastered. The output value of the packaging all over the world only accounts for 10% of the total value of the integrated circuit, and when the SIP technology is mastered by packaging enterprises, the industrial pattern needs to be adjusted, and the output value of the packaging industry can be improved in a leap manner.
SIP packaging allows other components required by the system, such as passive components and antennas, to be integrated into a single package, making it more fully functional. From the viewpoint of application products, the SIP is more suitable for electronic products with low cost, small area, high frequency, high speed, and short production period, especially for portable product markets such as Power Amplifier (PA), global positioning system (gps), Bluetooth module (Bluetooth), image sensor module, memory card, etc. In many systems, however, enclosed circuit boards limit the height and application of SIP. In long-term development planning, the development of SoC will effectively improve the performance requirement of future electronic products, and the applicable package type will also use the flip chip technology providing better performance as the main development axis; compared with the development of SoC, SIP is more suitable for the communication and consumer product market with high cost sensitivity.
SIP technology can be applied to various fields of the information industry, but the physical layer circuit in wireless communication is most distinctive in research and application. Commercial radio frequency chips are difficult to realize by using a silicon plane process, so that the integration level of the SoC technology is relatively low, and the performance is difficult to meet the requirements. Meanwhile, due to the fact that the working frequency of a physical layer circuit is high, various matching and filtering networks contain a large number of passive devices, and the technical advantages of the SIP are fully displayed in the aspects. Although a large number of products adopt the SIP technology, the packaging technology content is not high, the system is similar to the system integration on a PCB, rather than adopting unpackaged chips to combine with passive devices through COB technology, and most passive devices in the system are not integrated into a carrier but adopt SMT discrete devices.
Many products integrated within a single package have emerged before the popularity of the SIP term, and historically they have not been labeled as such. The earliest modules were power amplifiers in cell phones, which could integrate multiple frequency power amplifiers, power control, and transmit/receive switches. In addition, in the case of a three-dimensional multi-chip memory module, the integration of a logic circuit and a memory circuit is also in this case.
The higher the integration level are Bluetooth and 802.11 (b/g/a). The Philips BGB202 bluetooth SIP module contains, in addition to the antenna, a baseband processor and all physical layer circuitry, some of which are implemented in thin film technology (but not in the SIP carrier, but in a separate passive chip). The peripheral dimensions of the entire module are 7mm by 8mm by 1.4 mm. The external unit only requires an antenna and a clock. Philips also adopts SIP technology for 3G communication-oriented mobile TV solution, and a 9mmx9mm module comprises a high frequency head, channel demodulation and decoding.
UWB is another ideal application for SIP. Freescale Semiconductor has begun to provide the DS-UWB chipset.
In summary, the above embodiments have described the self-loss-prevention SIP module package structure in detail, and of course, the present invention includes but is not limited to the above embodiments, and any modifications based on the above embodiments are within the scope of the present invention. One skilled in the art can take the contents of the above embodiments to take a counter-measure.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
The above description is only for the preferred embodiment of the present invention and is not intended to limit the scope of the present invention, and any modification and modification made by those skilled in the art according to the above disclosure are all within the scope of the claims.
Claims (6)
1. A power SIP module package, comprising:
at least one power SIP module configured to be attached to a PCB motherboard by a separate device, wherein the power SIP module has a power chip built therein.
2. The power SIP module package of claim 1, wherein the separation device comprises a spring plate and a solid-liquid two-state material layer, wherein:
the spring piece is accommodated in the solid of the solid-liquid two-state material layer in a pressed deformation state.
3. The power SIP module package structure of claim 2,
the length of the spring piece in a compression deformation state is 30-100 micrometers;
the spring piece is 80-500 microns long in the normal original state.
4. The power SIP module package structure of claim 2, wherein the solid-liquid two-state material layer is a pre-formed solder, the pre-formed solder having conductive properties.
5. The power SIP module package structure of claim 4, wherein the pre-solder is made of Sn, Sn-in system or Sn-Ag system alloy, and the spring plate is a shape memory alloy spring.
6. The power SIP module package structure of claim 5, whereinWherein the specific heat value of the shape memory alloy is 10 to 50 J.K- 1·mol- 1When the absorption is 4730 to 23650 J.mol- 1Or 3730 to 28650 J.mol- 1And when the shape memory alloy is heated, the temperature of the shape memory alloy is higher than the melting temperature of the solid-liquid two-state material layer, and the shape memory alloy conducts heat to the solid-liquid two-state material layer.
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| CN202023209849.XU CN214411183U (en) | 2020-12-28 | 2020-12-28 | Power SIP module packaging structure |
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| CN202023209849.XU CN214411183U (en) | 2020-12-28 | 2020-12-28 | Power SIP module packaging structure |
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| CN214411183U true CN214411183U (en) | 2021-10-15 |
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