CN214256116U - Full-bridge lower tube driving circuit and driver thereof - Google Patents
Full-bridge lower tube driving circuit and driver thereof Download PDFInfo
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- CN214256116U CN214256116U CN202120245956.3U CN202120245956U CN214256116U CN 214256116 U CN214256116 U CN 214256116U CN 202120245956 U CN202120245956 U CN 202120245956U CN 214256116 U CN214256116 U CN 214256116U
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Abstract
The utility model provides a full-bridge lower tube driving circuit and a driver thereof, which comprises a grid electrode of a first MOS tube connected with a drain electrode of the first MOS tube and one end of a first resistor, the source electrode of the first MOS tube is connected with the drain electrode of the second MOS tube, the grid electrode of the second MOS tube is connected with the grid electrode of the fifth MOS tube and a grid electrode control signal for driving the right lower tube, the source electrode of the second MOS tube is respectively connected with the source electrode of the third MOS tube and a power ground, the drain electrode of the third MOS tube is respectively connected with the drain electrode of the fifth MOS tube, the grid electrode control signal for driving the right lower tube, the other end of the first resistor, the grid electrode of the fourth MOS tube, the output end of the current source and the input end of the third phase inverter, the grid electrode of the third MOS tube is connected with the output end of the third phase inverter, the source electrode of the fourth MOS tube is connected with the power ground, the drain electrode of the fourth MOS tube is connected with the input end of the right output signal and the current source, and the source electrode of the fifth MOS tube is connected with a power supply voltage. The fluctuation on the power supply is reduced when the driver commutates, and the reliability of the upper tube is improved.
Description
Technical Field
The utility model belongs to the technical field of the electron, especially, relate to a full-bridge low tube drive circuit and driver thereof.
Background
When the existing full-bridge driver commutates, because the inductive current can not change suddenly, the inductive current can enter a power supply system through the body diode of the upper tube, and the follow current passing through the body diode has two defects, namely, the overshoot voltage exists in the power supply voltage, and other circuits on the power supply can be damaged when the overshoot voltage is higher; secondly, due to process deviation, when the parasitic PNP from the upper tube to the substrate has electric leakage, part of the follow current flows to the chip substrate, and the upper tube is burnt.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a full-bridge down tube drive circuit and driver thereof, the afterflow that drives mains voltage through last tube body diode when aiming at solving current full-bridge driver and commutates has other circuits that voltage might damage on the power of overshooting, perhaps the afterflow has partly flow direction chip substrate, leads to the top tube to burn out the problem.
In a first aspect, the utility model provides a full-bridge low tube drive circuit, include: the MOS transistor comprises a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a first resistor R1 and a third inverter X3; the gate of the first MOS transistor M1 is connected to the drain of the first MOS transistor M1 and one end of the first resistor R1, the source of the first MOS transistor M1 is connected to the drain of the second MOS transistor M2, the gate of the second MOS transistor M2 is connected to the gate of the fifth MOS transistor M5 and the gate control signal LSG2_ pre driving the right lower tube, the source of the second MOS transistor M2 is connected to the source of the third MOS transistor M3 and the power ground GND, the drain of the third MOS transistor M3 is connected to the drain of the fifth MOS transistor M5, the gate control signal LSG2_ pre driving the right lower tube, the other end of the first resistor R1, the gate of the fourth MOS transistor M4, the output of the current source I1 and the input of the third inverter X3, the gate of the third MOS transistor M3 is connected to the output of the third inverter X3, the source of the fourth MOS transistor M4 is connected to the power ground, the drain of the fourth MOS transistor M4 is connected to the input of the right output signal OUT2 and the current source I1, and the source of the fifth MOS transistor M VCC 26 is connected to the power supply voltage 5.
In a second aspect, the present invention provides a driver, which comprises the full-bridge lower tube driving circuit.
In the utility model, R1 in the full-bridge lower tube driving circuit can set the size of LSG2, and the size of the LSG is adjusted through a fourth MOS tube M4, so that most of follow current passes through the lower tube on the right side, the follow current passing through the upper tube body diode is obviously reduced, and the fluctuation on the power supply is reduced; meanwhile, the possibility that follow current flows into the substrate through the upper tube parasitic PNP is remarkably reduced, and the reliability of the upper tube is improved.
Drawings
Fig. 1 is a schematic diagram of a full-bridge lower tube driving circuit according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of another full-bridge lower tube driving circuit according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of a full-bridge lower tube driving circuit after commutation according to an embodiment of the present invention.
Fig. 4 is a waveform diagram of a part of voltage and current of the full-bridge lower tube driving circuit in fig. 3 according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantageous effects of the present invention more clearly understood, the present invention is further described in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In order to explain the technical solution of the present invention, the following description is made by using specific examples.
Referring to fig. 1, an embodiment of the present invention provides a full-bridge lower tube driving circuit, including: the MOS transistor comprises a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a first resistor R1 and a third inverter X3; the gate of the first MOS transistor M1 is connected to the drain of the first MOS transistor M1 and one end of the first resistor R1, the source of the first MOS transistor M1 is connected to the drain of the second MOS transistor M2, the gate of the second MOS transistor M2 is connected to the gate of the fifth MOS transistor M5 and the gate control signal LSG2_ pre driving the right lower tube, the source of the second MOS transistor M2 is connected to the source of the third MOS transistor M3 and the power ground GND, the drain of the third MOS transistor M3 is connected to the drain of the fifth MOS transistor M5, the gate control signal LSG2_ pre driving the right lower tube, the other end of the first resistor R1, the gate of the fourth MOS transistor M4, the output of the current source I1 and the input of the third inverter X3, the gate of the third MOS transistor M3 is connected to the output of the third inverter X3, the source of the fourth MOS transistor M4 is connected to the power ground, the drain of the fourth MOS transistor M4 is connected to the input of the right output signal OUT2 and the current source I1, and the source of the fifth MOS transistor M VCC 26 is connected to the power supply voltage 5.
Referring to fig. 2, another full-bridge down tube driving circuit according to an embodiment of the present invention is different from the full-bridge down tube driving circuit shown in fig. 1 in that the full-bridge down tube driving circuit further includes a first inverter X1, an input end of the first inverter X1 is connected to a gate control signal LSG2_ pre for driving a right down tube, and an output end of the first inverter X1 is connected to a gate of a fifth MOS transistor M5.
In an embodiment of the present invention, the full-bridge lower tube driving circuit may further include a second inverter X2, an input end of the second inverter X2 is connected to the gate of the fifth MOS transistor M5 and the output end of the first inverter X1, and an output end of the second inverter X2 is connected to the gate of the fourth MOS transistor M4.
In an embodiment of the present invention, the full-bridge lower tube driving circuit may further include a second resistor R2, and both ends of the second resistor R2 are respectively connected to the output end of the second phase inverter X2 and the gate of the fourth MOS transistor M4.
In an embodiment of the present invention, the first MOS transistor M1, the second MOS transistor M2, the third MOS transistor M3, and the fourth MOS transistor M4 are N-type MOS transistors.
In an embodiment of the present invention, the fifth MOS transistor M5 is a P-type MOS transistor.
Fig. 3 is a schematic diagram of a full-bridge lower tube driving circuit after commutation according to an embodiment of the present invention, and the working principle is as follows:
when the driver commutates, in dead time, the left lower tube is opened, the right upper tube is not completely opened, the follow current circuit is released through the lower tube, the grid of the right lower tube is driven to a certain voltage value, the right lower tube is kept to work in a saturation region, and most of the inductance follow current is conducted through the right lower tube. The current that gets into the power through the tube body diode on the right side diminishes or does not have, and mains voltage's fluctuation is less for whole circuit has higher reliability.
Please refer to the schematic diagram of the full-bridge lower tube driving circuit of fig. 2, the operation principle is as follows:
when the driver commutates, LSG2_ pre will pull low to close the right-side down tube, but OUT2 will be pulled high due to inductive freewheeling and remain near the value of the power supply voltage, and when OUT2 is maintained at a high voltage, I1 will generate a dynamic current to pull LSG1 high, so that freewheeling flows through M4 to GND. As the freewheeling current decreases, OUT1 gradually decreases, I1 also decreases, LSG2 also gradually decreases, and when LSG2 decreases to a certain value, VT2 pulls high, and LSG2 is pulled low rapidly by M3. R1 can size LSG2, adjusting the freewheel size through M4. R2 limits the driving ability of X2 and prevents LSG2 from being pulled low by X2.
Referring to fig. 4, a waveform diagram of a portion of the voltage current of the full-bridge down-tube driving circuit of fig. 2 is provided:
OUT2 is the full bridge right side output voltage, and during dead time, will be maintained at a high voltage due to inductive freewheeling.
LSG2 is the gate voltage of the right lower tube, keeping M4 in a saturated conducting state during the dead time.
I1 is the gate dynamic drive current of M4, I1 develops a voltage at LSG2 through R1 and M1, opening M4, releasing the inductive freewheel.
M4 — I is the channel conduction current through the right down tube M4.
M2_ I is the sum of the body diode and channel current flowing through the right hand side top tube M2.
Another embodiment of the present invention provides a driver, which comprises the full-bridge lower tube driving circuit.
In the embodiment of the present invention, R1 in the full-bridge lower tube driving circuit can set the size of LSG2, and adjust the size of the fourth MOS tube M4, so that most of the follow current passes through the right lower tube, which significantly reduces the follow current passing through the upper tube diode, and reduces the fluctuation on the power supply; meanwhile, the possibility that follow current flows into the substrate through the upper tube parasitic PNP is remarkably reduced, and the reliability of the upper tube is improved.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (7)
1. A full-bridge down-tube driver circuit, comprising: the MOS transistor comprises a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a first resistor R1 and a third inverter X3; the gate of the first MOS transistor M1 is connected to the drain of the first MOS transistor M1 and one end of the first resistor R1, the source of the first MOS transistor M1 is connected to the drain of the second MOS transistor M2, the gate of the second MOS transistor M2 is connected to the gate of the fifth MOS transistor M5 and the gate control signal LSG2_ pre driving the right lower tube, the source of the second MOS transistor M2 is connected to the source of the third MOS transistor M3 and the power ground GND, the drain of the third MOS transistor M3 is connected to the drain of the fifth MOS transistor M5, the gate control signal LSG2_ pre driving the right lower tube, the other end of the first resistor R1, the gate of the fourth MOS transistor M4, the output of the current source I1 and the input of the third inverter X3, the gate of the third MOS transistor M3 is connected to the output of the third inverter X3, the source of the fourth MOS transistor M4 is connected to the power ground, the drain of the fourth MOS transistor M4 is connected to the input of the right output signal OUT2 and the current source I1, and the source of the fifth MOS transistor M VCC 26 is connected to the power supply voltage 5.
2. The full-bridge down tube driving circuit according to claim 1, wherein the full-bridge down tube driving circuit further comprises a first inverter X1, an input terminal of the first inverter X1 is connected to the gate control signal LSG2_ pre for driving the right down tube, and an output terminal of the first inverter X1 is connected to the gate of the fifth MOS transistor M5.
3. The full-bridge down tube driving circuit according to claim 2, wherein the full-bridge down tube driving circuit further comprises a second inverter X2, an input terminal of the second inverter X2 is connected to the gate of the fifth MOS transistor M5 and the output terminal of the first inverter X1, and an output terminal of the second inverter X2 is connected to the gate of the fourth MOS transistor M4.
4. The full-bridge down tube driving circuit according to claim 3, further comprising a second resistor R2, wherein two ends of the second resistor R2 are respectively connected to the output terminal of the second inverter X2 and the gate of the fourth MOS transistor M4.
5. The full-bridge down tube driving circuit according to claim 1, wherein the first MOS transistor M1, the second MOS transistor M2, the third MOS transistor M3 and the fourth MOS transistor M4 are N-type MOS transistors.
6. The full-bridge down tube driving circuit according to claim 1, wherein the fifth MOS transistor M5 is a P-type MOS transistor.
7. A driver comprising a full-bridge down-tube driver circuit according to any of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120245956.3U CN214256116U (en) | 2021-01-28 | 2021-01-28 | Full-bridge lower tube driving circuit and driver thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120245956.3U CN214256116U (en) | 2021-01-28 | 2021-01-28 | Full-bridge lower tube driving circuit and driver thereof |
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| CN214256116U true CN214256116U (en) | 2021-09-21 |
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| CN202120245956.3U Active CN214256116U (en) | 2021-01-28 | 2021-01-28 | Full-bridge lower tube driving circuit and driver thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112787490A (en) * | 2021-01-28 | 2021-05-11 | 深圳市矽塔科技有限公司 | Full-bridge lower tube driving circuit and driver thereof |
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2021
- 2021-01-28 CN CN202120245956.3U patent/CN214256116U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112787490A (en) * | 2021-01-28 | 2021-05-11 | 深圳市矽塔科技有限公司 | Full-bridge lower tube driving circuit and driver thereof |
| CN112787490B (en) * | 2021-01-28 | 2024-09-06 | 深圳市矽塔科技有限公司 | Full-bridge lower tube driving circuit and driver thereof |
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