CN213904902U - Display panel drive circuit and liquid crystal display device - Google Patents
Display panel drive circuit and liquid crystal display device Download PDFInfo
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- CN213904902U CN213904902U CN202022946193.3U CN202022946193U CN213904902U CN 213904902 U CN213904902 U CN 213904902U CN 202022946193 U CN202022946193 U CN 202022946193U CN 213904902 U CN213904902 U CN 213904902U
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Abstract
The display panel driving circuit comprises a driving power supply, a level conversion circuit and a standby first grid driving signal generation circuit, wherein the driving power supply provides a first grid driving signal to a first grid driving signal input end of the power conversion circuit, and the standby first grid driving signal is connected between the power signal input end of the driving power supply and the first grid driving signal input end of the level conversion circuit. The utility model discloses a display panel drive circuit's reserve first grid drive signal generating circuit detects drive power supply's power signal, provide reserve first grid drive signal to level conversion circuit's first grid drive signal input after the system shuts down, the high level hold time of the first grid drive signal that extension level conversion circuit received, the extension is shut down the back and is controlled opening of display panel thin film transistor, guarantee display panel's liquid crystal capacitor's charge release time, improve the ghost of shutting down.
Description
Technical Field
The utility model relates to a liquid crystal display technology field specifically relates to display panel drive circuit and liquid crystal display device.
Background
The display panel of the liquid crystal display comprises thin film transistors which are arranged in an array mode, the thin film transistors are communicated with a liquid crystal capacitor, the thin film transistors are driven by a display panel driving circuit to provide voltage for the liquid crystal capacitor, liquid crystal deflection is controlled to achieve display, and when the liquid crystal display is turned off, residual charges usually exist in the liquid crystal capacitor, so that a picture is subjected to afterimage.
In the prior art, a display panel driving circuit includes a level shift circuit, where the level shift circuit receives a first gate driving signal and a second gate driving signal, respectively corresponding to a high level signal and a low level signal, and is used to control on and off of a thin film transistor, and after a system is shut down, the level shift circuit outputs a first gate driving signal level to control on and off of the thin film transistor in the display panel, and release charges in a liquid crystal capacitor connected to the thin film transistor, so as to improve shutdown ghost.
SUMMERY OF THE UTILITY MODEL
In view of the above, an object of the present invention is to provide a display panel driving circuit and a liquid crystal display device, so as to improve the shutdown afterimage of the liquid crystal display device.
According to an aspect of the utility model, a display panel drive circuit is provided, display panel is including being the thin film transistor that the array was arranged, display panel drive circuit includes: the driving circuit comprises a driving power supply, a level conversion circuit and a standby first grid driving signal generating circuit;
the level conversion circuit comprises a first grid driving signal input end and a grid driving signal output end, and the grid driving signal output end is connected with the grid driving signal input end of the display panel;
the driving power supply comprises a first grid driving signal output end, and a first grid driving signal input end of the level conversion circuit is connected with the first grid driving signal output end so as to output a first grid driving signal to control the opening of the thin film transistor;
the standby first gate driving signal generating circuit comprises a standby first gate driving signal output end and a detection signal input end, the standby first gate driving signal output end is connected with the first gate driving signal input end of the level conversion circuit, and the detection signal input end is connected with the power signal input end of the driving power supply so as to output a standby first gate driving signal when the power signal of the driving power supply is reduced to a threshold value.
Optionally, the spare first gate driving signal generating circuit includes:
the first input end of the boosting unit is connected to the backlight driving voltage output end of the main circuit board through a transistor;
the comparator comprises a first input end, a reference signal input end and a comparison signal output end which are connected with the driving power supply signal output end of the main circuit board, the comparison signal output end is connected to the grid electrode of the thin film transistor, the first input end of the comparator is the detection signal input end of the standby first grid electrode driving signal generating circuit,
and the signal output end of the driving power supply of the main circuit board is connected with the signal input end of the driving power supply.
Optionally, the spare first gate driving signal generating circuit further includes:
and the resistor is connected between the grid electrode of the thin film transistor and the backlight driving voltage output end of the main circuit board.
Optionally, the thin film transistor is a PMOS transistor.
Optionally, the boosting unit includes an enable terminal connected to the first gate driving signal output terminal of the driving power supply.
Optionally, the enable terminal of the boosting unit is further grounded through a capacitor.
Optionally, the spare first gate driving signal generating circuit further includes:
and the low dropout regulator comprises an input end connected with the backlight driving voltage output end of the main circuit board and a reference signal output end connected to the reference signal input end of the comparator.
Optionally, the low dropout regulator further comprises an enable terminal connected to the first gate drive signal output terminal of the drive power supply.
Optionally, the method further comprises: and the diode is connected between the first grid driving signal output end of the driving power supply and the first grid driving signal input end of the level conversion circuit in series in the forward direction.
According to the utility model discloses an on the other hand provides a liquid crystal display device, including main circuit board and display panel, its characterized in that still includes:
the utility model provides a display panel drive circuit, display panel drive circuit connects main circuit board with between the display panel.
The display panel driving circuit provided by the utility model comprises a level conversion circuit and a standby first grid driving signal generating circuit, wherein the level conversion circuit receives a first grid driving signal and provides a grid driving signal to the thin film transistors which are arranged in the display panel in an array way, the first gate driving signal corresponds to the on-state control of the thin film transistor, the standby first gate driving signal generating circuit detects the power signal of the driving power supply and provides a standby first gate driving signal to the first gate driving signal input terminal of the level shifter circuit, after the system is shut down, the time for maintaining the level of the input signal of the first grid drive signal input end of the level conversion circuit at a high level is prolonged, the on control of the level conversion circuit on a thin film transistor in the display panel after the shutdown is prolonged, the charge release time of a liquid crystal capacitor of the display panel is ensured, and the shutdown afterimage is improved.
The utility model provides a liquid crystal display device includes main circuit board and display panel, and the utility model provides a display panel drive circuit, this display panel drive circuit connect between main circuit board and display panel, can prolong the high level time of the level shift circuit's after the shutdown first grid drive signal input signal, the extension shuts down the back level shift circuit to the on-control time of the thin film transistor in the display panel, the extension shuts down the discharge time of the liquid crystal capacitance of back display panel, improves the ghost of shutting down.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
fig. 1 shows a schematic diagram of a partial structure of a display panel driving circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a standby first gate driving signal generating circuit of a display panel driving circuit according to an embodiment of the present invention;
fig. 3 and 4 show partial signal timing diagrams of the display panel driving circuit of the prior art and the embodiment of the present invention, respectively.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.
The following detailed description of the embodiments of the present invention is provided with reference to the accompanying drawings and examples.
Fig. 1 shows a schematic diagram of a partial structure of a display panel driving circuit according to an embodiment of the present invention.
As shown in fig. 1, the display panel driving circuit 200 according to the embodiment of the present invention is connected to the main circuit board 10, and includes a driving power supply 130, a backlight driving circuit 120, a screen driving circuit 140, a level shift circuit 150, and a standby first gate driving signal generating circuit 210.
Among them, the display panel driving circuit 200 according to the embodiment of the present invention is mainly different from the display panel driving circuit of the prior art in the arrangement of the standby first gate driving signal generating circuit 210.
A detection signal input end of the standby first gate driving signal generating circuit 210 is connected with a driving power signal output end of the main circuit board 10, detects the driving power signal VIN, and provides a standby first gate driving signal VGH for output according to the driving power signal VIN; the second input terminal is connected to the backlight driving voltage output terminal of the main circuit board 10, and the backlight driving voltage VLED is used as the driving voltage of the first gate driving signal VGH.
The main circuit board 10 includes a driving power signal output terminal connected to a power input terminal of the driving power 130 and a backlight driving voltage output terminal connected to the backlight driving circuit 120, and provides the driving power signal VIN and the backlight driving voltage VLED to the driving power 130 and the backlight driving circuit 120, respectively. The main circuit board 10 is also connected to a panel driving circuit 140 for providing display data to the panel driving circuit 140, and the panel driving circuit 140 provides a first clock signal CLKINn output according to the display data.
A driving power signal input terminal of the driving power source 130 provides a first gate driving signal VGH1 and a second gate driving signal VGL1 for output after receiving an input of a driving power signal VIN, and also provides a standard power source of the panel driving circuit 140, where the standard power source is used for setting a standard level of the first clock signal CLKINn, and the level of the first gate driving signal VGH1 is greater than the level of the second gate driving signal VGL1, and is used for controlling the turn-on and turn-off of the thin film transistors arranged in an array in the display panel. When the thin film transistor is conducted, the liquid crystal capacitor is communicated with the ground for releasing charges.
The level shift circuit includes a first gate driving signal input terminal, a second gate driving signal input terminal, a first clock signal input terminal, and a gate driving signal output terminal connected to the gate driving signal input terminal of the display panel, and receives a first gate driving signal VGH1, a second gate driving signal VGL1, and a first clock signal CLKINn, respectively, and outputs a second clock signal CLKOUTn according to the first clock signal CLKINn, where a high-level potential of the second clock signal CLKOUTn is a potential of the first gate driving signal VGH1, a low-level potential is a potential of the second gate driving signal VGL1, and the output second clock signal CLKOUTn is a gate driving signal, and controls on and off of each thin film transistor of the display panel, thereby implementing display.
Fig. 2 is a schematic structural diagram of a standby first gate driving signal generating circuit of a display panel driving circuit according to an embodiment of the present invention.
Referring to fig. 2, the first gate driving signal input terminal of the level shift circuit 150 of the display panel driving circuit 200 according to the embodiment of the present invention is connected to the standby first gate driving signal output terminal of the standby first gate driving signal generating circuit 210, when the display panel is turned off, the first gate driving signal input terminal of the level shift circuit 150 is simultaneously connected to the first gate driving signal VGH1 and the standby first gate driving signal VGH, so that the level of the first gate driving signal actually received by the first gate driving signal input terminal of the level shift circuit 150 can be maintained at a higher potential for a longer time, and the level shift circuit 150 can also maintain a high level output for a certain time after the display panel is turned off, thereby controlling the thin film transistor of the display panel to be turned on, releasing the charges stored in the liquid crystal capacitor, and improving the shutdown ghost phenomenon.
In the display panel driving circuit 200 of the present embodiment, the standby first gate driving signal generating circuit 210 includes a boosting unit 211, a transistor P, a resistor R, a comparator 212, and a low dropout linear regulator 213. In this embodiment, the transistor P is a PMOS (positive channel Metal Oxide Semiconductor) transistor, and is turned on at a low level, but not limited thereto.
The first input end of the voltage boosting unit 211 is connected to the backlight driving voltage output end of the main circuit board through a transistor P, the comparator 212 comprises a first input end connected with the driving power signal output end of the main circuit board, a reference signal input end and a comparison signal output end, the driving power signal VIN and the reference signal Vref are compared, when the level of the driving power signal VIN is lower than the reference signal Vref (shutdown detection), a low-level comparison signal is output to the gate of the transistor P, the transistor P is turned on and conducted, and the voltage boosting unit 211 outputs a standby first gate driving signal VGH by taking the backlight driving voltage VLED as a power supply. The enable end of the boost unit 211 is connected to the first gate driving signal output end of the driving power supply 130, and the output is controlled according to the first gate driving signal VGH1, when the level of the first gate driving signal VGH1 is reduced to the enable threshold voltage of the boost unit 211, the standby first gate driving signal VGH is stopped being output, the standby first gate driving signal VGH for a certain time is provided for output after the system is shut down, and after shutdown residue is improved, the system is completely shut down in cooperation. The boost unit 211 uses the backlight driving voltage VLED as a power supply, and does not need to refer to a new power signal, thereby improving the practicability.
The enable terminal of the voltage boosting unit 211 is also grounded through the capacitor C, i.e., the first gate driving signal VGH1 is output to the capacitor C, and the enable control of the voltage boosting unit 211 is provided through the capacitor C, providing stability of the control. The boosting unit 211 may be a boost boosting circuit.
The first input terminal (non-inverting input terminal) of the comparator 212 receives the driving power signal VIN, the reference signal input terminal (inverting input terminal) receives the reference signal Vref, the level decrease of the driving power signal VIN corresponds to the input power decrease of the driving power source 130, that is, the level of the first gate driving signal VGH1 output by the driving power source 130 decreases, the time for which the level of the driving power signal VIN decreases to the level of the reference signal Vref is detected, it is determined that the first gate driving signal VGH1 is insufficient to control the turn-on of the thin film transistor when the level of the driving power signal VIN decreases to the level of the reference signal Vref, a low-level comparison signal is provided to the gate of the transistor P, the boost unit 211 is controlled to output the standby first gate driving signal VGH, the high-level time of the input signal at the first gate driving signal input terminal of the level shift circuit 150 is extended to extend the turn-on time of the thin film transistor in the display panel, the charges stored in the liquid crystal capacitor are fully released, and the shutdown ghost phenomenon is improved.
In fig. 2, point a, that is, the gate of the transistor P is further connected to the backlight driving voltage output end of the main circuit board through the resistor R, and when the driving power voltage VIN is greater than the reference signal Vref and the comparison signal outputs a high level, the gate of the transistor P is pulled up to the backlight driving voltage VLED, so that the turn-off of the transistor P is ensured, and the standby first gate driving signal VGH is prevented from being output when the display panel is not turned off, thereby interfering with the normal driving of the display panel. When the driving power voltage VIN is smaller than the reference signal Vref, the low level of the comparison signal output by the comparator 212 may correspond to the ground level, which may effectively control the turn-off of the transistor P.
A diode D1 is further connected in series in the forward direction between the first gate driving signal output end of the driving power source 130 and the first gate driving signal input end of the level shift circuit 150, so as to ensure unidirectionality between the first gate driving signal output end of the driving power source 130 and the first gate driving signal input end of the level shift circuit 150, and avoid interference on the driving power source 130 when the standby first gate driving signal VGH is effectively output, so as to ensure normal operation of the system.
The standby first gate driving signal generating circuit 210 further comprises a low dropout regulator 213, which comprises a reference signal output terminal for providing a reference signal Vref, the reference signal output terminal is connected to the reference signal input terminal of the comparator 212, and provides a stable and reliable reference signal Vref, thereby ensuring the effective operation of the standby first gate driving signal generating circuit 210. The input end of the low dropout regulator 213 is connected to the backlight driving voltage output end of the main circuit board, the backlight driving voltage in the system is used as the power supply, the practicability is improved, the enable end of the low dropout regulator 213 is connected to the first gate driving signal output end of the driving power supply 130, and the low dropout regulator 213 is controlled to stop working when the first gate driving signal VGH1 is lower than the enable threshold voltage of the low dropout regulator 213, and the system is completely shut down.
Fig. 3 and 4 show partial signal timing diagrams of the display panel driving circuit of the prior art and the embodiment of the present invention, respectively.
Wherein, fig. 3 is a partial signal timing diagram of a display panel driving circuit in the prior art, fig. 4 is a partial signal timing diagram of a driving circuit 200 of a display panel in an embodiment of the present invention, wherein VGH is an input signal of a first gate driving signal input end of a level shift circuit, CLK4 is an output signal level of the level shift circuit, an a point corresponds to a shutdown time, and a b point corresponds to a time when the CLK4 level is reduced to a time insufficient to turn on a thin film transistor.
As shown in fig. 3 and 4, the time from point a to point b corresponds to the on-hold time of the thin film transistor of the display panel after shutdown, and the hold time of the display panel driving circuit in the prior art is 165.6 milliseconds, the embodiment of the present invention provides a hold time of the display panel driving circuit 200 of 209.6 milliseconds, which effectively prolongs the on-hold time of the thin film transistor in the display panel after shutdown of the system, ensures the sufficient release of the charges stored in the liquid crystal capacitor of the display panel, and improves the shutdown ghost phenomenon of the display panel of the liquid crystal display device.
The utility model provides a display panel drive circuit still connects reserve first grid drive signal generating circuit at level shift circuit's first grid drive signal input, provide reserve first grid drive signal after shutting down, make level shift circuit's first grid drive signal input receive first grid drive signal and reserve first grid drive signal input simultaneously after shutting down, guarantee level shift circuit can also receive the input of the first grid drive signal that the level is enough high after shutting down, with the high level time of the grid drive signal of extension output, the extension is to the open time of the thin film transistor in the display panel, guarantee liquid crystal capacitor's abundant discharge, improve the ghost phenomenon of shutting down.
The utility model also provides a liquid crystal display device, including connecting between main circuit board and display panel the utility model discloses a display panel drive circuit can effectively improve the incomplete shadow phenomenon of shutting down.
In accordance with the embodiments of the present invention as set forth above, these embodiments are not exhaustive and do not limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, to thereby enable others skilled in the art to best utilize the invention and its various embodiments with various modifications as are suited to the particular use contemplated. The present invention is limited only by the claims and their full scope and equivalents.
Claims (10)
1. The utility model provides a display panel drive circuit, display panel is including being the thin film transistor of array arrangement which characterized in that includes: the driving circuit comprises a driving power supply, a level conversion circuit and a standby first grid driving signal generating circuit;
the level conversion circuit comprises a first grid driving signal input end and a grid driving signal output end, and the grid driving signal output end is connected with the grid driving signal input end of the display panel;
the driving power supply comprises a first grid driving signal output end, and a first grid driving signal input end of the level conversion circuit is connected with the first grid driving signal output end so as to output a first grid driving signal to control the opening of the thin film transistor;
the standby first gate driving signal generating circuit comprises a standby first gate driving signal output end and a detection signal input end, the standby first gate driving signal output end is connected with the first gate driving signal input end of the level conversion circuit, and the detection signal input end is connected with the power signal input end of the driving power supply so as to output a standby first gate driving signal when the power signal of the driving power supply is reduced to a threshold value.
2. The display panel driving circuit according to claim 1, wherein the standby first gate driving signal generating circuit comprises:
the first input end of the boosting unit is connected to the backlight driving voltage output end of the main circuit board through a transistor;
the comparator comprises a first input end, a reference signal input end and a comparison signal output end which are connected with the driving power supply signal output end of the main circuit board, the comparison signal output end is connected to the grid electrode of the thin film transistor, the first input end of the comparator is the detection signal input end of the standby first grid electrode driving signal generating circuit,
and the signal output end of the driving power supply of the main circuit board is connected with the signal input end of the driving power supply.
3. The display panel driving circuit according to claim 2, wherein the standby first gate driving signal generating circuit further comprises:
and the resistor is connected between the grid electrode of the thin film transistor and the backlight driving voltage output end of the main circuit board.
4. The display panel drive circuit according to claim 3,
the thin film transistor is a PMOS tube.
5. The display panel drive circuit according to claim 2,
the boosting unit comprises an enabling end connected with a first grid driving signal output end of the driving power supply.
6. The display panel drive circuit according to claim 5,
the enabling end of the boosting unit is also grounded through a capacitor.
7. The display panel driving circuit according to claim 2, wherein the standby first gate driving signal generating circuit further comprises:
and the low dropout regulator comprises an input end connected with the backlight driving voltage output end of the main circuit board and a reference signal output end connected to the reference signal input end of the comparator.
8. The display panel drive circuit according to claim 7,
the low dropout regulator further comprises an enabling end connected with the first grid driving signal output end of the driving power supply.
9. The display panel driving circuit according to any one of claims 1 to 8, further comprising:
and the diode is connected between the first grid driving signal output end of the driving power supply and the first grid driving signal input end of the level conversion circuit in series in the forward direction.
10. A liquid crystal display device includes a main circuit board and a display panel, and is characterized by further including:
the display panel drive circuit according to any one of claims 1 to 9, connected between the main circuit board and the display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022946193.3U CN213904902U (en) | 2020-12-08 | 2020-12-08 | Display panel drive circuit and liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022946193.3U CN213904902U (en) | 2020-12-08 | 2020-12-08 | Display panel drive circuit and liquid crystal display device |
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| Publication Number | Publication Date |
|---|---|
| CN213904902U true CN213904902U (en) | 2021-08-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202022946193.3U Active CN213904902U (en) | 2020-12-08 | 2020-12-08 | Display panel drive circuit and liquid crystal display device |
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| CN (1) | CN213904902U (en) |
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