WO2020244309A1

WO2020244309A1 - Pixel driving circuit and driving method therefor, and display panel and storage medium

Info

Publication number: WO2020244309A1
Application number: PCT/CN2020/084509
Authority: WO
Inventors: 陈瑶; 高超; 李海燕; 陈燕武; 古涛
Original assignee: 京东方科技集团股份有限公司; 重庆京东方光电科技有限公司
Priority date: 2019-06-05
Filing date: 2020-04-13
Publication date: 2020-12-10
Also published as: CN110164361B; CN110164361A

Abstract

A pixel driving circuit and a driving method therefor, and a display panel and a storage medium. The pixel driving circuit comprises a charging sub-circuit (110) and a voltage stabilizing sub-circuit (120); a pre-charging signal end (PCH) and a scanning signal end (PGate) connected in parallel are electrically connected to a first input end (110a) of the charging sub-circuit (110), respectively; a second input end (110b) of the charging sub-circuit (110) is electrically connected to a data signal end (Pdata); an output end (110c) is electrically connected to a first input end (120a) of the voltage stabilizing sub-circuit (120); a second input end (120b) of the voltage stabilizing sub-circuit (120) is electrically connected to a power supply voltage (VDD) by means of a pixel transistor (130); an output end (120c) is electrically connected to a common voltage (Vss); the pixel driving circuit conducts the charging sub-circuit (110) by means of an input pre-charging signal and pre-charges the voltage stabilizing sub-circuit (120) by means of a first data signal (Data1) input by the charging sub-circuit (110); and a first voltage value (V1) of the pre-charged voltage stabilizing sub-circuit (120) is smaller than or equal to a threshold voltage (Vth).

Description

Pixel driving circuit and driving method thereof, as well as display panel and storage medium

This application claims the priority of a Chinese patent application filed with the Chinese Patent Office on June 5, 2019, the application number is 201910487031.7, and the invention title is "a pixel driving circuit and its driving method, and a display panel". The content should be understood It is incorporated into this application by reference.

Technical field

The embodiments of the present application relate to, but are not limited to, a pixel driving circuit and a driving method thereof, as well as a display panel and a storage medium.

Background technique

With the development and wide application of display technology, display devices can be configured with different types of light-emitting devices. Based on the higher requirements of users for display effects, display devices are developing in the direction of higher resolution and refresh frequency.

Micro LED (Light Emitting Diode, abbreviated as: LED) (ie, Micro LED) is the miniaturization of LED arrays. In a display panel that uses Micro LEDs as light-emitting devices (hereinafter referred to as: Micro LED panels), each Micro LED can be regarded as a pixel (Pixel), which can drive and light each Micro LED individually, which is compared with liquid crystal display devices ( Liquid Crystal Display (referred to as LCD) and Organic Electroluminance Display (referred to as OLED), Micro LED panels have high efficiency, pure light color, moderate voltage, low power consumption, long life, and reliability Durable and other advantages.

Summary of the invention

The following is an overview of the topics detailed in this article. This summary is not intended to limit the scope of protection of the claims.

On the one hand, an embodiment of the present application provides a pixel driving circuit, including: a charging sub-circuit and a stabilizing sub-circuit;

The pre-charge signal terminal and the scan signal terminal in parallel are electrically connected to the first input terminal of the charging sub-circuit, the second input terminal of the charging sub-circuit is electrically connected to the data signal terminal, and the output terminal of the charging sub-circuit Electrically connected to the first input terminal of the voltage stabilizing sub-circuit;

The second input terminal of the voltage stabilizing sub-circuit is electrically connected to the power supply voltage through a pixel transistor, and the output terminal of the voltage stabilizing sub-circuit is electrically connected to the common voltage;

The pixel driving circuit is configured to turn on the charging sub-circuit through a pre-charge signal input from the first input terminal of the charging sub-circuit, and to input through the second input terminal of the turned-on charging sub-circuit The first data signal precharges the voltage stabilizing sub-circuit. After precharging, the first voltage value of the first input terminal of the voltage stabilizing sub-circuit is less than or equal to the threshold voltage for turning on the voltage stabilizing sub-circuit.

In an exemplary embodiment, in the pixel driving circuit described above, the charging sub-circuit includes: a first N-type metal oxide semiconductor NMOS transistor, and the gate of the first NMOS transistor is electrically connected to the charging The first input terminal and the drain of the electronic circuit are electrically connected to the second input terminal of the charging sub-circuit, and the source electrode is electrically connected to the output terminal of the charging sub-circuit.

In an exemplary embodiment, in the pixel drive circuit as described above, the voltage stabilizing sub-circuit includes: a voltage stabilizing capacitor and a pixel drive transistor, and the anode of the voltage stabilizing capacitor and the gate of the pixel drive transistor are parallel. Is electrically connected to the output terminal of the charging sub-circuit, the negative electrode of the voltage stabilizing capacitor and the source of the pixel driving transistor are electrically connected to the common voltage in parallel, and the drain of the pixel driving transistor is electrically connected to The cathode of the pixel transistor and the anode of the pixel transistor are electrically connected to the power supply voltage.

In an exemplary embodiment, in the pixel driving circuit described above, the voltage value of the first data signal is less than or equal to the first voltage value.

In an exemplary embodiment, in the pixel driving circuit described above, the pixel driving circuit further includes:

A switch sub-circuit connected between the first input terminal of the voltage stabilizing sub-circuit and the gate of the pixel driving transistor, and the first input terminal of the switch sub-circuit is electrically connected to a reference signal terminal configured to output a reference signal. Connected, the second input terminal of the switch sub-circuit is electrically connected to the first input terminal of the voltage stabilizing sub-circuit, and the output terminal of the switch sub-circuit is electrically connected to the gate of the pixel driving transistor;

The pixel driving circuit is further configured to turn off the switch sub-circuit when the reference signal indicates that the charging sub-circuit is turned on by the pre-charge signal, and when the reference signal indicates that the charging sub-circuit is turned off When the scan signal is turned on, the switch sub-circuit is turned on.

In an exemplary embodiment, in the pixel driving circuit described above, the switch sub-circuit includes a P-type metal oxide semiconductor PMOS transistor and a second NMOS transistor, and the gate of the PMOS transistor is electrically connected to the switch. The first input terminal of the sub-circuit, the source is electrically connected to the power supply voltage, the drain is electrically connected to the gate of the second NMOS transistor, and the drain of the second NMOS transistor is electrically connected to the switch sub-circuit The source of the second input terminal is electrically connected to the output terminal of the switch sub-circuit;

The pixel driving circuit is further configured to provide a high level to the reference signal to disconnect the PMOS transistor and the second NMOS transistor when the precharge signal turns on the charging sub-circuit, and When the clock electrical signal turns on the charging sub-circuit, a low level is provided to the reference signal to turn on the PMOS transistor and the second NMOS transistor.

In an exemplary embodiment, in the pixel driving circuit described above, the voltage value of the first data signal is greater than the first voltage value.

In yet another aspect, an embodiment of the present application also provides a driving method of a pixel driving circuit. The driving method is executed by using the pixel driving circuit as described in any one of the above, and the driving method includes:

Turn on the charging sub-circuit by inputting a pre-charge signal to the charging sub-circuit in the first time period;

The turned-on charging sub-circuit pre-charges the voltage-stabilizing sub-circuit through the input first data signal. After pre-charging, the first voltage value of the first input terminal of the voltage-stabilizing sub-circuit is less than or equal to The threshold voltage of the voltage stabilizing sub-circuit.

In an exemplary embodiment, the driving method of the pixel driving circuit as described above further includes:

Turning on the charging sub-circuit by inputting a scan signal to the charging sub-circuit in the second time period;

The turned-on charging sub-circuit charges the voltage stabilizing sub-circuit through the input second data signal to turn on the voltage stabilizing sub-circuit and turn on the pixel transistor. After the pixel transistor is turned on, the stable The second voltage value of the first input terminal of the voltage sub-circuit is equal to the voltage value of the second data signal.

In an exemplary embodiment, in the driving method of the pixel driving circuit as described above,

The charging time in the second time period is:

t2≈RC*Ln[(V _data -V ₁ )/(V _data -aV _data )];

Wherein, the RC is the charging constant of the voltage stabilizing capacitor, the V _data is the target voltage value at which the voltage stabilizing sub-circuit is charged in the second time period, and the V ₁ is the voltage stabilizing sub-circuit The initial voltage value of the circuit in the second time period, where a is the charging saturation coefficient of the voltage stabilizing sub-circuit.

The first time period is the time period from after the falling edge of the frame end signal of each frame to the falling edge of the frame start signal of the next frame, or the first time period is from the preset time to the first The time period between the falling edges of the frame start signal of one frame;

The second time period is a preset time after the rising edge or the falling edge of the frame start signal of each frame until the voltage value of the voltage stabilizing sub-circuit for display charging reaches the voltage value of the second data signal The time period between.

The voltage value of the first data signal in the first time period is less than or equal to the first voltage value.

In an exemplary embodiment, in the driving method of the pixel drive circuit as described above, the voltage stabilizing sub-circuit includes a charging voltage stabilizing capacitor and a pixel drive transistor, and the anode of the voltage stabilizing capacitor and the pixel drive transistor The gate is electrically connected in parallel to the output terminal of the charging sub-circuit, the negative electrode of the voltage stabilizing capacitor and the source of the pixel driving transistor are electrically connected in parallel to the common voltage, and the drain of the pixel driving transistor Is electrically connected to the cathode of the pixel transistor, and the anode of the pixel transistor is electrically connected to the power supply voltage; the voltage value of the first data signal in the first time period is greater than the first voltage value, the The pixel drive circuit also includes:

A switch sub-circuit connected between the first input terminal of the voltage stabilizing sub-circuit and the gate of the pixel driving transistor, and the first input terminal of the switch sub-circuit is electrically connected to a reference signal terminal configured to output a reference signal. The second input terminal is electrically connected to the first input terminal of the voltage stabilizing sub-circuit, and the output terminal is electrically connected to the gate of the pixel driving transistor; the driving method further includes:

Instructing to disconnect the switch sub-circuit by the output reference signal in the first time period, thereby disconnecting the voltage stabilizing sub-circuit;

In the second time period, the output reference signal indicates to turn on the switch sub-circuit, thereby turning on the voltage stabilizing sub-circuit.

In another aspect, an embodiment of the present application further provides a display panel, including: pixel transistors arranged in an array, and the pixel driving circuit according to any one of the foregoing;

The pixel transistors are electrically connected to the pixel driving circuit in a one-to-one correspondence, wherein the pixel transistors in the i-th row and the j-th column are coupled to the scan line of the i-th row through the corresponding pixel driving circuit, and are connected to the data in the j-th column.线连接。 Line coupling.

In another aspect, an embodiment of the present application also provides a computer-readable storage medium, the computer-readable storage medium stores executable instructions, and when the executable instructions are executed by a processor, the above The driving method of the pixel driving circuit.

After reading and understanding the drawings and detailed description, other aspects can be understood.

Description of the drawings

The accompanying drawings are used to provide an understanding of the technical solutions of the embodiments of the present application, and constitute a part of the specification, and are used to explain the technical solutions together with the embodiments of the present application, and do not constitute a limitation to the technical solutions.

Fig. 1 is a schematic structural diagram of a pixel driving circuit;

2 is a schematic structural diagram of a pixel driving circuit provided by an embodiment of the application;

Figure 3 shows a schematic diagram of a display sequence in the display panel;

FIG. 4 is a schematic diagram of a display sequence of driving a display panel by using the pixel driving circuit provided by the embodiment of the present application;

FIG. 5 is a schematic structural diagram of another pixel driving circuit provided by an exemplary embodiment;

FIG. 6 is a schematic structural diagram of yet another pixel driving circuit provided by an exemplary embodiment;

FIG. 7 is a schematic structural diagram of yet another pixel driving circuit provided by an exemplary embodiment;

FIG. 8 is a schematic diagram of another display sequence of driving the display panel by using the pixel driving circuit provided by the embodiment of the present application;

FIG. 9 is a flowchart of a driving method of a pixel driving circuit according to an embodiment of the application;

FIG. 10 is a flowchart of another driving method of a pixel driving circuit according to an embodiment of the application;

FIG. 11 is a schematic structural diagram of a display panel provided by an embodiment of the application.

Detailed ways

Hereinafter, the embodiments of the present application will be described in detail with reference to the drawings. In the case of no conflict, the embodiments of the application and the features in the embodiments can be combined with each other arbitrarily.

The steps shown in the flowchart of the drawings may be executed in a computer system such as a set of computer-executable instructions. And, although a logical sequence is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than here.

In some technologies, the pixel drive circuit of the Micro LED panel has the following problems: The gate of the drive thin film transistor (Drive Thin Film Transistor, referred to as DTFT) that controls the Micro LED current has a large voltage-stabilizing capacitance and a small charging current. As a result, the charging time is long. Therefore, the above-mentioned pixel driving circuit is not suitable for display panels with high resolution and high refresh rate.

FIG. 1 is a schematic structural diagram of a pixel driving circuit. As shown in FIG. 1, the pixel driving circuit is, for example, a pixel driving circuit in a Micro LED panel. The pixel driving circuit includes a transistor T1, a capacitor C1, a pixel driving transistor DTFT, and a light emitting transistor D1. The D1 is, for example, a Micro LED transistor. Wherein, T1 and DTFT are, for example, N-Metal-Oxide-Semiconductor (NMOS) transistors, and the gate of T1 is connected to the scan line of the display panel for access to the scan signal Gate and drain. The data line connected to the display panel is used to access the data signal Data. The source is connected in parallel to the positive electrode of the capacitor C1 and the gate of the DTFT. The negative electrode of the capacitor C1 and the source of the DTFT are connected to the common voltage V _{SS in} parallel. The voltage V _{SS is,} for example, a low voltage, the drain of the DTFT is connected to the cathode of the light-emitting transistor D1, and the anode of the light-emitting transistor D1 is connected to the power supply voltage V _DD , and the V _{DD is,} for example, a high voltage.

The working principle of the pixel driving circuit shown in Figure 1 is: after the scan signal Gate turns on T1, the data signal Data charges the capacitor C1 from 0 volts (V) to the turn-on voltage V _{th of the} DTFT. At this time, the DTFT turns on and can Turn on D1, the capacitor C1 continues to charge, from V _th to the voltage value of the data signal Data (ie V _data ), the V _data is the voltage at which the DTFT is turned on; the scan signal Gate is off, and the capacitor C1 is regulated to V _data until the current End of frame. Since the display brightness of the Micro LED is related to the current, and the current is related to the opening degree of the DTFT, the display brightness of the Micro LED can be controlled by controlling the opening degree of the DTFT, that is, controlling the size of V _data . However, for the pixel driving circuit shown in Figure 1, to charge the capacitor C1 until the DTFT is turned on and continue to be charged to the current that the DTFT controls the Micro LED (ie D1), the capacitor C1 needs to be charged from 0V to V _data , and the charging current is usually relatively high. Small, in this way, the charging time of the capacitor C1 will be longer, so that the pixel driving circuit has a poor range of application and is not suitable for display panels with high resolution and high refresh frequency.

The following embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

FIG. 2 is a schematic structural diagram of a pixel driving circuit provided by an embodiment of the application. The pixel driving circuit 100 provided in this embodiment may include: a charging sub-circuit 110 and a voltage stabilizing sub-circuit 120.

In the pixel drive circuit 100 of the embodiment of the present application, the parallel precharge signal terminal P _CH and the scan signal terminal P _Gate are electrically connected to the first input terminal 110a of the charging sub-circuit 110, and the second input terminal of the charging sub-circuit 110 110b is electrically connected to the data signal terminal P _Data , and the output terminal 110c is connected to the first input terminal 120a of the voltage stabilizing sub-circuit 120. The scan signal terminal P _Gate in the pixel driving circuit 100 may be configured to output a scan signal Gate, which scan signal Gate may be a signal for controlling the pixel transistor 130 in the display panel to turn on, and the precharge signal terminal P _CH may be configured to output a precharge Signal CH, and the above-mentioned parallel precharge signal terminal P _CH and scanning signal terminal P _Gate can be set to output the scanning signal Gate or precharge signal CH; in addition, the data signal terminal P _Data in the above pixel driving circuit 100 can be set to The data signal is output, and the voltage value of the output data signal may be different in different time periods when the pixel driving circuit 100 operates.

In addition, in the embodiment of the present application, the second input terminal 120b of the voltage stabilizing sub-circuit 120 is electrically connected to the power supply voltage V _DD through the pixel transistor 130, and the output terminal 120c is electrically connected to the common voltage V _SS .

Based on the structure of the pixel driving circuit 100 shown in FIG. 2, the pixel driving circuit 100 in the embodiment of the present application is configured to conduct the charging sub-circuit 110 through the pre-charge signal CH input from the first input terminal 110a of the charging sub-circuit 110, And pre-charge the voltage stabilizing sub-circuit 120 through the first data signal Data1 input from the second input terminal 110b of the turned-on charging sub-circuit 110. After precharging, the first input terminal 120a of the stabilizing sub-circuit 120 is A voltage value V _{1 is} less than or equal to the threshold voltage V _th for turning on the voltage stabilizing sub-circuit 120. In the embodiment of the present application, when the charging sub-circuit 110 is turned on by the pre-charging signal _CH input through the pre-charging signal terminal P _CH , the first data signal Data1 output by the data signal terminal P _Data functions to affect the voltage stabilizing sub-circuit 120 Pre-charging is performed, and in this working state, the pixel driving circuit 100 is required to not conduct the voltage stabilizing sub-circuit 120.

With reference to FIG. 2, it can be seen that in the pixel driving circuit 100 provided by the embodiment of the present application, the first input terminal 110a of the charging sub-circuit 110 is not only electrically connected to the scanning signal terminal P _Gate , but also electrically connected to the scanning signal terminal P _Gate. The parallel precharge signal terminal P _CH , that is, through the first input terminal 110a of the charging sub-circuit 110, not only the scan signal Gate can be input, but also the precharge signal CH can be input, and the above two signal terminals (P _Gate and P _CH ) pass The signal input from the first input terminal 110a of the charging sub-circuit 110 is not input at the same time, but is input in time sharing. In practical applications, the first input terminal 110a can be connected to the scan line and the precharge signal line of the display panel respectively. In addition, in the pixel driving circuit 100, the voltage level (ie The voltage at point N1) is used to control the display brightness of the pixel transistor 130, that is, to control the current of the pixel transistor 130.

As shown in FIG. 2 for the pixel driving circuit 100, since the first input terminal 110a of the charging sub-circuit 110 can input the precharge signal CH, and the charging method can include two stages, namely the precharge stage and the charging stage for normal display ( Hereinafter referred to as: display charging stage), where the working principle of the pre-charging stage is: in the pre-charging time period t1, the pre-charging signal CH is pulled high to turn on the charging sub-circuit 110 and pass the second input terminal 110b Input the first data signal Data1 to charge the voltage stabilizing sub-circuit 120. Since the pixel transistor 130 will not be lit during the pre-charging phase, the voltage value of the first data signal Data1 input in the pre-charging phase can be set to be less than or equal to the threshold The voltage V _th , that is, the first voltage value V ₁ of the voltage stabilizing sub-circuit 120 after precharging is also less than or equal to the threshold voltage V _th , as shown in FIG. 2, the voltage value of the node N1 in the pixel driving circuit 100, V(N1) Is V ₁ .

When the pixel driving circuit 100 provided by the embodiment of the present application is used to drive the pixel transistor 130 of the display panel, the pre-charging process in the pre-charging stage can be performed during a period of time before the pixel transistor 130 is turned on in each frame. After the pre-charging is completed, the first voltage value V _{1 of the} voltage stabilizing sub-circuit 120 can reach or be close to its threshold voltage V _th . In this way, after the display charging phase is turned on, the requirement for charging the voltage stabilizing sub-circuit 120 is: Charge from V ₁ to V _data , after adding the pre-charge stage, the principle of controlling the current of the pixel transistor 130 is: charge the voltage stabilizing sub-circuit 120, and the charging method is from V ₁ to V _data , which is compared with that shown in Fig. 1 In the pixel driving circuit shown, the principle of controlling the current of the light-emitting transistor D1 is: charging the capacitor C1, and the charging method is from 0V to V _data ; the pixel driving circuit 100 provided by the embodiment of the present application can reduce the stability of the display charging stage. It can be seen that the voltage variable required to be charged during the charging phase of the voltage sub-circuit 120 is reduced by V ₁ , so that the charging time of the voltage-regulating sub-circuit 120 can be greatly reduced.

Fig. 3 shows a schematic diagram of a display timing in a display panel. The timing for scanning pixel transistors in the display panel usually includes: a frame start signal (Start Vertical, referred to as STV), a frame end signal (Reset, referred to as : RST), scan signal Gate and data signal Data, and Figure 3 illustrates the influence of the charging method on the voltage value of node N1 in the circuit. Among them, RST is pulled high at the end of each frame, and Gate is pulled high at the same time to discharge the pixel transistors in the display panel. After the discharge ends, RST is pulled low, and the next frame starts after a certain period of time. STV is pulled high to indicate that the current frame is turned on. Pull it high for a preset time period and then pull it low, and then start to turn on the pixel transistor through the Gate, where the time period when STV is pulled high and the time period between when STV is pulled high and Gate is pulled high can be set by software in advance. In the pixel drive circuit shown in Figure 1, the capacitor C1 is charged only by the scan signal Gate and the DTFT set to control the current of D1 is turned on. Therefore, the turn-on time of the entire pixel drive circuit also starts from the moment Gate is pulled high, that is The capacitor C1 is charged from the moment of the dotted line in Figure 3, and the current of the light-emitting transistor D1 can be controlled when the charging is from 0V to V _data . The charging time is longer, and the time within one frame is longer, which is not suitable for high resolution And high refresh rate display panel.

FIG. 4 is a schematic diagram of a display sequence of driving a display panel using a pixel driving circuit provided by an embodiment of the application. The display sequence shown in FIG. 4 adopts the pixel driving circuit 100 provided by the embodiment of the application in combination with the display panel shown in FIG. 3 Figure 4 also illustrates the frame start signal STV, frame end signal RST, scan signal Gate, and data signal Data, and also illustrates how the charging method of the pixel drive circuit 100 affects the voltage value of the node N1 in the circuit. influences. Since the pixel driving circuit 100 in the embodiment of the present application has added a precharge function, that is, before the scan signal Gate is pulled high, the voltage regulator sub-circuit 120 can be charged to a certain voltage value (that is, the first voltage value) in advance through the precharge signal. V ₁ ), combined with the display timing in FIG. 3, after the RST of each frame is pulled low, that is, after the discharge of each frame is completed, the voltage stabilizing sub-circuit 120 for turning on the next frame can be precharged, such as the previous one. After the RST of the frame is pulled low for a short period of time, the precharge signal CH is pulled high to turn on the charging sub-circuit 110, and the first data signal Data1 is input through the second input terminal 110b to charge the voltage stabilizing sub-circuit 120, After the STV charged to the current frame is pulled down, the precharging process ends. For example, the voltage value of the first data signal Data1 is set to be less than or equal to the threshold voltage V _th , that is, the first voltage value V ₁ of the voltage stabilizing sub-circuit 120 after precharging is also Less than or equal to the threshold voltage V _th , the above-mentioned pre-charge time period is t1; after the pre-charge is finished, that is, after STV and CH are pulled low, there may be a short period of time before the Gate is pulled high. Pulled low, the charging sub-circuit 110 is disconnected, and the second input terminal 110b does not input a data signal; then, after the Gate is pulled high, display charging starts.

Comparing the display timing shown in FIG. 3 with the display timing shown in FIG. 4 driven by the pixel driving circuit 100 provided in the embodiment of the present application, it can be seen that:

First, using the pixel driving circuit 100 provided by the embodiment of the present application, before the Gate is turned on, the voltage value of the voltage stabilizing sub-circuit 120 (equivalent to the voltage value of the node N1 in FIG. 4) has reached V ₁ , and the V _{1 is} less than Or equal to the threshold voltage V _th , the voltage regulator sub-circuit 120 will not be turned on, that is, the pixel transistor 130 will not be turned on;

Second, after the Gate is turned on, the way to charge the voltage regulator sub-circuit 120 is to charge from V ₁ to V _data to reach the current that controls the pixel transistor 130. You can refer to the voltage value of N1 in FIG. 3 and FIG. 4, in FIG. Gate N1 pulled in at the time of 0V, FIG. 4, N1 is pulled high at time Gate V _1, N1 reaches 0V V _data from greater than N1 from time to time to reach V ₁ of V _data;

Third, the pixel driving circuit 100 provided by the application embodiment is used for precharging, and the display timing in the display panel shown in FIG. 3 is used. The precharging starts before the current frame is turned on, without occupying the effective display time of the current frame. Through reasonable planning of the precharge time, the pixel driving circuit 100 and the pixel transistor 130 can be applied to a display panel with high resolution and high refresh rate.

The pixel driving circuit 100 provided by the embodiment of the present application includes a charging sub-circuit 110 and a voltage stabilizing sub-circuit 120. The pre-charge signal terminal P _CH and the scanning signal terminal P _Gate connected in parallel are electrically connected to the first input terminal 110a of the charging sub-circuit 110. The second input terminal 110b of the charging sub-circuit 110 is electrically connected to the data signal terminal P _Data , the output terminal 110c is electrically connected to the first input terminal 120a of the voltage stabilizing sub-circuit 120, and the second input of the voltage stabilizing sub-circuit 120 is The terminal 120b is electrically connected to the power supply voltage V _DD through the pixel transistor 130, and the output terminal 120c is electrically connected to the common voltage V _SS . The pixel driving circuit 100 of the above structure can be precharged through the first input terminal 110a of the charging sub-circuit 110. CH turns on the charging sub-circuit 110, and pre-charges the voltage stabilizing sub-circuit 120 through the first data signal Data1 input from the second input terminal 110b of the turned-on charging sub-circuit 110. The first voltage value V ₁ of the first input terminal 120a of 120 is less than or equal to the threshold voltage V _th for turning on the voltage stabilizing sub-circuit 120; the pixel driving circuit 100 provided by the embodiment of the application is used in combination with the display shown in FIG. 3 Before the pixel transistor 130 is displayed and driven, that is, in the first period of time before the scanning signal Gate is turned on, the voltage stabilizing sub-circuit 120 is precharged by the precharge signal CH, so that the precharged first voltage value V _{1 is} not greater than its threshold voltage V _th , so that when the scan signal Gate is turned on, the voltage regulator sub-circuit 120 is charged and charged to the voltage value V _data that controls the current of the pixel transistor 130, which is determined by the first voltage value V ₁ (V _{1 is} less than or Equal to V _th ) is charged to V _data , instead of charging from 0V to V _data , the charging time of the voltage stabilizing sub-circuit 120 in the display charging stage can be greatly reduced. Therefore, the pixel driving circuit 100 and its driving The pixel transistor 130 has a wide range of applications, and can be applied to a display panel with high resolution and high refresh rate.

The foregoing embodiment of the present application has described the working mode of the pixel driving circuit 100 in the precharge phase. In practical applications, the above-mentioned pixel driving circuit 100 provided by the embodiment of the present application is further configured to conduct the charging sub-circuit 110 through the scanning signal Gate input from the first input terminal 110a of the charging sub-circuit 110, and pass the turned-on charging sub-circuit 110. The second data signal Data2 input from the second input terminal 110b of the electronic circuit 110 charges the voltage stabilizing sub-circuit 120 to turn on the voltage stabilizing sub-circuit 120 and turn on the pixel transistor 130. After the pixel transistor 130 is turned on, the voltage stabilizing sub-circuit The second voltage value of the first input terminal 110a of the circuit 120 is equal to the voltage value of the second data signal Data2, and the voltage value of the second data signal Data2 is the voltage value V _data for controlling the current of the pixel transistor 130. In the embodiment of the present application, when the charging sub-circuit 110 is turned on by the scan signal _Gate input through the scan signal terminal P _Gate , the second data signal Data2 output by the data signal terminal P _Data controls the brightness of the pixel transistor 130 when it is turned on. In this working state, the pixel driving circuit 100 is required to turn on the voltage stabilizing sub-circuit 120 and light up the pixel transistor 130.

The foregoing charging process through the scanning signal Gate is the working process of the pixel driving circuit 100 in the display charging phase. The working principle of the display charging phase is: in the display charging time period t2, the scanning signal Gate is pulled high to turn on the charging. In the electronic circuit 110, the second data signal Data2 input through the second input terminal 110b turns on the voltage stabilizing sub-circuit 120. If the voltage value V _{data of} the second data signal Data2 is greater than V _th , the voltage stabilizing sub-circuit 120 changes from V ₁ When charging to V _data , compared to charging the DTFT from 0V to V _data in the driving circuit, the charging time is greatly saved. If V _{data is} less than V _th , the voltage regulator sub-circuit 120 will not be turned on.

In practical applications, after the voltage stabilizing sub-circuit 120 is charged to the voltage value V _data for controlling the current of the pixel transistor 130, the voltage stabilizing voltage is V _data (V _data >V _th) during the period when the pixel transistor 130 is lit in one frame. ), the pixel transistor 130 off after the lighting period to the regulator V ₁ of each end of preceding frame. After the end of one frame, RST is pulled high, and after the voltage stabilizing sub-circuit 120 is discharged to 0V, RST is pulled low again, and then the pre-charging process of the next frame is started. The above-mentioned pre-charging, display charging, and stabilizing are repeated until the end of one frame and one frame. The discharge process after the end of the frame.

FIG. 5 is a schematic structural diagram of another pixel driving circuit provided by an exemplary embodiment. A pixel provided in this embodiment of the drive circuit 100, the electronic circuit 110 may charge comprises: a first NMOS transistor 111, the gate G ₁ of the first NMOS transistor 111 is electrically connected to the electronic circuit 110 of a first charging input terminal 110a, a drain The electrode D _{1 is} electrically connected to the second input terminal 110 b of the charging sub-circuit 110, and the source electrode S _{1 is} electrically connected to the output terminal 110 c of the charging sub-circuit 110.

The electronic circuit 110 in the charging structure shown in FIG. 5, the gate G ₁ of the first NMOS transistor 111 are connected to the precharge signal terminal and in parallel with the scanning signal P _CH P _Gate terminal electrically and in parallel via the two ports (P _gate _CH and P) open so that the precharge time sharing signal CH and the scanning signal gate output from the time division, the control of the first NMOS transistor 111 is turned on and off, when the gate G ₁ of the first NMOS transistor 111 having a high electric level signal when, for example, a pre-charge signal or a scanning signal Gate CH pulled up to the voltage of the first NMOS transistor 111 is turned on, the first NMOS transistor 111 is turned on, at this time, the drain D ₁ is electrically connected to the data line The data signal can be charged to the voltage stabilizing sub-circuit 120 through the first NMOS transistor 111.

In an exemplary embodiment, in the pixel driving circuit 100, the voltage stabilizing sub-circuit 120 may include: a voltage stabilizing capacitor 121 and a pixel driving transistor 122. The pixel driving transistor 122 may be, for example, an NMOS transistor. and a pixel drive transistor gate G _D 122 are electrically connected in parallel to the charge of the electronic circuit 110 is an output terminal 110c, the negative electrode 121 and the stabilizing capacitance pixel driving source electrode S of the transistor 122 is electrically connected to _D parallel to the common voltage V _SS, the drain D _D pixel drive transistor 122 is electrically connected to the cathode of the pixel transistor 130, the anode of the pixel transistor 130 is connected to supply voltage V _DD.

In the structure of the voltage stabilizing sub-circuit 120 of this embodiment, the turn-on voltage of the pixel driving transistor 122 is the threshold voltage V _th of the voltage stabilizing sub-circuit. When the voltage stabilizing sub-circuit 120 is charged to a value greater than the threshold voltage V _th , it is stable. capacitance 121 is charged to greater than the threshold voltage V _th, a pixel drive transistor 122 is turned on, the drain D _D and the source S _D is turned on, thereby turning the pixel transistor connected thereto 130, the current of the pixel transistor 130 (i.e., display luminance) It is controlled by the turn-on degree of the pixel driving transistor 122. In addition, the turn-on degree of the pixel driving transistor 122 is controlled by the regulated voltage V _{data of the} regulator sub-circuit 120. Therefore, the display brightness of the pixel transistor 130 can be controlled by controlling the voltage value V _{data of the} second data signal Data2.

In this embodiment, since the pre-charging phase of the pixel driving circuit 100 is configured in conjunction with the display timing shown in FIG. 3, the pixel transistor 130 will not be turned on during the pre-charging phase, that is, the pixel transistor 130 is required to be in the display charging phase (ie After opening Gate) is lit.

In an implementation of this embodiment, during the pre-charging control phase, the voltage value of the first data signal Data1 charged to the voltage stabilizing sub-circuit 120 may be less than or equal to the above-mentioned first voltage value V ₁ . It is realized that the pixel transistor 130 will not be turned on during the pre-charging phase. Since the first voltage value V _{1 is} less than or equal to the threshold voltage V _th , the voltage value of the voltage stabilizing sub-circuit 120 in the pre-charging phase is not greater than the threshold voltage V _th .

In another implementation of this embodiment, the voltage value of the first data signal Data1 for charging the voltage stabilizing sub-circuit 120 may be greater than the above-mentioned first voltage value V ₁ , because the charging of the voltage stabilizing sub-circuit 120 reaches V ₁ It takes a certain amount of time. The charging time of the voltage stabilizing sub-circuit 120 can be calculated to control the length of the time period t1 of the pre-charging stage, that is, by setting the duration of the pre-charging signal CH being pulled high, the voltage stabilizing sub-circuit 120 can be controlled in the pre-charge period. The first voltage value V ₁ during the charging phase. In this implementation manner, since the voltage value of the first data signal for pre-charging the voltage stabilizing sub-circuit 120 is relatively large, the time for this method to charge the voltage stabilizing sub-circuit 120 to reach V ₁ is also relatively small, for example, it is required to be stable. The first voltage value after the precharging of the voltage sub-circuit 120 is less than or equal to the threshold voltage V _th , V _th is set to 5V, and the first data signal with a voltage value of 5V or 10V is used to pre-charge the voltage stabilizing sub-circuit 120, The charging time required for the 10V first data signal to charge the voltage stabilizing sub-circuit 120 to 5V is relatively small. This implementation can further compress the precharge time in each frame, and improve the resolution and refresh rate of the display panel.

FIG. 6 is a schematic structural diagram of yet another pixel driving circuit provided by an exemplary embodiment. A pixel provided in this embodiment of the drive circuit 100, when the voltage value of the first data signal is greater than a first voltage value ₁ V, since the precharge time in order to avoid unreasonable resulting pixel transistor 130 is turned on to pre-charge phase, The pixel driving circuit 100 shown in FIG. 6 may further include:

The switch sub-circuit 140 is connected between the first input terminal 120a of the voltage stabilizing sub-circuit 120 and the gate G _{D of the} pixel driving transistor 122. The first input terminal 140a of the switch sub-circuit 140 is connected to a reference set to output a reference signal. The signal terminal is electrically connected, the second input terminal 140b is electrically connected to the first input terminal 120a of the voltage stabilizing sub-circuit, and the output terminal 140c is electrically connected to the gate G _{D of the} pixel driving transistor 122.

Based on the structure of the pixel driving circuit 100 shown in FIG. 6, the pixel driving circuit 100 provided in this embodiment is further configured to turn off the switching sub-circuit 140 when the reference signal indicates that the charging sub-circuit 110 is turned on by the pre-charging signal CH. The reference signal instructs the charging sub-circuit 110 to turn on the switch sub-circuit 140 when the scan signal Gate is turned on.

In this embodiment, the reference signal may indicate whether the input signal of the pixel driving circuit 100 currently turning on the charging sub-circuit 110 is the pre-charging signal CH or the scanning signal Gate, if the input signal currently turning on the charging sub-circuit 110 is the pre-charging signal CH In order to prevent the first data signal from precharging the voltage stabilizing sub-circuit 120, charging makes the voltage value of the voltage stabilizing sub-circuit 120 greater than V _th , in this pre-charging phase, the switch sub-circuit 140 can be turned off by the instruction of the reference signal, In this way, the pixel driving transistor 122 in the voltage regulator sub-circuit 120 will not be turned on, and therefore, the pixel transistor 130 will not be turned on.

FIG. 7 is a schematic structural diagram of still another pixel driving circuit provided by an exemplary embodiment. Based on the structure of the pixel driving circuit 100 shown in FIG. 6, the switch sub-circuit 140 in this embodiment may include: a P-Metal-Oxide-Semiconductor (PMOS) transistor 141 and a second 142, the two PMOS gate G _P NMOS transistor is electrically connected to the switching transistor 141 is a first sub-circuit input terminal 140a 140, the source S _P is electrically connected to supply voltage V _DD, the drain electrode D _P of the second NMOS transistor 142 ₂ is electrically connected to the gate G, the drain D ₂ of the second NMOS transistor 142 is electrically connected to the second input terminal of the switching sub-circuit 140 is 140b, the source S of the output terminal ₂ is electrically connected to the switching circuit 140 of the sub-140c, i.e., The source S _{2 is} electrically connected to the gate G _{D of the} pixel driving transistor 122.

Based on the structure of the pixel driving circuit 100 shown in FIG. 7, the pixel driving circuit 100 provided in this embodiment is further configured to provide a high level to the reference signal to turn off the PMOS transistor after the precharge signal CH turns on the charging sub-circuit 110 141 and the second NMOS transistor 142 provide a low level to the reference signal to turn on the PMOS transistor 141 and the second NMOS transistor 142 when the scan signal Gate turns on the charging sub-circuit 110.

In the pixel driving circuit 100 provided in this embodiment, the reference signal connected to the first input terminal 140a of the switch sub-circuit 140 is, for example, the frame start signal STV in the display timing shown in FIGS. 3 and 4, that is, the reference signal terminal can be P _STV , according to the change of the high level and the low level of the reference signal STV, the time period position of the pre-charging stage and the display charging stage can be known. As shown in FIG. 8, in order to provide a schematic diagram of another display timing of the pixel driving circuit driving the display panel using this embodiment, the display timing shown in FIG. 8 is added to the voltage value of node N2 in the pixel driving circuit 100 on the basis of FIG. . The timing of driving the pixel transistor 130 by using the pixel driving circuit 100 shown in FIG. 7 may be:

Pre-charge stage t1: Before the start of a frame (that is, before STV is pulled high), and after the discharge of the previous frame (that is, after RST is pulled low), the pre-charge stage is turned on. During the pre-charge period t1, STV is pulled high so that the second PMOS transistor 141 and NMOS transistor 142 are turned off, so that current does not reach 100 in FIG. 7 pixel driving circuit node N2, it can be seen in the voltage N1 is the time period t1 rises from 0V to V ₁ , The voltage of N2 is always 0V during t1, that is, the pixel driving transistor 122 will not be turned on during t1, and the pixel transistor 130 will not be turned on;

Time period t': In the display sequence, it is usually set to have a time period t'after the frame start signal of a frame is pulled low and before the first scanning signal Gate is pulled high, in which the duration of STV is pulled high The length of the time period t'can be configured by software, and it is required to end the pre-charging process before the scanning signal Gate is turned on; when STV is pulled low, it means that the pre-charging phase is over. Pulling STV low makes the PMOS transistor 141 and the second NMOS transistor 142 both Turn on, during the time period t', the precharge signal CH is pulled low, the first NMOS transistor 111 is turned off, and the charging sub-circuit 110 is turned off. During this time period t', the PMOS transistor 141 and the second NMOS transistor 142 are always on State, and V(N1)=V(N2)=V ₁ , and V _{1 is} less than or equal to V _th ;

Display charging stage t2: the scan signal Gate is pulled high, turning on the first NMOS transistor 111, the second data signal Data2 passes through the first NMOS transistor 111, and the pixel driving transistor 122 is turned on, and the voltage value of the second data signal Data2 to control the opening degree of the pixel drive voltage V _data transistor 122, if the second data Data2 signal V _data is greater than the voltage value V _th, the regulator sub-circuit 120 is charged from V ₁ to V _data, compared to the driving circuit The DTFT is charged from 0V to V _data , which greatly saves the charging time. If V _{data is} less than V _th , the pixel driving transistor 122 will not be turned on;

Voltage stabilization stage: After the end of t2, the voltage stabilizing capacitor 121 is regulated to V _data (V _data >V _th ) during the period when the pixel transistor 130 is lit in one frame time, and the rest of the period, that is, the pixel transistor 130 has not been scanned after scanning. During the lighting period, the voltage stabilizing capacitor 121 maintains the voltage value of V ₁ until the end of one frame when V _{data is} not output (that is, the voltage V _data of the second data signal Data2 is 0V). After the end of a frame, RST is pulled high, and after the voltage stabilizing capacitor 121 is discharged to 0V, RST is pulled low again, and then the pre-charging process of the next frame is started, and the above-mentioned pre-charging, display charging, and stabilizing are repeated until the end of one frame and one frame The discharge process after the end.

The input structure and manner of the frame end signal RST of each frame in the above multiple embodiments may be, as shown in FIG. 7, the pixel driving circuit 100 further includes a third NMOS transistor 150, and the drain D of the third NMOS transistor 150 _{3 is} electrically connected to a high voltage V _GH , the high voltage V _{GH is,} for example, 20V or above, the source S _{3 is} electrically connected to the scanning signal Gate, and the gate G _{3 is} electrically connected to the frame end signal terminal configured to output the frame end signal RST P _RST , at the end of each frame, the pixel transistors 130 in each row are discharged by pulling RST high, which is the discharging process described in the above-mentioned multiple embodiments. After the discharge, RST is pulled low to start the precharge phase of the next frame .

In the pixel driving circuit 100 provided by the foregoing multiple embodiments, the pixel transistor 130 may be a single-point driving Micro LED. Since the pixel driving circuit 100 has a pre-charging function, the pixel driving circuit 100 is applied to a display panel to form The pixel structure that can be charged in advance, through the pixel drive circuit 100 provided in the non-display area of the display panel, charge the voltage stabilizing capacitor 121 of the pixel drive transistor 122 that controls the Micro LED current in advance to reduce the charging time in the display phase. That is to say, the pixel drive circuit 100 provided in this embodiment can be applied to a display panel with high resolution and high refresh rate; that is, it solves the problem that the pixel drive circuit of the Micro LED panel drives the Micro LED due to the DTFT that controls the Micro LED current. The voltage stabilizing capacitance of the gate is relatively large, and the charging current is relatively small, which makes the charging time longer and causes the problem of low applicability of the pixel driving circuit.

In practical applications, since the pixel driving circuit 100 in the above-mentioned multiple embodiments has the function of pre-charging, the second data signal Data2 is used to apply the regulated voltage 121 to the gate G _D of the pixel driving transistor 122 that controls the current of the pixel transistor 130. The charging time for charging is calculated as follows:

The voltage of the stabilizing capacitor 121 at each moment is:

V _t =V ₀ +(V ₁ -V ₀ )*(1-e ^-t/RC ) (1)

According to formula (1), the charging time of the voltage stabilizing capacitor 121 is:

t=RC*Ln[(V ₁ -V ₀ )/(V ₁ -V _t )] (2)

In the above equations (1) and (2), t is any moment in the charging time period, V _t is the voltage value on the voltage stabilizing capacitor 121 after the time t has passed, and V ₁ is the voltage stabilizing capacitor 121 after charging is completed V ₀ is the initial voltage value of the voltage stabilizing capacitor 121, for example, it can be 0V, RC is the charging constant of the stabilizing capacitor 121, RC refers to the short circuit of the power supply part, and the charging circuit part (ie the voltage stabilizing sub-circuit 120 When the equivalent resistance value and equivalent capacitance value in ), the unit of R is ohm and the unit of C is farad, and the unit of RC time constant is second (s).

In addition, considering that the time required for the voltage stabilizing capacitor 121 to be fully saturated is infinite, after 3 RCs, it can be considered that the voltage stabilizing capacitor 121 is charged to 95%, that is, it is considered that the voltage stabilizing capacitor 121 is fully charged. Therefore, the voltage stabilizing capacitor that is not charged in advance in the pixel driving circuit is charged from 0V to the time period of V _data , and the pixel driving circuit 100 in the embodiment of the present application is charged in advance from V ₁ to the first of V _data . The two time periods t2 are:

T≈RC*Ln[(V _data -0)/(V _data -0.95V _data )] not charged in advance;

Pre-charged t2≈RC*Ln[(V _data -V ₁ )/(V _data -0.95V _data )];

Therefore, it can be concluded that with the pixel driving circuit 100 provided by the embodiment of the present application, the charging time that can be saved during the display charging stage is:

△t≈RC*Ln[V _data /(V _data -V ₁ )];

In practical applications, the RC value of the actual circuit design and the V _{th of the} pixel driving transistor 122 can be used to calculate the reduced charging time of the pixel driving circuit 100 during the display charging stage, as well as the refresh rate and resolution values that can be improved. .

Based on the pixel driving circuit 100 provided by the foregoing multiple embodiments, an embodiment of the present application also provides a driving method of a pixel driving circuit, which is executed by the pixel driving circuit 100 provided in any of the foregoing embodiments, as shown in FIG. 9 , A flowchart of a driving method of a pixel driving circuit provided by an embodiment of this application, the driving method includes the following steps:

S210: Turn on the charging sub-circuit by inputting a pre-charge signal to the charging sub-circuit in the first time period;

S220. The turned-on charging sub-circuit pre-charges the voltage-stabilizing sub-circuit through the input first data signal. After pre-charging, the first voltage value of the first input terminal of the voltage-stabilizing sub-circuit is less than or equal to the value used to turn on the voltage-stabilizing The threshold voltage of the sub-circuit.

The driving method provided by the embodiments of the present application can be executed by the pixel driving circuit 100 in any one of the implementations shown in FIG. 2 and FIG. 5 to FIG. 7. The structure of the pixel driving circuit 100 is implemented by each sub-circuit and electronic component. The function has been described in detail in the above multiple embodiments, so it will not be repeated here. In the driving method provided by the embodiment of the present application, the timing relationship between the precharge signal CH, the scan signal Gate, STV, and RST in the first time period t1, and the first input terminal 120a of the voltage stabilizing sub-circuit 120 (that is, the node in the circuit For the relationship between the voltage value of N1) and the above-mentioned sequence, refer to the display sequence shown in FIG. 4.

The driving process of the driving method provided by the embodiment of the present application has a pre-charging stage, and the working principle of the pre-charging stage is: in the pre-charging time period (that is, the first time period t1), the pre-charging signal CH is pulled high to The charging sub-circuit 110 is turned on, and the voltage stabilizing sub-circuit 120 is charged through the input first data signal Data1. Since the pixel transistor 130 will not be lit during the pre-charging phase, the first data input in the pre-charging phase can be set The voltage value of the signal Data1 is less than or equal to the threshold voltage V _th , that is, after precharging, the first voltage value V ₁ of the voltage stabilizing sub-circuit 120 is also less than or equal to the threshold voltage V _th , as shown in the pixel driving circuit 100 in FIG. 2 The voltage value of N1, that is, V(N1) is V ₁ .

When the pixel transistor 130 of the display panel is driven by the driving method provided by the embodiment of the present application, the above-mentioned pre-charging stage can be performed in a period of time before the pixel transistor 130 is turned on in each frame (ie, the first time period t1) The pre-charging process of S210-S220 is performed. In this way, after the pre-charging is completed, the first voltage value V _{1 of the} voltage stabilizing sub-circuit 120 can reach or approach its threshold voltage V _th . In this way, after the display charging phase is turned on, The requirement for charging the voltage stabilizing sub-circuit 120 is to charge from V ₁ to V _data . After the pre-charging phase is added, the principle of controlling the current of the pixel transistor 130 is: the voltage stabilizing sub-circuit 120 is charged, and the charging method is from V _{1 is} charged to V _data . Compared with the driving mode of the display panel shown in FIG. 1, the principle of controlling the current of the light-emitting transistor D1 is: charging the capacitor C1, and the charging mode is from 0V to V _data ; the implementation of this application The driving method provided in the example can reduce the voltage variable for charging the voltage regulator sub-circuit 120 during the display charging stage. It can be seen that the voltage variable required to be charged during the display charging stage is reduced by V ₁ , so that the voltage regulation can be greatly reduced. The charging time of the sub-circuit 120.

The difference between the display timing (shown in FIG. 4) of driving the pixel transistor 130 of the display panel using the driving method provided by the embodiments of the present application and the display timing shown in FIG. 3 has been described in detail in the above-mentioned multiple embodiments. This will not be repeated here.

The driving method of the pixel driving circuit provided in the embodiments of the present application is based on the hardware structure of the pixel driving circuit 100 provided in each of the above embodiments, and the charging sub-circuit 110 is turned on by inputting the pre-charge signal CH to the charging sub-circuit 110 in the first time period. Circuit 110, and the turned-on charging sub-circuit 110 pre-charges the voltage stabilizing sub-circuit 120 through the input first data signal Data1. After pre-charging, the first voltage of the first input terminal 120a of the voltage stabilizing sub-circuit 120 is The value V _{1 is} less than or equal to the threshold voltage V _th for turning on the voltage stabilizing sub-circuit 120; the driving method provided by the embodiment of the present application is used in conjunction with the display timing shown in FIG. In the first period of time before the signal Gate is turned on, the voltage stabilizing sub-circuit 120 is precharged by the precharge signal CH so that the precharged first voltage value V _{1 is} not greater than its threshold voltage V _th , so that the scanning is turned on The signal Gate charges the voltage stabilizing sub-circuit 120 and charges to the voltage value V _data that controls the current of the pixel transistor 130, which is charged from the first voltage value V ₁ (V _{1 is} less than or equal to V _th ) to V _data instead of 0V Charging to V _data can greatly reduce the charging time of the voltage stabilizing sub-circuit 120 in the display charging stage. Therefore, the driving method of the pixel driving circuit for the pixel transistor 130 has a wide range of application and can be applied Used in high resolution and high refresh rate display panels.

The driving method provided in this embodiment has already explained the working mode of the pixel driving circuit 100 in the precharge phase. In practical applications, the above-mentioned driving method provided in this embodiment may further include a display charging stage operation mode. As shown in FIG. 10, it is a flowchart of another driving method of a pixel driving circuit provided by an exemplary embodiment. Based on the embodiment shown in FIG. 9, the driving method provided in this embodiment may further include the following steps:

S230: Turn on the charging sub-circuit by inputting a scan signal to the charging sub-circuit in the second time period;

S240. The turned-on charging sub-circuit performs display charging on the voltage stabilizing sub-circuit through the input second data signal to turn on the voltage stabilizing sub-circuit and turn on the pixel transistor. After the pixel transistor is turned on, the first input of the voltage stabilizing sub-circuit The second voltage value of the terminal is equal to the voltage value of the second data signal.

In this embodiment, the above-mentioned charging process by the scanning signal Gate is the working process of the pixel driving circuit 100 in the display charging phase. The working principle of the display charging phase is: during the display charging time period (ie, the second time period t2) Inside, the scan signal Gate is pulled high to turn on the charging sub-circuit 110, and the voltage stabilizing sub-circuit 120 is turned on by the input second data signal Data2. If the voltage value V _{data of} the second data signal Data2 is greater than V _th , then The voltage regulator sub-circuit 120 is charged from V ₁ to V _data , compared with the DTFT in the driving circuit from 0V to V _data , which greatly saves the charging time. If V _{data is} less than V _th , the voltage regulator will not be turned on Subcircuit 120.

With reference to the display timing shown in FIG. 4, the first time period t1 in this embodiment is the time period between the falling edge of the frame end signal RST of each frame and the falling edge of the frame start signal STV of the next frame. For the first frame used for display, the above-mentioned first time period t1 may be the time period between the preset time and the falling edge of the frame start signal STV of the first frame, where the first frame may be controlled by timing ( Timing Controller, referred to as: T-Con) chip setting, for example, T-Con refers to the input of the front-end input signal to set the first frame start signal STV output by the back end, and can be based on the first frame start signal STV Set the first time period t1 for displaying the first frame; the second time period t2 can be a preset time after the rising or falling edge of the frame start signal STV of each frame to the voltage stabilizing sub-circuit 120 for display charging voltage value reaches a second time period between the data signal is a voltage value of V _data, it can be seen, the end of the first period t1 to a second time period t2 may have a start time period between t ', the period of time t' The length and duration of STV high level can be set by software.

In practical applications, after the above-mentioned driving method is used to charge the voltage stabilizing sub-circuit 120 to the voltage value V _data for controlling the current of the pixel transistor 130, the voltage is stabilized to V _data during the period when the pixel transistor 130 is lit in one frame time ( V _data >V _th ), the period of time that the pixel transistor 130 is turned off after being turned on is regulated to V ₁ to the end of one frame. After the end of one frame, RST is pulled high, and after the voltage stabilizing sub-circuit 120 is discharged to 0V, RST is pulled low again, and then the pre-charging process of the next frame is started. The above-mentioned pre-charging, display charging, and stabilizing are repeated until the end of a frame and one The discharge process after the end of the frame, that is, the process of S210-S240, and the process of voltage stabilization and discharge are performed cyclically during the display process of the display panel.

When the structure of the pixel driving circuit 100 that implements the driving method provided by this embodiment is the pixel driving circuit 100 shown in FIG. 5, the pixel driving circuit 100 is in the pre-charge phase (that is, the first time period t1) and the display charging phase (That is, the working mode in the second time period t2) has been described in detail in the foregoing multiple embodiments, so it is not repeated here.

In an implementation of this embodiment, during the pre-charging phase (that is, the first time period t1), the voltage value of the first data signal Data1 charged to the voltage stabilizing sub-circuit 120 may be less than or equal to the first The voltage value V ₁ can realize that the pixel transistor 130 will not turn on during the pre-charging phase. Since the first voltage value V _{1 is} less than or equal to the threshold voltage V _th , the voltage value of the voltage stabilizing sub-circuit 120 in the pre-charging phase is not greater than the threshold voltage V _th .

In another implementation of this embodiment, the voltage value of the first data signal Data1 for charging the voltage stabilizing sub-circuit 120 may be greater than the aforementioned first voltage value V ₁ , because the voltage stabilizing sub-circuit 120 needs to be charged to reach V ₁ For a certain period of time, the length of the first time period t1 can be controlled by calculating the charging time of the voltage stabilizing sub-circuit 120, that is, by setting the duration of the pre-charging signal CH being pulled high, the voltage stabilizing sub-circuit 120 in the pre-charging phase can be controlled. The first voltage value V ₁ . In this implementation manner, since the voltage value of the first data signal for precharging the voltage stabilizing sub-circuit 120 is relatively large, the time for charging the voltage stabilizing sub-circuit 120 to reach V ₁ in this manner is also relatively short. This implementation can continue to compress the precharge time in each frame and improve the resolution and refresh rate of the display panel.

In an exemplary embodiment, a switch sub-circuit 140 may be added to the pixel driving circuit 100. In the pixel driving circuit 100, the voltage stabilizing sub-circuit 120 may include: a voltage stabilizing capacitor 121 and a pixel driving transistor 122. The pixel driving transistor 122 can be, for example, an NMOS transistor. The anode of the voltage stabilizing capacitor 122 and the gate _{GD of the} pixel drive transistor 122 are electrically connected to the output terminal 110c of the charging sub-circuit 110, and the cathode of the voltage stabilizing capacitor 121 and the pixel drive transistor 122 the source S _D is electrically connected in parallel to a common voltage V _SS, the drain D _D pixel driving transistor is electrically connected to the pixel transistor 122 of the cathode 130, the anode of the pixel transistor 130 is connected to supply voltage V _DD; in addition, the pixel driver circuit 100 further includes: a switch sub-circuit 140 connected between the first input terminal 120a of the voltage stabilizing sub-circuit 120 and the gate G _{D of the} pixel driving transistor 122, and the first input terminal 140a of the switch sub-circuit 140 is set to output The reference signal terminal of the reference signal is electrically connected, the second input terminal 140b is electrically connected to the first input terminal 120a of the voltage stabilizing sub-circuit 120, and the output terminal 140c is electrically connected to the gate G _D of the pixel driving transistor 122 of the voltage stabilizing sub-circuit 120 . The circuit structure of the above-mentioned added switch sub-circuit 140 can refer to the structure of the pixel driving circuit 100 shown in FIGS. 6 and 7, its driving method, and the working process in the first time period t1, the second time period t2, and the time period t' It has been described in detail in the above multiple embodiments, so it will not be repeated here. Based on the structure of the above-mentioned switch sub-circuit 140, the driving method provided by an exemplary embodiment may further include the following steps:

In the first time period t1, the output reference signal instructs the switch sub-circuit 140 to be turned off, thereby disconnecting the voltage stabilizing sub-circuit 120, that is, the voltage stabilizing sub-circuit 120 is always in the off state in the first time period t1. Bright pixel transistor 130;

In the second time period t2, the output reference signal is used to instruct the switch sub-circuit 140 to turn on the voltage stabilizing sub-circuit 120, that is, the voltage stabilizing sub-circuit 120 is turned on and the pixel transistor 130 is turned on in the second time period t2.

In an exemplary embodiment, since the driving method provided in each of the foregoing embodiments includes a pre-charging phase (that is, the first time period t1), the charging time of the second time period t2 in this embodiment is:

t2≈RC*Ln[(V _data -V ₁ )/(V _data -aV _data )]; (3)

Where RC is the charging constant of the voltage stabilizing capacitor 121, V _data is the target voltage value of the voltage stabilizing sub-circuit 120 during the second time period t2, and V ₁ is the initial voltage of the voltage stabilizing sub-circuit 120 in the second time period t2 The value is also the actual voltage value at which the voltage stabilizing sub-circuit completes charging in the first time period t1, a is the charging saturation coefficient of the stabilizing sub-circuit 120, and the product of a and V _data can be regarded as the voltage stabilizing sub-circuit 120 completing the charging The actual voltage value of a may be 95%, for example.

In the driving method provided by this embodiment, the second time period t2, that is, the charging time for charging the voltage stabilizing capacitor 121 of the gate G _D of the pixel driving transistor 122 that controls the current of the pixel transistor 130 through the second data signal Data2, is calculated as follows :

The voltage of the stabilizing capacitor 121 at each moment is:

V _t =V ₀ +(V ₁ -V ₀ )*(1-e ^-t/RC ) (1)

t=RC*Ln[(V ₁ -V ₀ )/(V ₁ -V _t )] (2)

In the above equations (1) and (2), t is any moment in the charging time period, V _t is the voltage value on the voltage stabilizing capacitor 121 after the time t has passed, and V ₁ is the voltage stabilizing capacitor 121 after charging is completed The voltage value above, V ₀ is the initial voltage value of the voltage stabilizing capacitor 121, for example, it can be 0V, and RC is the charging constant of the voltage stabilizing capacitor 121.

In addition, considering that the time required to charge the voltage stabilizing capacitor 121 to full saturation is infinite, after 3 RCs, it can be considered that the voltage stabilizing capacitor 121 is charged to 95%, that is, the value of a in formula (3) is 95%, which is considered The voltage stabilizing capacitor 121 is full. Therefore, the voltage stabilizing capacitor that is not charged in advance in the pixel driving circuit is charged from 0V to the time period of V _data , and the pixel driving circuit 100 of this embodiment is charged in the second from V ₁ to V _data after the advance charging is performed. The time periods t2 are:

T≈RC*Ln[(V _data -0)/(V _data -0.95V _data )] not charged in advance;

Pre-charged t2≈RC*Ln[(V _data -V ₁ )/(V _data -0.95V _data )];

Therefore, it can be concluded that using the driving method provided in this embodiment, the charging time that can be saved during the display charging stage is:

△t≈RC*Ln[V _data /(V _data -V ₁ )];

Based on the pixel driving circuit 100 provided in the above multiple embodiments, an embodiment of the present application also provides a display panel, as shown in FIG. 11, which is a schematic structural diagram of a display panel provided by an embodiment of the present application. The display panel 10 provided by the embodiment of the present application may include: pixel transistors 130 arranged in an array, and the pixel driving circuit 100 in any one of the embodiments shown in FIG. 2 and FIG. 5 to FIG. 7; and also include data lines D and scanning Line G, where the pixel transistors 130 are electrically connected to the pixel driving circuit 100 in a one-to-one correspondence, and the connection manner of each pixel transistor 130 and the corresponding pixel driving circuit 100 can refer to any one of the implementations shown in FIGS. 2 and 5 to 7 In the structure in the example, the pixel transistor 130 in the i-th row and the j-th column is coupled to the scan line in the i-th row and the data line in the j-th column through the corresponding pixel driving circuit 100.

The display panel shown in FIG. 11 shows pixel transistors 130 in n rows and m columns, as well as n rows of scan lines G1 to Gn and m columns of data lines D1 to Dm. It can be seen that the pixel transistors 130 in the i-th row and j-th column pass the corresponding The pixel driving circuit 100 of is coupled to the scan line Gi of the i-th row and coupled to the data Dj of the j-th column. The display panel 10 provided by the embodiment of the present application is configured with the pixel driving circuit 100 provided in the above embodiments. The functions and beneficial effects achieved by the pixel driving circuit 100 are the same as those of the above embodiments, that is, The pre-storage function is provided to shorten the charging time of the display charging stage, that is, the display panel 10 provided in the embodiment of the present application can be a high resolution and high refresh rate display panel.

The embodiments of the present application also provide a computer-readable storage medium that stores executable instructions, and when the executable instructions are executed by a processor, the pixel drive circuit provided in any of the foregoing embodiments of the present application can be implemented. Drive method. The implementation of the computer-readable storage medium provided by the embodiment of the present application is basically the same as the driving method of the pixel driving circuit provided in the foregoing multiple embodiments, and will not be repeated here.

Although the implementation manners disclosed in the examples of the present application are as above, the content described is only the implementation manners used to facilitate the understanding of the application, and is not intended to limit the application. Any person skilled in the art of the present invention can make any modifications and changes in the implementation form and details without departing from the spirit and scope of the present invention. However, the patent protection scope of the present invention still requires The scope defined by the appended claims shall prevail.

Claims

A pixel driving circuit, including: a charging sub-circuit and a voltage stabilizing sub-circuit;

The pre-charge signal terminal and the scan signal terminal in parallel are electrically connected to the first input terminal of the charging sub-circuit, the second input terminal of the charging sub-circuit is electrically connected to the data signal terminal, and the output terminal of the charging sub-circuit Electrically connected to the first input terminal of the voltage stabilizing sub-circuit;

The second input terminal of the voltage stabilizing sub-circuit is electrically connected to the power supply voltage through a pixel transistor, and the output terminal of the voltage stabilizing sub-circuit is electrically connected to the common voltage;

The pixel driving circuit is configured to turn on the charging sub-circuit through a pre-charge signal input from the first input terminal of the charging sub-circuit, and to input through the second input terminal of the turned-on charging sub-circuit The first data signal precharges the voltage stabilizing sub-circuit. After precharging, the first voltage value of the first input terminal of the voltage stabilizing sub-circuit is less than or equal to the threshold voltage for turning on the voltage stabilizing sub-circuit.
The pixel driving circuit according to claim 1, wherein the charging sub-circuit comprises: a first N-type metal oxide semiconductor NMOS transistor, and the gate of the first NMOS transistor is electrically connected to the second charging sub-circuit. An input terminal, the drain is electrically connected to the second input terminal of the charging sub-circuit, and the source is electrically connected to the output terminal of the charging sub-circuit.
The pixel drive circuit according to claim 1, wherein the voltage stabilizing sub-circuit comprises: a voltage stabilizing capacitor and a pixel drive transistor, and the anode of the voltage stabilizing capacitor and the gate of the pixel drive transistor are electrically connected in parallel to The output terminal of the charging sub-circuit, the negative electrode of the stabilizing capacitor and the source of the pixel driving transistor are electrically connected in parallel to the common voltage, and the drain of the pixel driving transistor is electrically connected to the pixel transistor The cathode of the pixel transistor is electrically connected to the power supply voltage.
3. The pixel driving circuit according to any one of claims 1 to 3, wherein the voltage value of the first data signal is less than or equal to the first voltage value.
The pixel driving circuit according to claim 3,-further comprising:

A switch sub-circuit connected between the first input terminal of the voltage stabilizing sub-circuit and the gate of the pixel driving transistor, and the first input terminal of the switch sub-circuit is electrically connected to a reference signal terminal configured to output a reference signal. Connected, the second input terminal of the switch sub-circuit is electrically connected to the first input terminal of the voltage stabilizing sub-circuit, and the output terminal of the switch sub-circuit is electrically connected to the gate of the pixel driving transistor;

The pixel driving circuit is further configured to turn off the switch sub-circuit when the reference signal indicates that the charging sub-circuit is turned on by the pre-charge signal, and when the reference signal indicates that the charging sub-circuit is turned off When the scan signal is turned on, the switch sub-circuit is turned on.
The pixel driving circuit according to claim 5, wherein the switch sub-circuit includes a P-type metal oxide semiconductor PMOS transistor and a second NMOS transistor, and the gate of the PMOS transistor is electrically connected to the first switch sub-circuit. An input terminal, the source is electrically connected to the power supply voltage, the drain is electrically connected to the gate of the second NMOS transistor, and the drain of the second NMOS transistor is electrically connected to the second input of the switch sub-circuit Terminal, the source is electrically connected to the output terminal of the switch sub-circuit;

The pixel driving circuit is further configured to provide a high level to the reference signal to disconnect the PMOS transistor and the second NMOS transistor when the precharge signal turns on the charging sub-circuit, and When the clock electrical signal turns on the charging sub-circuit, a low level is provided to the reference signal to turn on the PMOS transistor and the second NMOS transistor.
8. The pixel driving circuit according to claim 5 or 6, wherein the voltage value of the first data signal is greater than the first voltage value.
A driving method of a pixel driving circuit, using the pixel driving circuit according to any one of claims 1 to 7 to execute the driving method, the driving method comprising:

Turn on the charging sub-circuit by inputting a pre-charge signal to the charging sub-circuit in the first time period;

The turned-on charging sub-circuit pre-charges the voltage-stabilizing sub-circuit through the input first data signal. After pre-charging, the first voltage value of the first input terminal of the voltage-stabilizing sub-circuit is less than or equal to The threshold voltage of the voltage stabilizing sub-circuit.
8. The driving method of the pixel driving circuit according to claim 8, further comprising:

Turning on the charging sub-circuit by inputting a scan signal to the charging sub-circuit in the second time period;

The turned-on charging sub-circuit charges the voltage stabilizing sub-circuit through the input second data signal to turn on the voltage stabilizing sub-circuit and turn on the pixel transistor. After the pixel transistor is turned on, the stable The second voltage value of the first input terminal of the voltage sub-circuit is equal to the voltage value of the second data signal.
The driving method of the pixel driving circuit according to claim 8, wherein:

The charging time in the second time period is:

t2≈RC*Ln[(V data -V 1 )/(V data -aV data )];

Wherein, the RC is the charging constant of the voltage stabilizing capacitor, the V data is the target voltage value at which the voltage stabilizing sub-circuit is charged in the second time period, and the V 1 is the voltage stabilizing sub-circuit The initial voltage value of the circuit in the second time period, where a is the charging saturation coefficient of the voltage stabilizing sub-circuit.
The driving method of the pixel driving circuit according to claim 8, wherein:

The first time period is the time period from after the falling edge of the frame end signal of each frame to the falling edge of the frame start signal of the next frame, or the first time period is from the preset time to the first The time period between the falling edges of the frame start signal of one frame;

The second time period is a preset time after the rising edge or the falling edge of the frame start signal of each frame until the voltage value of the voltage stabilizing sub-circuit for display charging reaches the voltage value of the second data signal The time period between.
The driving method of the pixel driving circuit according to any one of claims 8 to 11, wherein:

The voltage value of the first data signal in the first time period is less than or equal to the first voltage value.
The method for driving a pixel drive circuit according to any one of claims 8 to 11, wherein the voltage stabilizing sub-circuit includes a charging voltage stabilizing capacitor and a pixel drive transistor, and the positive electrode of the voltage stabilizing capacitor and the pixel driver The gate of the transistor is electrically connected to the output terminal of the charging sub-circuit in parallel, the negative electrode of the voltage stabilizing capacitor and the source of the pixel driving transistor are electrically connected to the common voltage in parallel, and the The drain is electrically connected to the cathode of the pixel transistor, and the anode of the pixel transistor is electrically connected to the power supply voltage; the voltage value of the first data signal in the first time period is greater than the first voltage value, The pixel driving circuit further includes:

A switch sub-circuit connected between the first input terminal of the voltage stabilizing sub-circuit and the gate of the pixel driving transistor, and the first input terminal of the switch sub-circuit is electrically connected to a reference signal terminal configured to output a reference signal. The second input terminal is electrically connected to the first input terminal of the voltage stabilizing sub-circuit, and the output terminal is electrically connected to the gate of the pixel driving transistor; the driving method further includes:

Instructing to disconnect the switch sub-circuit by the output reference signal in the first time period, thereby disconnecting the voltage stabilizing sub-circuit;

In the second time period, the output reference signal indicates to turn on the switch sub-circuit, thereby turning on the voltage stabilizing sub-circuit.
A display panel, comprising: pixel transistors arranged in an array, and the pixel driving circuit according to any one of claims 1 to 7;

The pixel transistors are electrically connected to the pixel driving circuit in a one-to-one correspondence, wherein the pixel transistors in the i-th row and the j-th column are coupled to the scan line of the i-th row through the corresponding pixel driving circuit, and are connected to the data in the j-th column.线连接。 Line coupling.
A computer-readable storage medium storing executable instructions that, when executed by a processor, implement the method for driving a pixel drive circuit according to any one of claims 8-13.