CN113971932A - Pixel circuit, driving method thereof, display panel, display device and terminal - Google Patents

Pixel circuit, driving method thereof, display panel, display device and terminal Download PDF

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Publication number
CN113971932A
CN113971932A CN202110907230.6A CN202110907230A CN113971932A CN 113971932 A CN113971932 A CN 113971932A CN 202110907230 A CN202110907230 A CN 202110907230A CN 113971932 A CN113971932 A CN 113971932A
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China
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light
transistor
signal
emitting
control
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Chinese (zh)
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单冬晓
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to CN202110907230.6A priority Critical patent/CN113971932A/en
Publication of CN113971932A publication Critical patent/CN113971932A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a pixel circuit, a driving method thereof, a display panel, a display device and a terminal. The bootstrap capacitor is respectively electrically connected with the anode end and the potential control end of the light-emitting device, when the output end of the light-emitting driving module outputs a light-emitting signal to stop, a pull-down potential signal is input through the potential control end, so that the voltage of the anode end of the light-emitting device is reduced to the voltage corresponding to the pull-down potential signal by the bootstrap capacitor, because the voltage corresponding to the pull-down potential signal is smaller than the conduction voltage of the light-emitting device, the anode end of the light-emitting device has a sufficiently large potential regulation and control amplitude, when current flows to the anode end of the light-emitting device, the anode end of the light-emitting device can also bear more current, the anode end of the light-emitting device is prevented from reaching the conduction voltage of the light-emitting device, the light-emitting device is forbidden to be lightened again, and when the light-emitting device emits light again, stable brightness can be quickly achieved, and the display quality of the display panel is improved.

Description

Pixel circuit, driving method thereof, display panel, display device and terminal
Technical Field
The invention belongs to the technical field of display, and particularly relates to a pixel circuit, a driving method thereof, a display panel, a display device and a terminal.
Background
An Organic Light Emitting Diode (OLED) display is one of the hot spots in the research field of flat panel displays, and compared with a liquid crystal display, an OLED display has the advantages of low energy consumption, low production cost, self-luminescence, wide viewing angle, fast response speed, and the like.
However, in the OLED display, the light emitting device may be turned on after the light emitting stage is finished due to leakage of a Thin Film Transistor (TFT), parasitic capacitance of the light emitting device, and the like. In the related art, an anode reset module is usually added to the anode terminal of the light emitting device, and after the light emitting phase is finished, the anode terminal of the light emitting device is fully discharged, so that the light emitting device is prevented from being lighted again.
However, in the next light emitting stage, the parasitic capacitance of the light emitting device is charged relatively slowly, which results in a slow increase in luminance, and in the case of a low frame frequency, the display panel of the display device flickers heavily, resulting in poor display quality of the display panel.
Disclosure of Invention
The invention mainly aims to provide a pixel circuit, a driving method thereof, a display panel, a display device and a terminal, so as to solve the problems that the display panel of a display is seriously flickered and the display quality of the display panel is poor under the condition of low frame frequency in the related art.
In view of the above problems, the present invention provides a pixel circuit, including a light emitting driving module, a light emitting device, and a bootstrap capacitor;
the reset control end of the light-emitting driving module is electrically connected with the first scanning signal end, the first data write-in control end of the light-emitting driving module is electrically connected with the second scanning end, and the second data write-in control end of the light-emitting driving module is electrically connected with the third scanning end; the light-emitting driving end of the light-emitting driving module is electrically connected with the light-emitting signal control end;
the output end of the light-emitting driving module and the first end of the bootstrap capacitor are respectively electrically connected with the anode end of the light-emitting device;
the second end of the bootstrap capacitor is electrically connected with the potential control end;
when the output end of the light-emitting driving module outputs a light-emitting stopping signal, the potential control end inputs a pull-down potential signal, so that the bootstrap capacitor reduces the voltage of the anode end of the light-emitting device to the voltage corresponding to the pull-down potential signal, and the light-emitting device is prohibited from emitting light;
and the voltage corresponding to the pull-down potential signal is less than the conduction voltage of the light-emitting device.
Further, in the pixel circuit, the light-emitting driving module includes a reset unit, a data writing unit, a driving unit, and a light-emitting control unit;
the control end of the reset unit is used as the reset control end of the light-emitting driving module, and the control end of the reset unit is electrically connected with the first scanning signal end; the input end of the reset unit is electrically connected with the reset signal end; the output end of the reset unit and the first output end of the data writing unit are respectively and electrically connected with the control end of the driving unit;
the input end of the driving unit and the second output end of the data writing unit are respectively and electrically connected with the first output end of the light-emitting control unit; the output end of the driving unit and the first input end of the data writing unit are respectively electrically connected with the first input end of the light-emitting control unit;
the first control end of the data writing unit is used as the first data writing control end of the light-emitting driving module, the first control end of the data writing unit is electrically connected with the second scanning signal end, the second control end of the data writing unit is used as the second data writing control end of the light-emitting driving module, and the second control end of the data writing unit is electrically connected with the third scanning signal end; the second input end of the data writing unit is electrically connected with the data signal end;
a second output end of the light-emitting control unit is used as an output end of the light-emitting driving module, and is electrically connected with an anode end of the light-emitting device; the first control end of the light-emitting control unit and the second control end of the light-emitting control unit are used as light-emitting drive ends of the light-emitting drive module, and the first control end of the light-emitting control unit and the second control end of the light-emitting control unit are respectively and electrically connected with a light-emitting signal control end; and the second input end of the light-emitting control unit is electrically connected with the voltage signal end.
Further, in the pixel circuit described above, the reset unit includes a first transistor; the data writing unit includes a second transistor and a fourth transistor; the driving unit includes a third transistor; the light emission control unit includes a fifth transistor and a sixth transistor;
a control electrode of the first transistor is used as a control end of the reset unit, a first electrode of the first transistor is used as an input end of the reset unit, and a second electrode of the first transistor is used as an output end of the reset unit;
a control electrode of the second transistor is used as a first control end of a data writing unit, a first electrode of the second transistor is used as a first input end of the data writing unit, and a second electrode of the second transistor is used as a first output end of the data writing unit;
a control electrode of the third transistor is used as a control end of the driving unit, a first electrode of the third transistor is used as an output end of the driving unit, and a second electrode of the third transistor is used as an input end of the driving unit;
a control electrode of the fourth transistor is used as a second control end of the data writing unit; a first pole of the fourth transistor is used as a second output end of the data writing unit, and a second pole of the fourth transistor is used as a second input end of the data writing unit;
a control electrode of the fifth transistor is used as a second control end of the light-emitting control unit, a first electrode of the fifth transistor is used as a first output end of the light-emitting control unit, and a second electrode of the fifth transistor is used as a second input end of the light-emitting control unit;
a control electrode of the sixth transistor is used as a first control end of the light-emitting control unit, a first electrode of the sixth transistor is used as a second output end of the light-emitting control unit, and a second electrode of the sixth transistor is used as a first input end of the light-emitting control unit;
the control electrode of the first transistor is electrically connected with a first scanning signal end, and the first electrode of the first transistor is electrically connected with a reset signal end; a second pole of the first transistor and a second pole of the second transistor are respectively electrically connected with a control end of the third transistor;
a second pole of the third transistor and a first pole of the fourth transistor are electrically connected to a first pole of the fifth transistor, respectively; a first pole of the third transistor and a first pole of the second transistor are electrically connected to a second pole of the sixth transistor, respectively;
the control electrode of the fourth transistor is electrically connected with the third scanning signal end; a second pole of the fourth transistor is electrically connected with the data signal end;
a first electrode of the sixth transistor is used as an output end of the light-emitting driving module, and the first electrode of the sixth transistor is electrically connected with an anode end of the light-emitting device; the control electrode of the sixth transistor and the control electrode of the fifth transistor are respectively electrically connected with a light-emitting signal control end; and the second pole of the fifth transistor is electrically connected with the voltage signal end.
Further, in the pixel circuit, the third transistor is a P-type transistor;
the first transistor, the second transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all N-type transistors;
the potential control end and the light-emitting signal control end are the same end.
Further, in the pixel circuit, the second scanning signal terminal and the third scanning signal terminal are the same terminal.
Further, in the pixel circuit, the first transistor and the second transistor are both N-type transistors;
the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all P-type transistors.
Further, in the pixel circuit, the first transistor and the second transistor are both N-type indium gallium zinc oxide transistors;
the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all P-type low temperature polysilicon transistors.
The present invention also provides a driving method of the pixel circuit as described in any one of the above, including:
in a reset stage of a refresh frame state, inputting a reset permission control signal through the first scanning signal terminal, inputting a first write prohibition data signal through the second scanning terminal, inputting a second write prohibition data signal through the third scanning terminal, inputting a light emitting signal stop signal through the light emitting signal control terminal, inputting a pull-down potential signal through the potential control terminal, so that a reset voltage is written into the control terminal of the driving unit of the light emitting driving module, and the voltage of the anode terminal of the light emitting device is reduced to a voltage corresponding to the pull-down potential signal through the bootstrap capacitor, so as to prohibit the light emitting device from emitting light; the voltage corresponding to the pull-down potential signal is smaller than the turn-on voltage of the light-emitting device;
in a data writing stage of a refresh frame state, inputting a reset prohibition control signal through a first scanning signal terminal, inputting a first writing data signal into a second scanning terminal, inputting a second writing data signal into a third scanning terminal, inputting a light-emitting signal stop signal into a light-emitting signal control terminal, and inputting a pull-down potential signal into a potential control terminal, so that a data voltage is written into the control terminal of a driving unit written by a light-emitting driving module, and the voltage of an anode terminal of a light-emitting device is maintained at a voltage corresponding to the pull-down potential signal by a bootstrap capacitor, so as to prohibit the light-emitting device from emitting light;
in a light emitting stage of a refresh frame state, a reset prohibition control signal is input through a first scanning signal terminal, a first write prohibition data signal is input through a second scanning terminal, a second write prohibition data signal is input through a third scanning terminal, a light emitting signal is input through a light emitting signal control terminal, a pull-up potential signal is input through a potential control terminal, so that the bootstrap capacitor pulls up a voltage of an anode terminal of the light emitting device to a voltage corresponding to the pull-up potential signal, and the light emitting drive module drives the light emitting device to emit light.
Further, the method for driving a pixel circuit further includes:
in a light-emitting prohibition stage of maintaining a frame state, inputting a reset prohibition control signal through a first scanning signal terminal, inputting a first write prohibition data signal into a second scanning terminal, inputting a second write prohibition data signal into a third scanning terminal, inputting a light-emitting stop signal into a light-emitting signal control terminal, and inputting a pull-down potential signal into a potential control terminal, so that the bootstrap capacitor maintains the voltage of the anode terminal of the light-emitting device at the voltage corresponding to the pull-down potential signal, thereby prohibiting the light-emitting device from emitting light;
in a light-emitting maintaining stage of maintaining a frame state, a reset prohibiting control signal is input through a first scanning signal terminal, a first write prohibiting data signal is input through a second scanning terminal, a second write prohibiting data signal is input through a third scanning terminal, a light-emitting signal is input through a light-emitting signal control terminal, a pull-up potential signal is input through a potential control terminal, so that the bootstrap capacitor pulls up a voltage of an anode terminal of the light-emitting device to a voltage corresponding to the pull-up potential signal, and the light-emitting driving module drives the light-emitting device to emit light.
Further, the method for driving a pixel circuit further includes:
and determining the capacitance value of the self-lifting capacitor in the bootstrap capacitor according to the voltage of the anode end of the light-emitting device, the pull-up voltage of the potential control end, the pull-down voltage of the potential control end, the capacitance value of the parasitic capacitor of the light-emitting device and the conduction voltage of the light-emitting device.
The invention also provides a display panel comprising the pixel circuit as described in any one of the above.
The invention also provides a display device comprising the display panel.
The invention also provides a terminal comprising the display panel.
Compared with the prior art, one or more embodiments in the above scheme can have the following advantages or beneficial effects:
in the pixel circuit, the driving method thereof, the display panel, the display device and the terminal of the invention, the first end of the bootstrap capacitor is connected to the anode end of the light emitting device by arranging the self-lifting capacitor, the second end of the bootstrap capacitor is connected to the potential control end, thus, when the output end of the light emitting driving module outputs the light emitting stopping signal, the pull-down potential signal is input through the potential control end, so that the bootstrap capacitor reduces the voltage of the anode end of the light emitting device to the voltage corresponding to the pull-down potential signal, and as the voltage corresponding to the pull-down potential signal is smaller than the conducting voltage of the light emitting device, the anode end of the light emitting device has enough potential regulation amplitude, even if the parasitic capacitor, TFT leakage and the like can cause the current to flow to the anode end of the light emitting device, but the anode end of the light emitting device can bear more current, the anode end of the light-emitting device is prevented from reaching the conduction voltage of the light-emitting device, so that the light-emitting device is forbidden to be lightened again, and meanwhile, because the bootstrap capacitor Crst stores the voltage in the last light-emitting stage, when the potential control end inputs a pull-up potential signal, the bootstrap capacitor Crst can directly charge the light-emitting device D, the anode end of the light-emitting device D can quickly reach the conduction voltage, the light-emitting device D can quickly reach stable brightness, and the display quality of the display panel is improved.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic diagram of a LTPS circuit according to the related art;
FIG. 2 is a timing diagram corresponding to the LTPS circuit shown in FIG. 1;
FIG. 3 is a comparison graph of instantaneous light emission of a panel when one Pulse has an anode reset and three pulses have no anode reset in a period when a 60Hz frame frequency is introduced into a 240Hz PWM;
FIG. 4 is a diagram illustrating an LTPO circuit according to the related art;
FIG. 5 is a diagram of the flicker frequency of the LTPO circuit of FIG. 4 under different timing signal diagrams;
FIG. 6 is a schematic diagram of a pixel circuit according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of another embodiment of a pixel circuit according to the present invention;
FIG. 8 is a schematic diagram of a specific structure of the pixel circuit shown in FIG. 7;
FIG. 9 is a timing diagram corresponding to the pixel circuit of FIG. 8;
FIG. 10 is a state diagram of the pixel circuit of FIG. 8 at various stages under the timing control of FIG. 9;
FIG. 11 is a schematic diagram of a pixel circuit according to still another embodiment of the present invention;
FIG. 12 is a state diagram of the pixel circuit of FIG. 11 at various stages under the timing control of FIG. 9;
FIG. 13 is a schematic diagram of a pixel circuit according to yet another embodiment of the present invention;
fig. 14 is a timing signal diagram corresponding to the pixel circuit of fig. 13.
Detailed Description
The following detailed description of the embodiments of the present invention will be provided with reference to the drawings and examples, so that how to apply the technical means to solve the technical problems and achieve the technical effects can be fully understood and implemented. It should be noted that, as long as there is no conflict, the embodiments and the features of the embodiments of the present invention may be combined with each other, and the technical solutions formed are within the scope of the present invention.
Fig. 1 is a schematic structural diagram of a Low Temperature Polysilicon (LTPS) circuit in the related art, and fig. 2 is a timing signal diagram corresponding to the LTPS circuit shown in fig. 1, and the LTPS circuit is composed of a first transistor T1-a seventh transistor T7, a first storage capacitor Cst1, and a light emitting device D, as shown in fig. 1. In fig. 1, VDD denotes a positive voltage signal terminal, a light emitting signal of the LTPS circuit may be denoted as EM, a Reset control signal of the LTPS circuit may be denoted as Reset, a data writing signal of the LTPS circuit may be denoted as Gate, Vdata denotes a Reset signal terminal (which may be denoted by subsequent circuits), VSS denotes a negative voltage signal terminal (which may be denoted by subsequent circuits), and Vinit denotes a Reset signal terminal (which may be denoted by subsequent circuits). At the time of the reset phase T1 and the data write phase T2, although the sixth transistor T6 is already turned off, the anode terminal of the light emitting device D may be discharged due to possible leakage of the sixth transistor T6, discharge of parasitic capacitance of the light emitting device D, and the like, and at this time, the anode terminal of the light emitting device D may be sufficiently discharged through the seventh transistor T7, thereby preventing the light emitting device D from being lighted again. However, in the next light emitting stage, the parasitic capacitance of the light emitting device D is charged relatively slowly, which results in a slow increase in luminance, and in the case of a low frame frequency, the display panel of the display flickers heavily, resulting in poor quality of the display panel.
FIG. 3 is a comparison graph of instantaneous panel lighting during one Pulse with anode reset and three Pulse without anode reset in one period when a frame frequency of 60Hz is introduced into a PWM of 240 Hz. When the anode reset (a) and the non-anode reset (b) are performed, the light emitting conditions of the anode reset (a) and the non-anode reset (b) are obviously different. When the anode reset frequency is 60Hz, the frequency is high and is not easy to be perceived by human eyes. However, at a low frame frequency of 1Hz, the anode reset frequency is 1Hz, and the light emission occurs once every 1s, so that the flicker is easily perceived by human eyes.
FIG. 4 is a schematic diagram of a Low Temperature Polycrystalline Oxide (LTPO) circuit in the related art. As shown in fig. 4, the LTPO circuit is composed of first to seventh transistors T1 to T7, a first storage capacitor Cst1, and a light emitting device D, which is different from the LTPS circuit shown in fig. 1 in that some of the transistors in the LTPS circuit are replaced with Indium Gallium Zinc Oxide (IGZO) transistors. In fig. 4, the reset control signal of the LTPO circuit may be represented as N-scan (N-1), the first data write signal of the LTPO circuit may be represented as N-scan (N), the second data write signal of the LTPO circuit may be represented as P-scan, and the light emission signal of the LTPO circuit may be represented as em (N). In one embodiment, the first transistor T1 and the second transistor T2 may be N-type IGZO transistors, and the third transistor T3 to the seventh transistor T7 are P-type LTPS transistors.
The first transistor T1 and the second transistor T2 are not limited to N-type IGZO transistors, and may be N-type transistors formed of another oxide.
FIG. 5 is a diagram illustrating the flicker frequency of the LTPO circuit of FIG. 4 under different timing diagrams, and it can be seen from FIG. 5 that the second data write signal can be represented as a P-scan signal which can improve the flicker problem observed by human eyes at high frequency. That is, the LTPO circuit can improve the flicker problem observed by human eyes, but the frequency of the first data write signal Gate needs to be increased, and the panel power consumption is high because the GOA circuit needs an additional N-Scan driving signal.
Therefore, in order to solve the above technical problems, the present invention provides the following technical solutions.
Example one
Fig. 6 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, and as shown in fig. 6, the pixel circuit of this embodiment may include a light-emitting driving module 1, a light-emitting device D, and a bootstrap capacitor Crst. The reset control terminal of the light emitting driving module 1 is electrically connected to the first scanning signal terminal X1, the first data write control terminal of the light emitting driving module 1 is electrically connected to the second scanning terminal X2, and the second data write control terminal of the light emitting driving module 1 is electrically connected to the third scanning terminal X3; the light-emitting driving end of the light-emitting driving module 1 is electrically connected with the light-emitting signal control end E; the output end of the light-emitting driving module 1 and the first end of the bootstrap capacitor Crst are respectively electrically connected with the anode end of the light-emitting device D; and the second end of the bootstrap capacitor Crst is electrically connected with the potential control end Y. The cathode terminal of the light emitting device D is connected to a negative voltage signal terminal VSS.
In one implementation, the pixel circuit may operate in a refresh frame state and a hold frame state, and in the refresh frame state, it may include a reset phase, a data write phase, and a light emission phase.
In a reset phase t1 of the refresh frame state, a reset permission control signal may be input through the first scan signal terminal X1, a first write prohibition data signal may be input through the second scan terminal X2, a second write prohibition data signal may be input through the third scan terminal X3, a light emission stop signal may be input through the light emission signal control terminal E, and a pull-down potential signal may be input through the potential control terminal, so that a reset voltage may be written through the control terminal of the driving unit of the light emission driving module 1, and the voltage of the anode terminal of the light emitting device D may be reduced to a voltage corresponding to the pull-down potential signal through the bootstrap capacitor Crst, so as to prohibit the light emitting device D from emitting light; the voltage corresponding to the pull-down potential signal is smaller than the turn-on voltage of the light-emitting device D;
in a data writing phase t2 of a refresh frame state, a reset prohibition control signal is input through a first scan signal terminal X1, a first write data signal is input through a second scan terminal X2, a second write data signal is input through a third scan terminal X3, a light-emitting signal control terminal E inputs a light-emitting stop signal, and a pull-down potential signal is input through a potential control terminal, so that a data voltage is written into a control terminal of a driving unit of the light-emitting driving module 1, and the voltage of an anode terminal of the light-emitting device D is maintained at a voltage corresponding to the pull-down potential signal by the bootstrap capacitor Crst, so as to prohibit the light-emitting device D from emitting light;
in a light-emitting period t3 of a refresh frame state, a reset prohibition control signal is input through a first scan signal terminal X1, a first write prohibition data signal is input through a second scan terminal X2, a second write prohibition data signal is input through a third scan terminal X3, so that the light-emitting driving module 1 enters a data output state, a light-emitting signal is input through a light-emitting signal control terminal E, and a pull-up potential signal is input through a potential control terminal, so that the bootstrap capacitor Crst pulls up a voltage of an anode terminal of the light-emitting device D to a voltage corresponding to the pull-up potential signal, so that the light-emitting driving module 1 drives the light-emitting device D to emit light.
In one implementation, the pixel circuit may include a light-off prohibition period t4 and a light-on maintaining period t5 while maintaining the frame state.
In a light emission prohibition period t4 of a frame holding state, a reset prohibition control signal is input through a first scan signal terminal X1, a first write prohibition data signal is input through a second scan terminal X2, a second write prohibition data signal is input through a third scan terminal X3, a light emission signal control terminal E inputs a light emission stop signal to enable the light emission driving module 1 to enter a light emission prohibition state, and a pull-down potential signal is input through a potential control terminal, so that the bootstrap capacitor Crst maintains the voltage of the anode terminal of the light emitting device D at the voltage corresponding to the pull-down potential signal to prohibit the light emitting device D from emitting light;
in a light-emitting holding period t5 of a frame-holding state, a reset-prohibition control signal is input through a first scan signal terminal X1, a first write-prohibition data signal is input through a second scan terminal X2, a second write-prohibition data signal is input through a third scan terminal X3, so that the light-emitting driving module 1 enters a data output state, a light-emitting signal is input through a light-emitting signal control terminal E, and a pull-up potential signal is input through a potential control terminal, so that the self-lifting capacitor Crst pulls up a voltage of an anode terminal of the light-emitting device D to a voltage corresponding to the pull-up potential signal, so that the light-emitting driving module 1 drives the light-emitting device D to emit light. And because bootstrap capacitor Crst has stored the voltage in last light-emitting stage, when the electric potential control end inputs and draws the high electric potential signal, bootstrap capacitor Crst can charge luminescent device D directly, make luminescent device D's positive pole end can reach switching-on voltage fast, luminescent device D can reach stable luminance fast.
In a specific implementation process, in a reset stage t1 of a refresh frame state and a data write stage t2 of a refresh frame, the output ends of the light-emitting driving module 1 both output light-emitting stop signals, and at this time, a potential control end inputs a pull-down potential signal, so that the bootstrap capacitor Crst reduces the voltage of the anode end of the light-emitting device D to a voltage corresponding to the pull-down potential signal, so as to prohibit the light-emitting device D from emitting light; therefore, the anode end of the light-emitting device D has enough potential regulation and control amplitude, even if the parasitic capacitor, the TFT leakage and the like cause current to flow to the anode end of the light-emitting device D, the anode end of the light-emitting device D can bear more current, and the anode end of the light-emitting device D is prevented from reaching the conduction voltage of the light-emitting device D, so that the light-emitting device D is forbidden to be lightened again.
Example two
Fig. 7 is a schematic structural diagram of another embodiment of the pixel circuit of the present invention, and as shown in fig. 7, in the pixel circuit of the present embodiment, the light-emitting driving module may include a reset unit 11, a data writing unit 12, a driving unit 13, and a light-emitting control unit 14.
In a specific implementation process, a control terminal of the reset unit 11 serves as a reset control terminal of the light emitting driving module, and the control terminal of the reset unit 11 is electrically connected to the first scan signal terminal X1; the input end of the reset unit 11 is electrically connected with a reset signal end Vinit; an output end of the reset unit 11 and a first output end of the data writing unit 12 are electrically connected to a control end of the driving unit 13, respectively.
An input end of the driving unit 13 and a second output end of the data writing unit 12 are electrically connected to a first output end of the light emission control unit 14, respectively; an output end of the driving unit 13 and a first input end of the data writing unit 12 are electrically connected to a first input end of the light emission control unit 14, respectively.
The first control terminal of the data writing unit 12 is used as the first data writing control terminal of the light emitting driving module, the first control terminal of the data writing unit 12 is electrically connected to the second scanning signal terminal X2, the second control terminal of the data writing unit 12 is used as the second data writing control terminal of the light emitting driving module, and the second control terminal of the data writing unit 12 is electrically connected to the third scanning signal terminal X3; the second input terminal of the data writing unit 12 is electrically connected to the data signal terminal Vdata.
A second output end of the light-emitting control unit 14 is used as an output end of the light-emitting driving module, and the second output end of the light-emitting control unit 14 is electrically connected with an anode end of the light-emitting device D; the first control end of the light-emitting control unit 14 and the second control end of the light-emitting control unit 14 are used as light-emitting driving ends of the light-emitting driving module, and the first control end of the light-emitting control unit 14 and the second control end of the light-emitting control unit 14 are respectively electrically connected with a light-emitting signal control end E; a second input terminal of the light-emitting control unit 14 is electrically connected to the positive voltage signal terminal VDD.
Fig. 8 is a schematic diagram of a specific structure of the pixel circuit shown in fig. 7, and as shown in fig. 8, in the pixel circuit of this embodiment, the reset unit 11 includes a first transistor T1; the data writing unit 12 includes a second transistor T2 and a fourth transistor T4; the driving unit 13 includes a third transistor T3; the light emission controlling unit 14 includes a fifth transistor T5 and a sixth transistor T6. In fig. 8, the reset control signal transmitted from the first scan signal terminal X1 of the pixel circuit may be represented as Gate (n-1), the data write signal transmitted from the second scan signal terminal X2 and the data write signal transmitted from the third scan signal terminal X3 may be represented as Gate (n), and the emission signal transmitted from the emission signal control terminal E and the potential control signal transmitted from the bootstrap capacitor Crst may be represented as em (n).
In one implementation, the control electrode of the first transistor T1 serves as the control terminal of the reset unit 11, the first electrode of the first transistor T1 serves as the input terminal of the reset unit 11, and the second electrode of the first transistor T1 serves as the output terminal of the reset unit 11.
A control electrode of the second transistor T2 serves as a first control terminal of the data writing unit 12, a first electrode of the second transistor T2 serves as a first input terminal of the data writing unit 12, and a second electrode of the second transistor T2 serves as a first output terminal of the data writing unit 12.
A control electrode of the third transistor T3 is used as a control terminal of the driving unit 13, a first electrode of the third transistor T3 is used as an output terminal of the driving unit 13, and a second electrode of the third transistor T3 is used as an input terminal of the driving unit 13.
The control electrode of the fourth transistor T4 is used as the second control terminal of the data writing unit 12; a first pole of the fourth transistor T4 serves as a second output terminal of the data writing unit 12, and a second pole of the fourth transistor T4 serves as a second input terminal of the data writing unit 12.
A control electrode of the fifth transistor T5 is used as the second control terminal of the lighting control unit 14, a first electrode of the fifth transistor T5 is used as the first output terminal of the lighting control unit 14, a second electrode of the fifth transistor T5 is used as the second input terminal of the lighting control unit 14,
A control electrode of the sixth transistor T6 is used as a first control terminal of the light emission control unit 14, a first electrode of the sixth transistor T6 is used as a second output terminal of the light emission control unit 14, and a second electrode of the sixth transistor T6 is used as a first input terminal of the light emission control unit 14.
In one specific implementation, a control electrode of the first transistor T1 is electrically connected to the first scan signal terminal X1, and a first electrode of the first transistor T1 is electrically connected to the reset signal terminal Vinit; a second pole of the first transistor T1 and a second pole of the second transistor T2 are electrically connected to a control terminal of the third transistor T3, respectively; a second pole of the third transistor T3 and a first pole of the fourth transistor T4 are electrically connected to the first pole of the fifth transistor T5, respectively; a first pole of the third transistor T3 and a first pole of the second transistor T2 are electrically connected to a second pole of the sixth transistor T6, respectively; a control electrode of the second transistor T2 is electrically connected to a second scan signal terminal X2, and a control electrode of the fourth transistor T4 is electrically connected to a third scan signal terminal X3; a second pole of the fourth transistor T4 is electrically connected to the data signal terminal Vdata; a first electrode of the sixth transistor T6 is used as an output terminal of the light emitting driving module 1, and a first electrode of the sixth transistor T6 is electrically connected to an anode terminal of the light emitting device D; a control electrode of the sixth transistor T6 and a control electrode of the fifth transistor T5 are electrically connected to a light emitting signal control terminal E, respectively; the second pole of the fifth transistor T5 is electrically connected to the positive voltage signal terminal VDD.
In the above embodiments, when the transistor is a thin film transistor or a field effect transistor, the control electrode may be a gate electrode, the first electrode may be a drain electrode, and the second electrode may be a source electrode; alternatively, the control electrode may be a gate electrode, the first electrode may be a source electrode, and the second electrode may be a drain electrode.
In one implementation, the pixel circuit may further include a first storage capacitor Cst1, wherein a first terminal of the first storage capacitor Cst1 is electrically connected to the control terminal of the third transistor T3, and a second terminal of the first storage capacitor Cst1 is electrically connected to the positive voltage signal terminal VDD.
In one specific implementation, as shown in fig. 8, the second scan signal terminal X2 and the third scan signal terminal X3 may be set to the same terminal, so that power consumption of the pixel circuit may be reduced.
In a specific implementation process, the capacitance value of the bootstrap capacitor in the bootstrap capacitor Crst may be determined according to the voltage of the anode terminal of the light emitting device D, the VGH voltage, the VGL voltage, the capacitance value of the parasitic capacitor of the light emitting device D, and the on-voltage of the light emitting device D.
Specifically, during the light emitting period t3, the anode terminal voltage of the light emitting device D satisfies the following calculation formula:
VColed＝VN4-ELVSS＝Voled (1)
wherein, VColedVoltage, V, representing parasitic capacitance of the light emitting device DN4Denotes an anode terminal voltage of the light emitting device D, ELVSS denotes a cathode terminal voltage of the light emitting device D, VoledIndicating the voltage difference of the light emitting device D.
In the non-lighting stage, the output of the potential control terminal is pulled down by a signal, the voltage corresponding to the pull-down signal is VGL, since the potential control terminal enters the closed state from the start stage, the output of the potential control terminal is pulled down instantly, and the voltage of the anode terminal of the lighting device D is also pulled down rapidly to VN4', since the switching is extremely fast, the parasitic capacitance C of the light emitting device D during switchingoledAnd is not discharged through the light emitting device D. Due to the characteristic that the capacitor separates direct current from direct current, the voltage of the potential control end is changed from VGH to VGL and then changed into VGH-VGL, and the voltage change value respectively causes C through the principle of capacitor voltage divisionrstAnd ColedThe voltage changes. At this stage, the voltage difference between the two ends of the light emitting device D needs to be smaller than the on-state voltage of the light emitting device D to ensure that the light emitting device D does not emit light when the output of the potential control end is pulled down to a signal, so that the following calculation formula (2) can be obtained:
Figure BDA0003202186090000131
V′Coledvoltage, C, representing parasitic capacitance of the light emitting device D during the non-emitting periodrstRepresenting the capacitance of the bootstrap capacitor, ColedRepresenting the capacitance of the parasitic capacitor of the light emitting device D, VGH representing the pull-up voltage of the potential control terminal, VGL representing the pull-down voltage of the potential control terminal, VthRepresenting the turn-on voltage of the light emitting diode.
The capacitance value of the bootstrap capacitor in the bootstrap capacitor Crst can be obtained according to the above calculation formulas (1) and (2).
In one specific implementation, the third transistor T3 in fig. 8 may be a P-type transistor; the first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 may all be N-type transistors. The fifth transistor T5 and the sixth transistor T6 may be turned off when a low level signal is input to the light emitting signal control terminal E, and thus the light emitting device D cannot be driven to emit light, and in order to pull down the potential of the light emitting device D, a low level signal is generally input to the anode terminal of the light emitting device D, and therefore, in this case, the potential control terminal and the light emitting signal control terminal E are the same terminal, so that there is no need to separately arrange the potential control terminal, and power consumption of the pixel circuit is reduced.
Fig. 9 is a timing signal diagram corresponding to the pixel circuit of fig. 8. Fig. 10 is a state diagram of the pixel circuit of fig. 8 at various stages under the timing control of fig. 9. As shown in fig. 9 to 10, in the reset phase T1, the first transistor T1 is turned on, the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all turned off, the pull-down signal (low level signal) is input to the potential control terminal, the control electrode of the third transistor T3 is reset, and the light emitting device D does not emit light. In the data writing phase T2, the second transistor T2 and the fourth transistor T4 are turned on, the first transistor T1, the fifth transistor T5 and the sixth transistor T6 are turned off, the control terminal of the third transistor T3 writes a data signal, the potential control terminal inputs a pull-down signal, and the light emitting device D does not emit light. In the light emitting period T3 and the light emission maintaining period T5, the fifth transistor T5 and the sixth transistor T6 are turned on, the first transistor T1, the second transistor T2 and the fourth transistor T4 are turned off, the output terminal of the third transistor T3 outputs a light emitting signal, the potential control terminal inputs a pull-up signal (high level signal), and the light emitting device D emits light. In the light emission disabled period T4, the first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 are all turned off, the potential control terminal Y receives a pull-down signal, and the light emitting device D does not emit light.
EXAMPLE III
Fig. 11 is a schematic structural diagram of a pixel circuit according to still another embodiment of the present invention, and as shown in fig. 11, the pixel circuit according to the present embodiment may include eighth to fourteenth transistors T8 to T14, a light emitting device D, and a second storage capacitor Cst2, wherein the tenth transistor T10 may be an N-type transistor, and the remaining transistors may be P-type transistors. In an embodiment, the eighth transistor T8, the ninth transistor T9, the eleventh transistor T11, and the fourteenth transistor T14 may each employ an IGZO transistor, and the remaining transistors may employ LTPS transistors.
In one specific implementation, a control electrode of the eighth transistor T8 and a control electrode of the fourteenth transistor T14 are electrically connected to the fourth scan terminal x4, respectively, a first electrode of the eighth transistor T8 and a first electrode of the ninth transistor T9 are electrically connected to a control electrode of the tenth transistor T10, respectively, and a second electrode of the eighth transistor T8 is electrically connected to the reset signal terminal Vinit.
A control electrode of the ninth transistor T9 and a control electrode of the eleventh transistor T11 are electrically connected to the fifth scan line x5, respectively, and a second electrode of the ninth transistor T9, a first electrode of the thirteenth transistor T13, and a second end of the second storage capacitor Cst2 are electrically connected to a first electrode of the tenth transistor T10, respectively.
The second pole of the tenth transistor T10 and the first pole of the fourteenth transistor T14 are electrically connected to the positive voltage signal terminal VDD, respectively; a first electrode of the eleventh transistor T11 is electrically connected to the first terminal of the second storage capacitor Cst2, and a second electrode of the eleventh transistor T11 is electrically connected to the data signal terminal Vdata.
A control terminal of the twelfth transistor T12 and a control terminal of the thirteenth transistor T13 are electrically connected to the light emitting signal control terminal E, a first electrode of the twelfth transistor T12 is electrically connected to the positive reference voltage signal terminal VREF, and a second electrode of the twelfth transistor T12 and a second electrode of the fourteenth transistor T14 are electrically connected to the first terminal of the second storage capacitor Cst2, respectively.
The second pole of the thirteenth transistor T13 and the first terminal of the bootstrap capacitor are electrically connected to the light emitting device D, respectively. The second end of the bootstrap capacitor is electrically connected with the potential control end Y. The potential control terminal Y and the light-emitting signal control terminal E can be the same terminal. The cathode terminal of the light emitting device D is connected to the negative voltage signal terminal.
In a specific implementation process, the principle of controlling the anode potential by the pixel circuit is the same as the principles of the first and second embodiments, and please refer to the related description above for details, which is not repeated herein.
The timing signal diagram for the pixel circuit of fig. 11 can be seen in fig. 9. Fig. 12 is a state diagram of the pixel circuit of fig. 11 at various stages under the timing control of fig. 9. As shown in fig. 12, in the reset period T1, the eighth transistor T8 and the fourteenth transistor T14 are turned on, the ninth transistor T9, the eleventh transistor T11, the twelfth transistor T12 and the thirteenth transistor T13 are all turned off, the potential control terminal Y is inputted with a pull-down signal, the control electrode of the tenth transistor T10 is reset, and the light emitting device D does not emit light. In the data writing period T2, the ninth transistor T9 and the eleventh transistor T11 are turned on, the eighth transistor T8, the fourteenth transistor T14, the twelfth transistor T12 and the thirteenth transistor T13 are turned off, the data signal is written into the control terminal of the tenth transistor T10, the pull-down signal is input to the potential control terminal Y, and the light emitting device D does not emit light. In the light emitting period T3 and the light emitting holding period T5, the twelfth transistor T12 and the thirteenth transistor T13 are both turned on, the eighth transistor T8, the fourteenth transistor T14, the ninth transistor T9 and the eleventh transistor T11 are all turned off, the output terminal of the tenth transistor T10 outputs a light emitting signal, the potential control terminal Y inputs a pull-up signal, and the light emitting device D emits light. In the light emission disabled period T4, the first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 are all turned off, the potential control terminal Y receives a pull-down signal, and the light emitting device D does not emit light.
In fig. 11, the reset control signal transmitted from the first scan signal terminal X1 of the pixel circuit may be represented as Gate (n-1), the data write signal transmitted from the second scan signal terminal X2 and the data write signal transmitted from the third scan signal terminal X3 may be represented as Gate (n), and the emission signal transmitted from the emission signal control terminal E and the potential control signal transmitted from the bootstrap capacitor Crst may be represented as em (n).
Example four
Fig. 13 is a schematic structural diagram of a pixel circuit according to still another embodiment of the present invention, and as shown in fig. 13, the pixel circuit of the present embodiment is obtained by replacing the seventh transistor T7 in the circuit diagram of the embodiment shown in fig. 4 with a bootstrap capacitor. Fig. 14 is a timing signal diagram corresponding to the pixel circuit of fig. 13. In one specific implementation, the first transistor T1 and the second transistor T2 may also be both N-type transistors; the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all P-type transistors.
Specifically, the first transistor T1 and the second transistor T2 are both N-type indium gallium zinc oxide transistors, but the present embodiment is not limited to this transistor, and may also be N-type transistors of other oxides; the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all P-type low temperature polysilicon transistors.
In a specific implementation process, the potential control terminal Y and the light-emitting signal control terminal E are two different terminals, and the potential control terminal Y may send a control signal iem (n) opposite to the light-emitting signal EM of the light-emitting signal control terminal E, so that in the light-emitting stage, when the light-emitting signal EM is a low-level signal, the potential control terminal Y sends a high-level signal and the light-emitting device D can normally emit light, and in the other stage, when the light-emitting signal EM is a high-level signal, the potential control terminal Y sends a low-level signal and the potential control terminal Y can pull down the potential of the anode terminal of the light-emitting device D, so as to prevent the light-emitting device D from being lighted again.
EXAMPLE five
The invention also provides a driving method of the pixel circuit, which is used for driving the pixel circuit of the embodiment.
The driving method of the pixel circuit of the present embodiment may include:
in a reset phase t1 of the refresh frame state, a reset permission control signal is input through the first scan signal terminal X1, a first write prohibition data signal is input through the second scan terminal X2, a second write prohibition data signal is input through the third scan terminal X3, a light-emitting signal control terminal E inputs a light-emitting stop signal, and a pull-down potential signal is input through the potential control terminal Y, so that a reset voltage is written through the control terminal of the driving unit of the light-emitting driving module 1, and the voltage of the anode terminal of the light-emitting device D is reduced to a voltage corresponding to the pull-down potential signal through the bootstrap capacitor Crst to prohibit the light-emitting device D from emitting light; the voltage corresponding to the pull-down potential signal is smaller than the turn-on voltage of the light-emitting device D;
in a data writing phase t2 of a refresh frame state, a reset prohibition control signal is input through a first scan signal terminal X1, a first write data signal is input through a second scan terminal X2, a second write data signal is input through a third scan terminal X3, a light-emitting signal control terminal E inputs a light-emitting stop signal, and a pull-down potential signal is input through a potential control terminal Y, so that a data voltage is written into a control terminal of a driving unit of the light-emitting driving module 1, and the voltage of an anode terminal of the light-emitting device D is maintained at a voltage corresponding to the pull-down potential signal by the bootstrap capacitor Crst, so as to prohibit the light-emitting device D from emitting light;
in a light-emitting period t3 of a refresh frame state, a reset prohibition control signal is input through a first scan signal terminal X1, a first write prohibition data signal is input through a second scan terminal X2, a second write prohibition data signal is input through a third scan terminal X3, so that the light-emitting driving module 1 enters a data output state, a light-emitting signal is input through a light-emitting signal control terminal E, and a pull-up potential signal is input through a potential control terminal Y, so that the bootstrap capacitor Crst pulls up a voltage of an anode terminal of the light-emitting device D to a voltage corresponding to the pull-up potential signal, so that the light-emitting driving module 1 drives the light-emitting device D to emit light.
In a specific implementation process, the method for driving the pixel circuit of this embodiment may further include:
in a light emission prohibition period t4 of a frame holding state, a reset prohibition control signal is input through a first scan signal terminal X1, a first write prohibition data signal is input through a second scan terminal X2, a second write prohibition data signal is input through a third scan terminal X3, a light emission stop signal is input through a light emission signal control terminal E, so that the light emission driving module 1 enters a light emission prohibition state, and a pull-down potential signal is input through a potential control terminal Y, so that the bootstrap capacitor Crst maintains the voltage of the anode terminal of the light emitting device D at the voltage corresponding to the pull-down potential signal, so as to prohibit the light emitting device D from emitting light;
in a light-emitting period t5 during which a frame state is maintained, a reset prohibition control signal is input from the first scan terminal X1, a first write prohibition data signal is input from the second scan terminal X2, a second write prohibition data signal is input from the third scan terminal X3, so that the light-emitting driving module 1 enters a data output state, a light-emitting signal is input from the light-emitting signal control terminal E, and a pull-up potential signal is input from the potential control terminal Y, so that the bootstrap capacitor Crst pulls up the voltage at the anode terminal of the light-emitting device D to a voltage corresponding to the pull-up potential signal, so that the light-emitting driving module 1 drives the light-emitting device D to emit light.
In a specific implementation process, the method for driving the pixel circuit of this embodiment may further include:
and determining the capacitance value of a bootstrap capacitor in the self-lifting capacitor Crst according to the voltage of the anode end of the light-emitting device D, the pull-up voltage of the potential control end Y, the pull-down voltage of the potential control end Y, the capacitance value of the parasitic capacitor of the light-emitting device D and the conduction voltage of the light-emitting device D.
EXAMPLE six
The embodiment of the invention also provides a display panel, which comprises the pixel circuit in the embodiment.
The embodiment of the invention also provides a display device which comprises the display panel of the embodiment.
The embodiment of the invention also provides a terminal which comprises the display panel of the embodiment.
It is understood that the same or similar parts in the above embodiments may be mutually referred to, and the same or similar parts in other embodiments may be referred to for the content which is not described in detail in some embodiments.
It should be noted that the terms "first," "second," and the like in the description of the present invention are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Further, in the description of the present invention, the meaning of "a plurality" means at least two unless otherwise specified.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (13)

1. The pixel circuit is characterized by comprising a light-emitting driving module, a light-emitting device and a bootstrap capacitor;
the reset control end of the light-emitting drive module is electrically connected with the first scanning signal end, the first data write-in control end of the light-emitting drive module is electrically connected with the second scanning end, and the second data write-in control end of the light-emitting drive module is electrically connected with the third scanning end; the light-emitting driving end of the light-emitting driving module is electrically connected with the light-emitting signal control end;
the output end of the light-emitting driving module and the first end of the bootstrap capacitor are respectively electrically connected with the anode end of the light-emitting device;
the second end of the bootstrap capacitor is electrically connected with the potential control end;
when the output end of the light-emitting driving module outputs a light-emitting stopping signal, the potential control end inputs a pull-down potential signal, so that the bootstrap capacitor reduces the voltage of the anode end of the light-emitting device to the voltage corresponding to the pull-down potential signal, and the light-emitting device is prohibited from emitting light.
2. The pixel circuit according to claim 1, wherein the light emission driving module includes a reset unit, a data writing unit, a driving unit, and a light emission control unit;
the control end of the reset unit is used as the reset control end of the light-emitting driving module, and the control end of the reset unit is electrically connected with the first scanning signal end; the input end of the reset unit is electrically connected with the reset signal end; the output end of the reset unit and the first output end of the data writing unit are respectively and electrically connected with the control end of the driving unit;
the input end of the driving unit and the second output end of the data writing unit are respectively electrically connected with the first output end of the light-emitting control unit; the output end of the driving unit and the first input end of the data writing unit are respectively electrically connected with the first input end of the light-emitting control unit;
the first control end of the data writing unit is used as the first data writing control end of the light-emitting driving module, the first control end of the data writing unit is electrically connected with the second scanning signal end, the second control end of the data writing unit is used as the second data writing control end of the light-emitting driving module, and the second control end of the data writing unit is electrically connected with the third scanning signal end; the second input end of the data writing unit is electrically connected with the data signal end;
a second output end of the light-emitting control unit is used as an output end of the light-emitting driving module, and is electrically connected with an anode end of the light-emitting device; the first control end of the light-emitting control unit and the second control end of the light-emitting control unit are used as light-emitting drive ends of the light-emitting drive module, and the first control end of the light-emitting control unit and the second control end of the light-emitting control unit are respectively and electrically connected with a light-emitting signal control end; and the second input end of the light-emitting control unit is electrically connected with the voltage signal end.
3. The pixel circuit according to claim 2, wherein the reset unit includes a first transistor; the data writing unit includes a second transistor and a fourth transistor; the driving unit includes a third transistor; the light emission control unit includes a fifth transistor and a sixth transistor;
a control electrode of the first transistor is used as a control end of the reset unit, a first electrode of the first transistor is used as an input end of the reset unit, and a second electrode of the first transistor is used as an output end of the reset unit;
a control electrode of the second transistor is used as a first control end of a data writing unit, a first electrode of the second transistor is used as a first input end of the data writing unit, and a second electrode of the second transistor is used as a first output end of the data writing unit;
a control electrode of the third transistor is used as a control end of the driving unit, a first electrode of the third transistor is used as an output end of the driving unit, and a second electrode of the third transistor is used as an input end of the driving unit;
a control electrode of the fourth transistor is used as a second control end of the data writing unit; a first pole of the fourth transistor is used as a second output end of the data writing unit, and a second pole of the fourth transistor is used as a second input end of the data writing unit;
a control electrode of the fifth transistor is used as a second control end of the light-emitting control unit, a first electrode of the fifth transistor is used as a first output end of the light-emitting control unit, and a second electrode of the fifth transistor is used as a second input end of the light-emitting control unit;
a control electrode of the sixth transistor is used as a first control end of the light-emitting control unit, a first electrode of the sixth transistor is used as a second output end of the light-emitting control unit, and a second electrode of the sixth transistor is used as a first input end of the light-emitting control unit;
the control electrode of the first transistor is electrically connected with a first scanning signal end, and the first electrode of the first transistor is electrically connected with a reset signal end; a second pole of the first transistor and a second pole of the second transistor are respectively electrically connected with a control end of the third transistor;
a second pole of the third transistor and a first pole of the fourth transistor are respectively connected to a first pole of the fifth transistor; a first pole of the third transistor and a first pole of the second transistor are electrically connected to a second pole of the sixth transistor, respectively;
the control electrode of the fourth transistor is electrically connected with the third scanning signal end; a second pole of the fourth transistor is electrically connected with the data signal end;
a first electrode of the sixth transistor is used as an output end of the light-emitting driving module, and the first electrode of the sixth transistor is electrically connected with an anode end of the light-emitting device; the control electrode of the sixth transistor and the control electrode of the fifth transistor are respectively electrically connected with a light-emitting signal control end; and the second pole of the fifth transistor is electrically connected with the voltage signal end.
4. The pixel circuit according to claim 3, wherein the third transistor is a P-type transistor;
the first transistor, the second transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all N-type transistors;
the potential control end and the light-emitting signal control end are the same end.
5. The pixel circuit according to any one of claims 2 to 4, wherein the second scan signal terminal and the third scan signal terminal are the same terminal.
6. The pixel circuit according to claim 3, wherein the first transistor and the second transistor are both N-type transistors;
the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all P-type transistors.
7. The pixel circuit according to claim 6, wherein the first transistor and the second transistor are both N-type indium gallium zinc oxide transistors;
the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all P-type low temperature polysilicon transistors.
8. A method of driving a pixel circuit according to any one of claims 1 to 7, comprising:
in a reset stage of a refresh frame state, inputting a reset permission control signal through the first scanning signal terminal, inputting a first write prohibition data signal through the second scanning terminal, inputting a second write prohibition data signal through the third scanning terminal, inputting a light emitting signal stop signal through the light emitting signal control terminal, inputting a pull-down potential signal through the potential control terminal, so that a reset voltage is written into the control terminal of the driving unit of the light emitting driving module, and the voltage of the anode terminal of the light emitting device is reduced to a voltage corresponding to the pull-down potential signal through the bootstrap capacitor, so as to prohibit the light emitting device from emitting light; the voltage corresponding to the pull-down potential signal is smaller than the turn-on voltage of the light-emitting device;
in a data writing stage of a refresh frame state, inputting a reset prohibition control signal through a first scanning signal terminal, inputting a first writing data signal into a second scanning terminal, inputting a second writing data signal into a third scanning terminal, inputting a light-emitting signal stopping signal into a light-emitting signal control terminal, and inputting a pull-down potential signal into a potential control terminal, so that a data voltage is written into the control terminal of a driving unit written by a light-emitting driving module, and the voltage of an anode terminal of a light-emitting device is maintained at a voltage corresponding to the pull-down potential signal by a bootstrap capacitor, so as to prohibit the light-emitting device from emitting light;
in a light emitting stage of a refresh frame state, a reset prohibition control signal is input through a first scanning signal terminal, a first write prohibition data signal is input through a second scanning terminal, a second write prohibition data signal is input through a third scanning terminal, a light emitting signal is input through a light emitting signal control terminal, a pull-up potential signal is input through a potential control terminal, so that the bootstrap capacitor pulls up a voltage of an anode terminal of the light emitting device to a voltage corresponding to the pull-up potential signal, and the light emitting drive module drives the light emitting device to emit light.
9. The method for driving the pixel circuit according to claim 8, further comprising:
in a light-emitting prohibition stage of maintaining a frame state, inputting a reset prohibition control signal through a first scanning signal terminal, inputting a first write prohibition data signal through a second scanning terminal, inputting a second write prohibition data signal through a third scanning terminal, inputting a light-emitting stop signal through a light-emitting signal control terminal, and inputting a pull-down potential signal through a potential control terminal, so that the bootstrap capacitor maintains the voltage of the anode terminal of the light-emitting device at the voltage corresponding to the pull-down potential signal, thereby prohibiting the light-emitting device from emitting light;
in a light-emitting holding stage of holding a frame state, a reset prohibition control signal is input through a first scanning signal terminal, a first write prohibition data signal is input through a second scanning terminal, a second write prohibition data signal is input through a third scanning terminal, a light-emitting signal is input through a light-emitting signal control terminal, a pull-up potential signal is input through a potential control terminal, so that the bootstrap capacitor pulls up a voltage of an anode terminal of the light-emitting device to a voltage corresponding to the pull-up potential signal, and the light-emitting driving module drives the light-emitting device to emit light.
10. The method for driving the pixel circuit according to claim 8 or 9, further comprising:
and determining the capacitance value of a bootstrap capacitor in the bootstrap capacitor according to the voltage of the anode end of the light-emitting device, the pull-up voltage of the potential control end, the pull-down voltage of the potential control end, the capacitance value of the parasitic capacitor of the light-emitting device and the conduction voltage of the light-emitting device.
11. A display panel comprising the pixel circuit according to any one of claims 1 to 7.
12. A display device comprising the display panel according to claim 11.
13. A terminal comprising the display panel of claim 11.
CN202110907230.6A 2021-08-09 2021-08-09 Pixel circuit, driving method thereof, display panel, display device and terminal Pending CN113971932A (en)

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