CN213717955U - Self-awakening timer and electronic equipment - Google Patents
Self-awakening timer and electronic equipment Download PDFInfo
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- CN213717955U CN213717955U CN202022232373.5U CN202022232373U CN213717955U CN 213717955 U CN213717955 U CN 213717955U CN 202022232373 U CN202022232373 U CN 202022232373U CN 213717955 U CN213717955 U CN 213717955U
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Abstract
The utility model discloses a from awakening up timer and electronic equipment, from awakening up timer includes: the clock source module, the preprocessing module, the counting module and the overflow mark module; the clock source module is used for outputting at least one clock source signal to the preprocessing module; the preprocessing module is used for carrying out frequency division on the clock source signal so as to obtain a frequency division signal and outputting the frequency division signal to the counting module; the counting module is used for counting according to the frequency division signal and outputting an overflow signal to the overflow mark module when the counting overflows; and the overflow mark module is used for triggering a timer to interrupt according to the overflow signal. Different clock source signals are set in the self-awakening timer, so that a multi-start timing function is realized, power consumption is reduced, and efficiency is improved.
Description
Technical Field
The utility model relates to a singlechip technical field especially relates to a from awakening up timer and electronic equipment.
Background
The 8-bit automatic resetting of the singlechip is one of the working modes of the timer, the maximum count can be 8 TH power (256) of 2, and the mode does not need to repeatedly write corresponding values into TH0 (the high eight-bit count of the timer) and TL0 (the low eight-bit count of the timer) and only needs to write once during initialization; after overflow, the value in TH0 is automatically stored in TL 0. The current timer has large power consumption, and the timer can only start a timing function singly and cannot start timing according to different clock sources.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide a self-awakening timer and an electronic device, which can solve the technical problem that the self-awakening timer in the prior art can not be started according to a plurality of clock sources.
In order to achieve the above object, the present invention provides a self-wake-up timer, which comprises: the clock source module, the preprocessing module, the counting module and the overflow mark module; wherein the content of the first and second substances,
the output end of the clock source module is connected with the input end of the preprocessing module, the output end of the preprocessing module is connected with the input end of the counting module, and the output end of the counting module is connected with the input end of the overflow mark module;
the clock source module is used for outputting at least one clock source signal to the preprocessing module;
the preprocessing module is used for carrying out frequency division on the clock source signal so as to obtain a frequency division signal and outputting the frequency division signal to the counting module;
the counting module is used for counting according to the frequency division signal and outputting an overflow signal to the overflow mark module when the counting overflows;
and the overflow mark module is used for triggering a timer to interrupt according to the overflow signal.
Optionally, the clock source module includes a first crystal oscillator and a second crystal oscillator; wherein the content of the first and second substances,
the clock source signal generated by the first crystal oscillator has a different frequency from the clock source signal generated by the second crystal oscillator.
Optionally, the clock source module further includes a selection switch and an and gate, an input end of the selection switch is connected to the output end of the first crystal oscillator, another input end of the selection switch is connected to the second crystal oscillator, an output end of the selection switch is connected to the first input end of the and gate, and the second input end of the and gate is configured to receive the clock source selection signal.
Optionally, the counting module includes a first counter, a second counter and a high impedance unit; the input end of the first counter is connected with the output end of the preprocessing module, the output end of the first counter is connected with the feedback end of the high-resistance unit, the trigger end of the first counter is connected with the output end of the high-resistance unit, the input end of the high-resistance unit is connected with the output end of the second counter, and the trigger end of the second counter is connected with the input end of the overflow marking module.
Optionally, the preprocessing module is further configured to receive a frequency division selection signal, divide the frequency of the clock source signal according to the frequency division selection signal to obtain a frequency division signal, and output the frequency division signal to the first counter.
Optionally, the second counter is configured to receive a reload signal, and control a count rate of the first counter according to the reload signal.
Optionally, the frequency division range of the preprocessing module is 1/1-1/512.
Optionally, the first crystal oscillator is a 10khz crystal oscillator, and the second crystal oscillator is a 32khz crystal oscillator.
In addition, in order to achieve the above object, the present invention also provides an electronic device, which includes the self-awakening timer as described above.
The utility model discloses a set up the self-awakening timer and include: the clock source module, the preprocessing module, the counting module and the overflow mark module; the output end of the clock source module is connected with the input end of the preprocessing module, the output end of the preprocessing module is connected with the input end of the counting module, and the output end of the counting module is connected with the input end of the overflow marking module; the clock source module is used for outputting at least one clock source signal to the preprocessing module; the preprocessing module is used for carrying out frequency division on the clock source signal so as to obtain a frequency division signal and outputting the frequency division signal to the counting module; the counting module is used for counting according to the frequency division signal and outputting an overflow signal to the overflow mark module when the counting overflows; and the overflow mark module is used for triggering a timer to interrupt according to the overflow signal. Different clock source signals are set in the self-awakening timer, so that a multi-start timing function is realized, a chip can be awakened periodically in a low power consumption mode, and the self-awakening timer can also be used as a universal timer. The timing starting can be carried out according to different clock sources, and the timing starting circuit is low in power consumption, simple in structure and low in cost.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a first embodiment of the self-wakeup timer of the present invention;
fig. 2 is a schematic circuit diagram of a second embodiment of the self-wakeup timer of the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 10 | |
11 | |
| 20 | Pre-processing |
12 | |
| 30 | |
13 | |
| 40 | |
14 | And |
| 31 | |
33 | |
| 32 | Second counter |
The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention.
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that all the directional indicators (such as upper, lower, left, right, front and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit ly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, it should be considered that the combination of the technical solutions does not exist, and is not within the protection scope of the present invention.
It should be noted that, in the practical application of the present invention, the software program is inevitably applied to the software program, but the applicant states here that the software program applied in the embodiment of the present invention is the prior art, and in the present application, the modification and protection of the software program are not involved, but only the protection of the hardware architecture designed for the purpose of the invention.
The utility model provides a from awakening up timer refers to fig. 1, and fig. 1 is the utility model discloses from awakening up timer first embodiment's schematic structure.
The self-wake-up timer includes: the clock source module 10, the preprocessing module 20, the counting module 30 and the overflow flag module 40; the output end of the clock source module 10 is connected to the input end of the preprocessing module 20, the output end of the preprocessing module 20 is connected to the input end of the counting module 30, and the output end of the counting module 30 is connected to the input end of the overflow flag module 40.
The clock source module 10 is configured to output at least one clock source signal to the preprocessing module 20.
It should be noted that the clock source module 10 includes, but is not limited to, a clock source, the clock source is a crystal oscillator, the clock source includes a plurality of crystal oscillators, and the clock signals generated by the crystal oscillators are different. The clock source module 10 may further include a selection switch for selecting different clock sources to obtain different clock signals.
The preprocessing module 20 is configured to perform frequency division on the clock source signal to obtain a frequency division signal, and output the frequency division signal to the counting module 30.
It is easy to understand that, the preprocessing module 20 divides the frequency of the clock source signal and outputs the divided clock source signal to the counting module 30, and the pre-division of the preprocessing module 20 can be controlled by an external signal to be adjusted according to different requirements.
The counting module 30 is configured to count according to the frequency division signal, and output an overflow signal to the overflow flag module 40 when the count overflows.
It should be noted that the counting module 30 includes two counters, one of which is used for counting, and the other is used for receiving the reload value, and determining the overflow rate of the counting according to the reload value.
The overflow flag module 40 is configured to trigger a timer interrupt according to the overflow signal.
It should be understood that the overflow flag module 40 is configured to detect an overflow signal when the count of the timer in the count module 30 expires, and trigger a timer interrupt according to the overflow signal.
It should be noted that, in specific implementation, since the self-wakeup timer includes multiple clock sources, different clock source signals can be sent out, and multiple counting modes of the self-wakeup timer are implemented.
In this embodiment, different clock source signals are set in the self-awakening timer, so that a multi-start timing function is realized, the chip can be periodically awakened in a low power consumption mode, and the self-awakening timer can also be used as a general timer. The timing starting can be carried out according to different clock sources, and the timing starting circuit is low in power consumption, simple in structure and low in cost.
Based on the utility model discloses a first embodiment provides the utility model discloses from awakening up the second embodiment of timer, refer to fig. 2. Fig. 2 is a schematic circuit diagram of a self-wakeup timer according to a second embodiment of the present invention;
the clock source module 10 at least includes a first oscillator 11 and a second oscillator 12; the clock source signal generated by the first oscillator 11 and the clock source signal generated by the second oscillator 12 have different frequencies.
In a specific implementation, the first crystal oscillator may be a 10khz crystal oscillator, and the second crystal oscillator may be a 32khz crystal oscillator.
It should be understood that, in order to increase the kinds of clock sources generated by the clock source module 10, the clock source module 10 may include more different clock sources, such as: the self-awakening timer comprises a first crystal oscillator, a second crystal oscillator, a third crystal oscillator, a fourth crystal oscillator and an Nth crystal oscillator, wherein the first crystal oscillator and the second crystal oscillator are arranged in a circuit board, the third crystal oscillator and the fourth crystal oscillator generate different clock source signals, and under the consideration of the wiring space and the practical application of the self-awakening timer, more crystal oscillators can be added according to the practical requirement.
The clock source module further comprises a selection switch 13 and an and gate 14, wherein one input end of the selection switch 13 is connected with the output end of the first crystal oscillator 11, the other input end of the selection switch 13 is connected with the second crystal oscillator 12, the output end of the selection switch 13 is connected with the first input end of the and gate 14, and the second input end of the and gate 14 is used for receiving a clock source selection signal.
It should be understood that the selection switch 13 receives a selection signal sent from the outside for switching, and when the received selection signal corresponds to an input terminal, closes the input terminal, so that the first crystal oscillator 11 outputs a clock source signal; when the received selection signal corresponds to the other input terminal, the other input terminal is closed, so that the second oscillator 12 outputs the clock source signal. The and gate 14 receives a clock selection signal, when the clock source signal and the clock selection signal are simultaneously input to the and gate 14, the and gate 14 outputs the clock source signal to the preprocessing module 20, and otherwise, the clock source signal is not output.
In specific implementation, the selection switches may also be multiple, each selection switch is connected to two oscillators, each two selection switches are controlled by the same selection switch to form a selection network, and each branch corresponds to one oscillator, so that the clock source module 10 can output multiple clock source signals without interference between the signals.
The counting module 30 includes a first counter 31, a second counter 32 and a high impedance unit 33; the input end of the first counter 31 is connected to the output end of the preprocessing module 20, the output end of the first counter 31 is connected to the feedback end of the high impedance unit 33, the trigger end of the first counter 31 is connected to the output end of the high impedance unit 33, the input end of the high impedance unit 33 is connected to the output end of the second counter 32, and the trigger end of the second counter 32 is connected to the input end of the overflow flag module 40 (not shown in the figure, but not affecting the explanation of the embodiment).
The preprocessing module 20 is further configured to receive a frequency division selection signal, divide the frequency of the clock source signal according to the frequency division selection signal to obtain a frequency division signal, and output the frequency division signal to the first counter 31.
It should be noted that the preprocessing module 20 is an eight-bit automatic reload number-up timer, and the frequency division range corresponding to the eight-bit automatic reload number-up timer is 1/1-1/512. The second counter 32 is used for receiving a reload signal and controlling the counting rate of the first counter 31 according to the reload signal.
It will be readily appreciated that the second timer 32 receives the reload value and determines the overflow speed based on the reload value, and that the overflow flag module 40 sets 1 when the first counter 31 counts overflow and reloads the value of the second counter 32 to the first counter 31, the first counter 31 being an eight bit counter.
In this embodiment, by setting a plurality of clock sources, the self-awakening timer has a plurality of clock source signals, can perform a plurality of start timing functions, has a simple circuit, is easy to expand, can awaken a chip periodically in a low power consumption mode, and can also be used as a universal timer. The timing starting can be carried out according to different clock sources, and the timing starting circuit is low in power consumption, simple in structure and low in cost.
Furthermore, in order to achieve the above object, the present invention further provides an electronic device, which includes the self-wake-up timer as described above.
Since the electronic device adopts all technical solutions of all the embodiments, at least all the beneficial effects brought by the technical solutions of the embodiments are achieved, and no further description is given here.
It should be understood that the above is only an example, and the technical solution of the present invention is not limited in any way, and in the specific application, those skilled in the art can set the solution as required, and the present invention is not limited thereto.
It should be noted that the above-described work flow is only illustrative, and does not limit the scope of the present invention, and in practical applications, a person skilled in the art may select some or all of them to achieve the purpose of the solution of the embodiment according to practical needs, and the present invention is not limited herein.
In addition, the technical details that are not elaborated in this embodiment can be referred to the self-awakening timer provided in any embodiment of the present invention, and are not described herein again.
Further, it is to be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above embodiment numbers of the present invention are only for description, and do not represent the advantages and disadvantages of the embodiments.
The above is only the preferred embodiment of the present invention, and not the scope of the present invention, all the equivalent structures or equivalent flow changes made by the contents of the specification and the drawings or the direct or indirect application in other related technical fields are included in the patent protection scope of the present invention.
Claims (9)
1. A self-wakeup timer, the self-wakeup timer comprising: the clock source module, the preprocessing module, the counting module and the overflow mark module; wherein the content of the first and second substances,
the output end of the clock source module is connected with the input end of the preprocessing module, the output end of the preprocessing module is connected with the input end of the counting module, and the output end of the counting module is connected with the input end of the overflow mark module;
the clock source module is used for outputting at least one clock source signal to the preprocessing module;
the preprocessing module is used for carrying out frequency division on the clock source signal so as to obtain a frequency division signal and outputting the frequency division signal to the counting module;
the counting module is used for counting according to the frequency division signal and outputting an overflow signal to the overflow mark module when the counting overflows;
and the overflow mark module is used for triggering a timer to interrupt according to the overflow signal.
2. The self-wakeup timer according to claim 1, wherein the clock source module includes a first crystal oscillator and a second crystal oscillator; wherein the content of the first and second substances,
the clock source signal generated by the first crystal oscillator has a different frequency from the clock source signal generated by the second crystal oscillator.
3. The self-wakeup timer according to claim 2, wherein the clock source module further includes a selection switch and an and gate, one input terminal of the selection switch is connected to the output terminal of the first oscillator, another input terminal of the selection switch is connected to the second oscillator, an output terminal of the selection switch is connected to the first input terminal of the and gate, and the second input terminal of the and gate is configured to receive the clock source selection signal.
4. The self-wakeup timer according to claim 3, wherein the counting module includes a first counter, a second counter, and a high impedance unit; the input end of the first counter is connected with the output end of the preprocessing module, the output end of the first counter is connected with the feedback end of the high-resistance unit, the trigger end of the first counter is connected with the output end of the high-resistance unit, the input end of the high-resistance unit is connected with the output end of the second counter, and the trigger end of the second counter is connected with the input end of the overflow marking module.
5. The self-wakeup timer according to claim 4, wherein the preprocessing module is further configured to receive a frequency division selection signal, divide the frequency of the clock source signal according to the frequency division selection signal to obtain a frequency division signal, and output the frequency division signal to the first counter.
6. The self-wakeup timer according to claim 5, wherein the second counter is configured to receive a reload signal and control a count rate of the first counter according to the reload signal.
7. The self-wakeup timer according to claim 6, wherein the frequency division range of the pre-processing module is 1/1-1/512.
8. The self-wakeup timer according to claim 7, wherein the first crystal oscillator is a 10khz crystal oscillator and the second crystal oscillator is a 32khz crystal oscillator.
9. An electronic device, comprising the self-wakeup timer according to any one of claims 1 to 8.
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| CN202022232373.5U CN213717955U (en) | 2020-10-09 | 2020-10-09 | Self-awakening timer and electronic equipment |
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| CN202022232373.5U CN213717955U (en) | 2020-10-09 | 2020-10-09 | Self-awakening timer and electronic equipment |
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| CN213717955U true CN213717955U (en) | 2021-07-16 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115179879A (en) * | 2022-07-25 | 2022-10-14 | 小米汽车科技有限公司 | Vehicle self-awakening method and device, vehicle and storage medium |
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- 2020-10-09 CN CN202022232373.5U patent/CN213717955U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115179879A (en) * | 2022-07-25 | 2022-10-14 | 小米汽车科技有限公司 | Vehicle self-awakening method and device, vehicle and storage medium |
| CN115179879B (en) * | 2022-07-25 | 2024-04-09 | 小米汽车科技有限公司 | Vehicle self-wake-up method and device, vehicle and storage medium |
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