CN213519409U - Box-packed SMD piezo-resistor - Google Patents
Box-packed SMD piezo-resistor Download PDFInfo
- Publication number
- CN213519409U CN213519409U CN202023081428.3U CN202023081428U CN213519409U CN 213519409 U CN213519409 U CN 213519409U CN 202023081428 U CN202023081428 U CN 202023081428U CN 213519409 U CN213519409 U CN 213519409U
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- Prior art keywords
- pin
- patch
- heat
- piezoresistor
- fin
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- Expired - Fee Related
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- 230000017525 heat dissipation Effects 0.000 claims abstract description 21
- 230000001681 protective effect Effects 0.000 claims abstract description 11
- 239000004519 grease Substances 0.000 claims description 4
- 229920001296 polysiloxane Polymers 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- 229910002804 graphite Inorganic materials 0.000 claims description 3
- 239000010439 graphite Substances 0.000 claims description 3
- 230000001419 dependent effect Effects 0.000 claims 2
- 238000010521 absorption reaction Methods 0.000 abstract description 4
- 238000009434 installation Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 2
- 241001391944 Commicarpus scandens Species 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000007770 graphite material Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
The utility model discloses a box-packed SMD (surface mounted device) piezoresistor, which comprises a SMD piezoresistor body, wherein the bottom of the SMD piezoresistor body is provided with a mounting seat, the top end of the mounting seat is fixedly provided with a protection box, and the SMD piezoresistor body is positioned in the protection box; the utility model has the advantages that: the utility model relates to a box-packed paster piezo-resistor, the area of contact of fin and air can be increased through the vertical recess of a plurality of and the horizontal gully of a plurality of that the fin top was seted up, in order to improve the radiating rate, the heat dissipation layer that sets up through the fin top can improve the radiating rate, the heat-conducting layer that sets up through the fin bottom can improve thermal conduction speed, can absorb the heat that paster piezo-resistor body lateral wall gived off through the heat absorption piece, and transmit for the fin, the pin is accomodate in the pin protective sheath during transportation, take the pin out during installation, and through first spacing portion, the spacing portion of second and elasticity card strip cooperate in order to fix the pin.
Description
Technical Field
The utility model relates to a piezo-resistor, in particular to box-packed paster piezo-resistor.
Background
The piezoresistor is a voltage-limiting type protection device. By utilizing the nonlinear characteristic of the piezoresistor, when overvoltage appears between two poles of the piezoresistor, the piezoresistor can clamp the voltage to a relatively fixed voltage value, thereby realizing the protection of a post-stage circuit. The main parameters of the varistor are: the common box-packed patch piezoresistor is not easy to dissipate heat because the protection box blocks the heat dissipation, and the pins are easy to break in the transportation process because the pins extend out of too long.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a box-packed formula paster piezo-resistor to solve the not good and easy cracked problem of pin in the transportation of the common box-packed formula paster piezo-resistor heat dissipation that proposes in the above-mentioned background art.
In order to achieve the above object, the utility model provides a following technical scheme: a box-packed SMD piezoresistor comprises a SMD piezoresistor body, wherein a mounting seat is arranged at the bottom of the SMD piezoresistor body, a protection box is fixedly arranged at the top end of the mounting seat, the SMD piezoresistor body is positioned in the protection box, a radiating fin is fixedly arranged at the top end of the protection box, a plurality of longitudinal grooves and a plurality of transverse gullies are formed in the top part of the radiating fin, a radiating layer is arranged at the top part of the radiating fin, a heat conducting layer is arranged at the bottom part of the radiating fin, heat absorbing fins are fixedly arranged on two sides of the bottom end of the radiating fin, two pin protecting sleeves are fixedly arranged at the bottom end of the mounting seat, pins are slidably arranged at the inner ends of the pin protecting sleeves, first limiting parts are arranged at the bottom parts of the pin protecting sleeves, second limiting parts are arranged at the top parts of the pins, the inner end of the accommodating groove is provided with an elastic clamping strip.
As an optimal technical scheme of the utility model, the heat dissipation layer is made for the graphite material.
As an optimal technical scheme of the utility model, the heat-conducting layer is made for the silicone grease material.
As an optimal technical scheme of the utility model, the diapire of fin closely laminates with the roof of paster piezo-resistor body.
As an optimized technical scheme of the utility model, the lateral wall of heat absorption piece closely laminates with the lateral wall of paster piezo-resistor body.
As an optimal technical scheme of the utility model, the pin passes through wire and paster piezo-resistor body electric connection.
As a preferable aspect of the present invention, the depth dimension of the longitudinal grooves is greater than the depth dimension of the lateral gullies.
Compared with the prior art, the beneficial effects of the utility model are that: the utility model relates to a box-packed paster piezo-resistor, the area of contact of fin and air can be increased through the vertical recess of a plurality of and the horizontal gully of a plurality of that the fin top was seted up, in order to improve the radiating rate, the heat dissipation layer that sets up through the fin top can improve the radiating rate, the heat-conducting layer that sets up through the fin bottom can improve thermal conduction speed, can absorb the heat that paster piezo-resistor body lateral wall gived off through the heat absorption piece, and transmit for the fin, the pin is accomodate in the pin protective sheath during transportation, take the pin out during installation, and through first spacing portion, the spacing portion of second and elasticity card strip cooperate in order to fix the pin.
Drawings
Fig. 1 is a schematic structural view of the present invention;
fig. 2 is a schematic sectional structure of the present invention;
fig. 3 is an enlarged schematic view of a portion a of fig. 2.
In the figure: 1. a chip varistor body; 101. a mounting seat; 2. a protective case; 3. a heat sink; 301. a longitudinal groove; 302. a lateral gully; 303. a heat dissipation layer; 304. a heat conductive layer; 4. a heat absorbing sheet; 5. a pin protective sleeve; 501. a first limiting part; 6. a pin; 601. a second limiting part; 602. a receiving groove; 603. an elastic clamping strip.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1-3, the present invention provides a cartridge type chip varistor, which comprises a chip varistor body 1, wherein a mounting seat 101 is disposed at the bottom of the chip varistor body 1, a protection box 2 is fixedly mounted at the top end of the mounting seat 101, the chip varistor body 1 is located in the protection box 2, a heat sink 3 is fixedly mounted at the top end of the protection box 2, a plurality of longitudinal grooves 301 and a plurality of transverse grooves 302 are formed at the top of the heat sink 3, the contact area between the heat sink 3 and air can be increased by the plurality of longitudinal grooves 301 and the plurality of transverse grooves 302 formed at the top of the heat sink 3 to increase the heat dissipation speed, a heat dissipation layer 303 is disposed at the top of the heat sink 3, the heat dissipation layer 303 is made of the existing heat dissipation material to increase the heat dissipation speed, a heat conduction layer 304 is disposed at the bottom of the heat sink 3, and the heat conduction layer, can improve thermal conduction speed through heat-conducting layer 304, the equal fixed mounting in both sides of 3 bottoms of fin has heat sink 4, heat sink 4 can absorb the heat that paster piezo-resistor body 1 lateral wall gived off, and transmit for fin 3, the bottom fixed mounting of mount pad 101 has two pin protective sleeves 5, the inner slidable mounting of pin protective sleeve 5 has pin 6, the bottom of pin protective sleeve 5 is provided with first spacing portion 501, the top of pin 6 is provided with the spacing portion 601 of second, cooperate through spacing portion 601 of second and first spacing portion 501 in order to prevent that pin 6 from breaking away from pin protective sleeve 5, accomodate groove 602 has been seted up at the top of pin 6 outer wall, the inner of accomodating groove 602 is provided with elasticity card strip 603, elasticity card strip 603 has elasticity, can accomodate in accomodating groove 602.
Preferably, the heat dissipation layer 303 is made of graphite, the heat dissipation rate of graphite is high, the heat dissipation speed can be increased, the heat conduction layer 304 is made of silicone grease, the thermal conductivity of silicone grease is high, and heat conduction plastics can be increased, the bottom wall of the heat dissipation fin 3 is tightly attached to the top wall of the chip varistor body 1, the side wall of the heat absorption fin 4 is tightly attached to the side wall of the chip varistor body 1, so that heat generated by the chip varistor body 1 can be dissipated quickly, the pin 6 is electrically connected with the chip varistor body 1 through a wire, and the depth dimension of the longitudinal groove 301 is larger than that of the transverse gully 302.
When in use, the box-packed SMD varistor of the present invention can increase the contact area between the heat sink 3 and the air by the plurality of vertical grooves 301 and the plurality of horizontal gullies 302 formed on the top of the heat sink 3 to increase the heat dissipation speed, the heat dissipation speed can be increased by the heat dissipation layer 303 provided on the top of the heat dissipation plate 3, the heat conduction speed can be increased by the heat conduction layer 304 provided on the bottom of the heat dissipation plate 3, the heat dissipated from the side wall of the chip varistor body 1 can be absorbed by the heat absorbing sheet 4 and transferred to the heat dissipating sheet 3, the pins 6 are accommodated in the pin protecting sleeves 5 during transportation, the pins 6 are drawn out during installation, the elastic clamping strips 603 are positioned at the bottom end of the first limiting part 501 after the pins 6 are drawn out, thereby preventing the pin 6 from retracting into the pin protection sleeve 5, and preventing the pin 6 from separating from the pin protection sleeve 5 by the cooperation of the second position-limiting portion 601 and the first position-limiting portion 501.
In the description of the present invention, it should be understood that the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention.
In the present invention, unless otherwise explicitly specified or limited, for example, it may be fixedly connected, detachably connected, or integrated; can be mechanically or electrically connected; they may be directly connected or indirectly connected through an intermediate medium, and may be connected through the inside of two elements or in an interaction relationship between two elements, unless otherwise specifically defined, and the specific meaning of the above terms in the present invention will be understood by those skilled in the art according to specific situations.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (7)
1. A box-packed patch piezoresistor comprises a patch piezoresistor body (1) and is characterized in that a mounting seat (101) is arranged at the bottom of the patch piezoresistor body (1), a protection box (2) is fixedly mounted at the top end of the mounting seat (101), the patch piezoresistor body (1) is positioned in the protection box (2), a radiating fin (3) is fixedly mounted at the top end of the protection box (2), a plurality of longitudinal grooves (301) and a plurality of transverse grooves (302) are formed in the top of the radiating fin (3), a radiating layer (303) is arranged at the top of the radiating fin (3), a heat conducting layer (304) is arranged at the bottom of the radiating fin (3), heat absorbing sheets (4) are fixedly mounted on two sides of the bottom end of the radiating fin (3), two pin protective sleeves (5) are fixedly mounted at the bottom end of the mounting seat (101), the inner slidable mounting of pin protective sheath (5) has pin (6), the bottom of pin protective sheath (5) is provided with first spacing portion (501), the top of pin (6) is provided with spacing portion of second (601), the top of pin (6) outer wall has been seted up and has been accomodate groove (602), the inner of accomodating groove (602) is provided with elasticity card strip (603).
2. The cartridge type patch varistor according to claim 1, wherein: the heat dissipation layer (303) is made of graphite.
3. The cartridge type patch varistor according to claim 1, wherein: the heat conducting layer (304) is made of silicone grease.
4. The cartridge type patch varistor according to claim 1, wherein: the bottom wall of the radiating fin (3) is tightly attached to the top wall of the patch piezoresistor body (1).
5. The cartridge type patch varistor according to claim 1, wherein: the side wall of the heat absorbing sheet (4) is tightly attached to the side wall of the patch voltage dependent resistor body (1).
6. The cartridge type patch varistor according to claim 1, wherein: the pins (6) are electrically connected with the patch voltage dependent resistor body (1) through wires.
7. The cartridge type patch varistor according to claim 1, wherein: the depth dimension of the longitudinal grooves (301) is greater than the depth dimension of the lateral corrugations (302).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023081428.3U CN213519409U (en) | 2020-12-18 | 2020-12-18 | Box-packed SMD piezo-resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023081428.3U CN213519409U (en) | 2020-12-18 | 2020-12-18 | Box-packed SMD piezo-resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213519409U true CN213519409U (en) | 2021-06-22 |
Family
ID=76428264
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202023081428.3U Expired - Fee Related CN213519409U (en) | 2020-12-18 | 2020-12-18 | Box-packed SMD piezo-resistor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN213519409U (en) |
-
2020
- 2020-12-18 CN CN202023081428.3U patent/CN213519409U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20210622 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |