CN213276462U - Two-way server mainboard and two-way server - Google Patents
Two-way server mainboard and two-way server Download PDFInfo
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- CN213276462U CN213276462U CN202022765319.7U CN202022765319U CN213276462U CN 213276462 U CN213276462 U CN 213276462U CN 202022765319 U CN202022765319 U CN 202022765319U CN 213276462 U CN213276462 U CN 213276462U
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Abstract
The utility model provides a two-way server mainboard, include: two processor sockets interconnected by four sets of XGMI2 buses; the processor base is used for installing the processor and is in communication connection with the processor; one group of memory slots are in communication connection with one processor base, and the other group of memory slots are in communication connection with the other processor base; the PCIE interface comprises two groups of PCIE slots, wherein one group of PCIE slots is in communication connection with one processor base, and the other group of PCIE slots is in communication connection with the other processor base; at least one PCIE slot in each group of PCIE slots is connected with a COMBO interface of the corresponding processor base. The utility model provides a support multiple configuration that double-circuit server mainboard can be nimble, full play CPU's performance.
Description
Technical Field
The utility model relates to a computer technology field especially relates to a double-circuit server mainboard and double-circuit server.
Background
The main board is an important part in a computer hardware system and is also a printed circuit board with the largest area in the main case. The main function of the main board is to transmit various electronic signals, and part of the chips are also responsible for primarily processing some peripheral data. All components in the server host are connected through a mainboard, and the control of the computer on the system memory, the storage device and other I/O devices during normal operation must be completed through the mainboard. Whether the performance of the CPU can be fully exerted is closely related to the main board.
Since the glad 7300 is a newly developed CPU of glad, there is no existing board card, and the existing motherboard design scheme cannot perfectly fit with the CPU, and cannot fully exert the performance of the CPU.
Disclosure of Invention
The utility model provides a double-circuit server mainboard and double-circuit server, support multiple configuration that can be nimble, full play CPU's performance.
In a first aspect, the utility model provides a two-way server mainboard, include:
two processor sockets interconnected by four sets of XGMI2 buses; the processor base is used for installing the processor and is in communication connection with the processor;
one group of memory slots are in communication connection with one processor base, and the other group of memory slots are in communication connection with the other processor base;
the PCIE interface comprises two groups of PCIE slots, wherein one group of PCIE slots is in communication connection with one processor base, and the other group of PCIE slots is in communication connection with the other processor base; at least one PCIE slot in each group of PCIE slots is connected with a COMBO interface of the corresponding processor base.
Optionally, the method further comprises:
a BMC chip connected to one of the processor sockets through a plurality of communication buses, wherein the plurality of communication buses include:
the PCIE bus is used for realizing the function of system display;
the LPC bus is used for the processor to transmit IPMI instructions and codes of 80 ports to the BMC, configure a BMC register and/or transmit system serial port information;
the UART bus is used for transmitting system serial port information and realizing the redirection function of the serial port;
an AMPL bus for mirroring the temperature of the CPU;
the USB bus is used for realizing the function of KVM;
the I2C bus is used to transmit power management signals, clock select signals, and/or reset control signals.
Optionally, the method further comprises:
one input of the one-out-of-two data selector is connected with a processor connected with a BMC chip through an SPI bus, and the other input of the one-out-of-two data selector is connected with the BMC chip through the SPI bus;
and the BIOS module is connected with the output of the alternative data selector through an SPI bus.
Optionally, the system further comprises an RTL8201F PHY chip, wherein the RTL8201F PHY chip is in communication connection with the BMC chip, and the communication between the RTL8201F PHY chip and the BMC chip follows the RGMII protocol.
Optionally, the system further comprises 4 USB interfaces, and the USB interfaces are connected to the processor base connected to the BMC chip.
Optionally, in the two sets of PCIE slots, each set of PCIE slots includes 4 x16 PCIE 4.0 slots, where two x16 PCIE 4.0 slots in each set are in communication connection with a COMBO interface of the corresponding processor base.
Optionally, each of the two groups of memory slots includes 16 DIMM memory slots.
The utility model provides a two-way server mainboard, adopt two treater bases, when installing the treater on two treater bases, two treater can carry out high speed's communication through four groups XGMI2 buses, simultaneously, two treater bases are respectively corresponding memory slot and PCIE slot communication connection, provide higher data transmission and access rate for two treater; in addition, because the PCIE slot connected with the COMBO interface can realize the conversion and the expansion of the PCIE slot by adding a switching board or an expansion board, and the flexibility of the mainboard configuration is improved.
In a second aspect, the present invention provides a two-way server, comprising a two-way server motherboard as described above.
Optionally, the method further comprises:
the multifunctional adapter board is in communication connection with the PCIE slots of the COMBO interface connected to the processor base, and 4 XGBE network interfaces, 4 SATA interfaces and/or 1 x8 PCIE slots are arranged on the multifunctional adapter board.
Optionally, the method further comprises:
the expansion board is in communication connection with the PCIE slots, and 2 PCIE x8 slots are arranged on the expansion board, or 1 PCIE x8 slot and 2 PCIE x4 slots are arranged on the expansion board.
In the utility model provides a two-way server, adopt two treater bases, when installing the treater on two treater bases, two treater can carry out high speed's communication through four groups XGMI2 buses, simultaneously, two treater bases are respectively corresponding memory slot and PCIE slot communication connection, provide higher data transmission and access rate for two treater; in addition, because the PCIE slot connected with the COMBO interface can realize the conversion and the expansion of the PCIE slot by adding a switching board or an expansion board, and the flexibility of the mainboard configuration is improved.
Drawings
Fig. 1 is a schematic diagram illustrating a connection between a processor and a memory slot of a motherboard of a dual-path server according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating a connection between a processor and a PCIE slot of a motherboard of a two-way server according to another embodiment of the present invention;
fig. 3 is a schematic diagram illustrating a connection between a processor and a BMC chip of a two-way server motherboard according to another embodiment of the present invention;
fig. 4 is an overall schematic diagram of a two-way server motherboard according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
An embodiment of the utility model provides a two-way server mainboard, include:
two processor sockets interconnected by four sets of XGMI2 buses; the processor base is used for installing the processor and is in communication connection with the processor; as a preferred embodiment, the two processor bases are two bases packaged in an SP 34094 packaging manner, the two processor bases are used for mounting the marine light 7300CPU, after the marine light 7300CPU is mounted on the two processor bases, the two CPUs are interconnected through 4 groups of X16 XGMI2, the interconnection rate can reach 12.8GT/S, the communication delay between the two CPUs can be reduced, and the overall efficiency of the server is improved.
One group of memory slots are in communication connection with one processor base, and the other group of memory slots are in communication connection with the other processor base; in an optional embodiment, each of the two groups of memory slots includes 16 DIMM memory slots, and the highest speed is 3200MHz, and supports UDIMM/RDIMM/LRDIMM. The connection between the two memory slots and the two processor sockets is shown in fig. 1.
The PCIE interface comprises two groups of PCIE slots, wherein one group of PCIE slots is in communication connection with one processor base, and the other group of PCIE slots is in communication connection with the other processor base; at least one PCIE slot in each group of PCIE slots is connected with a COMBO interface of the corresponding processor base. As an optional implementation manner, in the two sets of PCIE slots, each set of PCIE slots includes 4 x16 PCIE 4.0 slots, where two x16 PCIE 4.0 slots in each set are communicatively connected to a COMBO interface of the corresponding processor base. The 8 x16 PCIE 4.0 slots can support the 16GT/s signal rate at most; when the processor is mounted on the processor base, since P0, P1 of each CPU of the maritime 7300 processor supports COMBO PHY, slots 1, 3, 5, and 7 are connected to P0, P1 of CPU0 and P0, P1 of CPU1, respectively. Thus, by inserting the multifunctional adapter board into the slot, x16 PCIE 4.0 can be switched into 4 XGBE network interfaces, 4 SATA interfaces and 1 x8 PCIE slot; alternatively, other PCIE-wide cards may be supported by inserting an expansion board, for example, to convert to 2 PCIE x8 slots or to convert to 1 x8 and 2 x4 PCIE slots; or when the multifunctional adapter board is not inserted, 1 PCIE direct card of x16/x8/x4/x2/x1 is supported. By the mode, the same mainboard can flexibly support various different configurations according to actual requirements. In addition, x16 signals connected by 4 PCIE slots (PCIE slot 2/4/6/8) come from PCIE PHYs of CPU0 and CPU1, only support PCIE protocols, and support 1 PCIE direct card of x16/x8/x4/x2/x1, of course, other PCIE-wide cards may also be supported by an expansion board, for example, the card is expanded to 2 PCIE x8 slots or expanded to 1 PCIE x8 and 2 PCIE x4 slots, and the like. Fig. 2 shows a connection diagram of the two sets of PCIE slots.
As an optional implementation manner of this embodiment, as shown in fig. 3, the two-way server motherboard further includes: a BMC chip connected to one of the processor sockets through a plurality of communication buses, wherein the plurality of communication buses include: the PCIE bus is used for realizing the function of system display; the LPC bus is used for the processor to transmit IPMI instructions and codes of 80 ports to the BMC, configure a BMC register and/or transmit system serial port information; the UART bus is used for transmitting system serial port information and realizing the redirection function of a serial port, after the serial port information of the CPU can be sent to the BMC, the SOL function is realized through BMC firmware, and the serial port information of the CPU can be seen when the CPU logs in a BMC web to open an SOL interface, so that remote debugging is realized; an AMPL bus for transmitting the temperature of the CPU; the USB bus is used for realizing the function of KVM; the I2C bus is used to transmit power management signals, clock select signals, and/or reset control signals.
As a preferred embodiment, as shown in fig. 3, the two-way server motherboard further includes:
one input of the one-out-of-two data selector is connected with a processor connected with a BMC chip through an SPI bus, and the other input of the one-out-of-two data selector is connected with the BMC chip through the SPI bus; and the BIOS module is connected with the output of the alternative data selector through an SPI bus. The BMC and the CPU0 are both connected to an alternative selector (i.e. MUX) through SPI communication protocol communication, the MUX can select whether the BIOS flash is connected with the CPU0 or the BMC under the control of the BMC, the BIOS is connected with the CPU0 when the system normally runs, and the BMC is connected when the BIOS is required to be burned through the BMC.
As an optional implementation manner, as shown in fig. 3, the two-way server motherboard further includes an RTL8201F PHY chip, the RTL8201F PHY chip is in communication connection with the BMC chip, and the communication between the RTL8201F PHY chip and the BMC chip follows the RGMII protocol. The RTL8201F PHY chip is in communication connection with an RJ45 interface, and the RTL8201F PHY chip and the RJ45 interface are in communication according to an MDI protocol. After the RJ45 is connected with a network, the system can be remotely managed.
As an optional implementation manner, the system further comprises 4 USB interfaces, and the USB interfaces are connected with the processor base connected with the BMC chip.
The above embodiments of the present embodiment can be combined freely to form different technical solutions, and when all the above embodiments are combined, a schematic diagram thereof is shown in fig. 4.
In the dual-path server motherboard provided by this embodiment, two processor bases are adopted, when processors are installed on the two processor bases, the two processors can perform high-speed communication through four groups of XGMI2 buses, and meanwhile, the two processor bases are respectively in communication connection with corresponding memory slots and PCIE slots, so as to provide high data transmission and access rates for the two processors; in addition, because the PCIE slot connected with the COMBO interface can realize the conversion and the expansion of the PCIE slot by adding a switching board or an expansion board, and the flexibility of the mainboard configuration is improved.
On the basis of the foregoing embodiments, the present embodiment provides a two-way server, including the two-way server motherboard in any one of the foregoing embodiments.
As an optional implementation, the above two-way server further includes: the multifunctional adapter board is in communication connection with the PCIE slots of the COMBO interface connected to the processor base, and 4 XGBE network interfaces, 4 SATA interfaces and/or 1 x8 PCIE slots are arranged on the multifunctional adapter board. When the processor is mounted on the processor base, since P0, P1 of each CPU of the maritime 7300 processor supports COMBO PHY, slots 1, 3, 5, and 7 are connected to P0, P1 of CPU0 and P0, P1 of CPU1, respectively. Thus, in a form of inserting a multifunctional adapter board into a slot, for example, x16 PCIE 4.0 is switched into 4 XGBE network interfaces, 4 SATA interfaces and 1 x8 PCIE slot; by the mode, the same mainboard can flexibly support various different configurations according to actual requirements.
As an optional implementation, the above two-way server further includes: the expansion board is in communication connection with the PCIE slots, and 2 PCIE x8 slots are arranged on the expansion board, or 1 PCIE x8 slot and 2 PCIE x4 slots are arranged on the expansion board. The expansion board may be inserted into any PCIE slot, or the number of expansion boards may be selected according to needs, and the server may support other PCIE-wide add-in cards by inserting the expansion board, for example, converting into 2 PCIE x8 slots or converting into 1 PCIE x8 and 2 PCIE x4 slots.
In the dual-path server provided by this embodiment, two processor bases are adopted, when processors are installed on the two processor bases, the two processors can perform high-speed communication through four groups of XGMI2 buses, and meanwhile, the two processor bases are respectively in communication connection with corresponding memory slots and PCIE slots, so as to provide high data transmission and access rates for the two processors; in addition, because the PCIE slot connected with the COMBO interface can realize the conversion and the expansion of the PCIE slot by adding a switching board or an expansion board, and the flexibility of the mainboard configuration is improved.
The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A two-way server motherboard, comprising:
two processor sockets interconnected by four sets of XGMI2 buses; the processor base is used for installing the processor and is in communication connection with the processor;
one group of memory slots are in communication connection with one processor base, and the other group of memory slots are in communication connection with the other processor base;
the PCIE interface comprises two groups of PCIE slots, wherein one group of PCIE slots is in communication connection with one processor base, and the other group of PCIE slots is in communication connection with the other processor base; at least one PCIE slot in each group of PCIE slots is connected with a COMBO interface of the corresponding processor base.
2. The two-way server motherboard of claim 1, further comprising:
a BMC chip connected to one of the processor sockets through a plurality of communication buses, wherein the plurality of communication buses include:
the PCIE bus is used for realizing the function of system display;
the LPC bus is used for the processor to transmit IPMI instructions and codes of 80 ports to the BMC, configure a BMC register and/or transmit system serial port information;
the UART bus is used for transmitting system serial port information and realizing the redirection function of the serial port;
an AMPL bus for transmitting the temperature of the CPU;
the USB bus is used for realizing the function of KVM;
the I2C bus is used to transmit power management signals, clock select signals, and/or reset control signals.
3. The two-way server motherboard of claim 2, further comprising:
one input of the one-out-of-two data selector is connected with a processor connected with a BMC chip through an SPI bus, and the other input of the one-out-of-two data selector is connected with the BMC chip through the SPI bus;
and the BIOS module is connected with the output of the alternative data selector through an SPI bus.
4. The two-way server motherboard of claim 3, further comprising an RTL8201F PHY chip, wherein the RTL8201F PHY chip is communicatively connected to the BMC chip, and wherein the RTL8201F PHY chip is communicatively connected to the BMC chip in accordance with RGMII protocol.
5. The two-way server motherboard of claim 2, further comprising 4 USB interfaces, the USB interfaces connected to the processor base connected to the BMC chip.
6. The two-way server motherboard of claim 1, wherein, of the two sets of PCIE slots, each set of PCIE slots includes 4 x16 PCIE 4.0 slots, wherein two x16 PCIE 4.0 slots in each set are communicatively connected to a COMBO interface of the corresponding processor chassis.
7. The two-way server motherboard of claim 1, wherein each of the two sets of memory slots comprises 16 DIMM memory slots.
8. A two-way server, comprising a two-way server motherboard according to any of claims 1 to 7.
9. The two-way server of claim 8, further comprising:
the multifunctional adapter board is in communication connection with the PCIE slots of the COMBO interface connected to the processor base, and 4 XGBE network interfaces, 4 SATA interfaces and/or 1 x8 PCIE slots are arranged on the multifunctional adapter board.
10. The two-way server of claim 8, further comprising:
the expansion board is in communication connection with the PCIE slots, and 2 PCIE x8 slots are arranged on the expansion board, or 1 PCIE x8 slot and 2 PCIE x4 slots are arranged on the expansion board.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202022765319.7U CN213276462U (en) | 2020-11-25 | 2020-11-25 | Two-way server mainboard and two-way server |
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| CN202022765319.7U CN213276462U (en) | 2020-11-25 | 2020-11-25 | Two-way server mainboard and two-way server |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113312304A (en) * | 2021-06-04 | 2021-08-27 | 海光信息技术股份有限公司 | Interconnection device, mainboard and server |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113312304A (en) * | 2021-06-04 | 2021-08-27 | 海光信息技术股份有限公司 | Interconnection device, mainboard and server |
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