CN213243930U - High-performance millimeter wave low-noise single-stage amplifier - Google Patents
High-performance millimeter wave low-noise single-stage amplifier Download PDFInfo
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- CN213243930U CN213243930U CN202022606037.2U CN202022606037U CN213243930U CN 213243930 U CN213243930 U CN 213243930U CN 202022606037 U CN202022606037 U CN 202022606037U CN 213243930 U CN213243930 U CN 213243930U
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Abstract
The utility model discloses a single-stage amplifier of high performance millimeter wave low noise relates to the communication field. The scheme is provided for solving the problems of large off-chip interference, low gain flatness and the like of the amplifier in the prior art. The gate of the MOS transistor M1 is used as an input stage through an input matching circuit and is connected with a capacitor C1, and the voltage end of the input matching circuit is connected with a direct current pad Vg1 through a pre-stage gate biasing circuit; the source of the MOS transistor M1 is grounded through a microstrip line TLs; the grid electrode of the MOS tube M2 is connected with a direct current pad Vg2 through a back-stage grid electrode biasing circuit; the drain electrode of the MOS transistor M2 is used as an output stage through an output matching circuit and is connected with a capacitor C4, and the voltage end of the output matching circuit is connected with a direct current bonding pad Vd through a drain electrode biasing circuit; a cascode matching circuit is connected in series between the drain of the MOS transistor M1 and the source of the MOS transistor M2. The millimeter wave low noise amplifier has the advantages that the corresponding input matching circuit, the corresponding output matching circuit and the corresponding cascode matching circuit are assisted by the cascode amplification unit, and the gain, the bandwidth and the gain flatness of the millimeter wave low noise amplifier are improved through comprehensive design.
Description
Technical Field
The utility model relates to a communication technology equipment especially relates to a single-stage amplifier of high performance millimeter wave low noise.
Background
The millimeter wave low noise amplifier is an important module in a 5G communication radio frequency chip, is widely applied to automobile radars, precise guidance, satellite communication and the like, and further enters the field of civil communication in the future. At present, millimeter wave communication integrated circuits have become the key research content of high-tech industries of various countries, and the characteristics of large data throughput and short communication delay can greatly improve the fighting capacity of national defense high-tech weapons, promote the reliable realization of unmanned vehicles in the field of intelligent transportation, and improve the working efficiency of users in the field of civil communication. The frequency range of millimeter waves is 26.5-300 GHz, and a radio frequency chip designed in the frequency band mainly faces the problems of self-excited oscillation, large off-chip interference, low gain, insufficient bandwidth, low gain flatness and the like, and further causes the problems of insufficient performance, poor stability and the like of a finished chip. Therefore, designing a high-performance millimeter wave amplifier is the key to improve the stability of the communication chip.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a single-stage amplifier of high performance millimeter wave low noise to solve the problem that above-mentioned prior art exists.
The utility model discloses a single-stage amplifier of high performance millimeter wave low noise, including input pad GSG1, electric capacity C1, cascode amplification unit, electric capacity C4 and output pad GSG2 that establish ties in proper order; the cascode amplifying unit mainly comprises a MOS tube M1 and a MOS tube M2 which are arranged in a cascade mode: the gate of the MOS transistor M1 is used as an input stage to be connected with a capacitor C1 through an input matching circuit, and the voltage end of the input matching circuit is connected with a direct current pad Vg1 through a pre-stage gate biasing circuit; the source of the MOS transistor M1 is grounded through a microstrip line TLs; the grid electrode of the MOS tube M2 is connected with a direct current pad Vg2 through a back-stage grid electrode biasing circuit; the drain electrode of the MOS transistor M2 is used as an output stage through an output matching circuit and is connected with a capacitor C4, and the voltage end of the output matching circuit is connected with a direct current bonding pad Vd through a drain electrode biasing circuit; a cascode matching circuit is connected in series between the drain of the MOS transistor M1 and the source of the MOS transistor M2.
The pre-stage gate biasing circuit comprises a capacitor Cd3 and a resistor Rd 2; one end of the capacitor Cd3 is grounded, and the other end of the capacitor Cd3 is connected with a direct current pad Vg1 and a voltage end of the input matching circuit through a resistor Rd 2.
The input matching circuit comprises a capacitor Cd1, a capacitor Cd2, a resistor Rd1, a microstrip line TLd1, a microstrip line TL1 and a microstrip line TL 2; one end of the resistor Rd1 is used as a voltage end to be connected with the preceding stage gate bias circuit, and the other end is grounded through a capacitor Cd 2; the voltage end is also grounded through a capacitor Cd 1; the microstrip line TLd1, the microstrip line TL1 and the microstrip line TL2 are in a T-shaped structure in a common-point mode, a non-common-point end of the microstrip line TLd1 is connected with a voltage end, a non-common-point end of the microstrip line TL1 is an input end of the input matching circuit, and a non-common-point end of the microstrip line TL2 is connected with a grid electrode of the MOS tube M1.
The cascode matching circuit comprises a capacitor C2, a microstrip line TL3 and a microstrip line TL 4; the drain of the MOS transistor M1 is connected in series with the microstrip line TL3 and the microstrip line TL4 in series at one time and then connected with the source of the MOS transistor M2, and the connection point of the microstrip line TL3 and the microstrip line TL4 is grounded through a capacitor C2.
The rear-stage gate biasing circuit comprises a capacitor Cd4 and a resistor Rd 3; one end of the capacitor Cd4 is grounded, and the other end of the capacitor Cd4 is connected with a direct current pad Vg2 and the grid of the MOS transistor M2 through a resistor Rd 3.
The drain bias circuit comprises a capacitor Cd5 and an inductor L1; one end of the capacitor Cd5 is grounded, and the other end of the capacitor Cd5 is connected with a direct current pad Vd and a voltage end of the output matching circuit through an inductor L1.
The output matching circuit comprises a capacitor Cd7, a capacitor Cd6, a resistor Rd4, a microstrip line TLd2, a microstrip line TL6 and a microstrip line TL 7; one end of the resistor Rd4 is used as a voltage end to be connected with the drain biasing circuit, and the other end is grounded through a capacitor Cd 6; the voltage end is also grounded through a capacitor Cd 7; the microstrip line TLd2, the microstrip line TL6 and the microstrip line TL7 are in a T-shaped structure at the same point, the non-common-point end of the microstrip line TLd2 is connected with a voltage end, the non-common-point end of the microstrip line TL6 is connected with the drain electrode of the MOS tube M2, and the non-common-point end of the microstrip line TL7 is the output end of the output matching circuit.
A single-stage amplifier of high performance millimeter wave low noise, its advantage lies in, cascode amplification unit is assisted with input matching circuit, output matching circuit and cascode matching circuit that corresponds, and the integrated design has improved millimeter wave low noise amplifier's gain, bandwidth and gain flatness. Further, the T-shaped design inside the cascode matching circuit improves the high-frequency stability of the cascode amplifying unit. The LC isolation network designed in the drain bias circuit shields off-chip power supply noise, prevents the bonding wire from deteriorating performance, and facilitates the wiring of the power supply line.
Drawings
Fig. 1 is a block diagram of a single-stage amplifier according to the present invention;
fig. 2 is a schematic structural diagram of the single-stage amplifier of the present invention.
Detailed Description
As shown in fig. 1 and 2, a high-performance millimeter wave low-noise single-stage amplifier of the present invention includes an input pad GSG1, a capacitor C1, a cascode amplifying unit, a capacitor C4, and an output pad GSG2, which are connected in series in sequence.
The cascode amplifying unit mainly comprises a MOS tube M1 and a MOS tube M2 which are arranged in a cascade mode: the gate of the MOS transistor M1 is connected to the capacitor C1 through an input matching circuit as an input stage, and the voltage end of the input matching circuit is connected to the dc pad Vg1 through a pre-stage gate bias circuit. The source of the MOS transistor M1 is grounded through the microstrip line TLs. The gate of the MOS transistor M2 is connected with a DC pad Vg2 through a post-stage gate bias circuit. The drain of the MOS transistor M2 is connected with a capacitor C4 as an output stage through an output matching circuit, and the voltage end of the output matching circuit is connected with a direct current pad Vd through a drain biasing circuit. A cascode matching circuit is connected in series between the drain of the MOS transistor M1 and the source of the MOS transistor M2.
The pre-stage gate biasing circuit comprises a capacitor Cd3 and a resistor Rd 2. One end of the capacitor Cd3 is grounded, and the other end of the capacitor Cd3 is connected with a direct current pad Vg1 and a voltage end of the input matching circuit through a resistor Rd 2.
The input matching circuit comprises a capacitor Cd1, a capacitor Cd2, a resistor Rd1, a microstrip line TLd1, a microstrip line TL1 and a microstrip line TL 2. One end of the resistor Rd1 is used as a voltage end to be connected with the preceding stage gate bias circuit, and the other end is grounded through a capacitor Cd 2. The voltage terminal is also connected to ground through a capacitor Cd 1. The microstrip line TLd1, the microstrip line TL1 and the microstrip line TL2 are in a T-shaped structure in a common-point mode, a non-common-point end of the microstrip line TLd1 is connected with a voltage end, a non-common-point end of the microstrip line TL1 is an input end of the input matching circuit, and a non-common-point end of the microstrip line TL2 is connected with a grid electrode of the MOS tube M1.
The cascode matching circuit comprises a capacitor C2, a microstrip line TL3 and a microstrip line TL 4. The drain of the MOS transistor M1 is connected in series with the microstrip line TL3 and the microstrip line TL4 in series at one time and then connected with the source of the MOS transistor M2, and the connection point of the microstrip line TL3 and the microstrip line TL4 is grounded through a capacitor C2.
The latter stage gate bias circuit comprises a capacitor Cd4 and a resistor Rd 3. One end of the capacitor Cd4 is grounded, and the other end of the capacitor Cd4 is connected with a direct current pad Vg2 and the grid of the MOS transistor M2 through a resistor Rd 3.
The drain bias circuit includes a capacitor Cd5 and an inductor L1. One end of the capacitor Cd5 is grounded, and the other end of the capacitor Cd5 is connected with a direct current pad Vd and a voltage end of the output matching circuit through an inductor L1.
The output matching circuit comprises a capacitor Cd7, a capacitor Cd6, a resistor Rd4, a microstrip line TLd2, a microstrip line TL6 and a microstrip line TL 7. One end of the resistor Rd4 is connected to the drain bias circuit as a voltage end, and the other end is grounded through a capacitor Cd 6. The voltage terminal is also connected to ground through a capacitor Cd 7. The microstrip line TLd2, the microstrip line TL6 and the microstrip line TL7 are in a T-shaped structure at the same point, the non-common-point end of the microstrip line TLd2 is connected with a voltage end, the non-common-point end of the microstrip line TL6 is connected with the drain electrode of the MOS tube M2, and the non-common-point end of the microstrip line TL7 is the output end of the output matching circuit.
A single-stage amplifier of high performance millimeter wave low noise optimize the principle as follows:
improving gain, bandwidth and gain flatness: through the comprehensive design of the input matching circuit, the output matching circuit and the cascode matching circuit, the signal reflection of each port of the cascode amplifying unit is restrained, and the bandwidth of the amplifier is improved. The design of the cascode amplification unit also improves the gain of the single-stage amplification unit, thereby reducing the stage number of the amplifier, reducing the design of the matching circuit and further reducing the area of a chip. The microstrip line TLd and the capacitor Cd1 form an LC band-pass filter network, a low-impedance path to ground is provided near a resonance point, and a low-frequency signal can leak to ground through the path, so that the low-frequency band gain of the single-stage amplifier is suppressed to improve the flatness of in-band gain.
The stability is improved, the T-shaped matching circuit is designed in the cascode amplification unit, and the microstrip lines TL3 and TL4 can improve the output impedance so as to optimize the output matching of the cascode amplification unit, reduce reflection and finally inhibit self-oscillation. The capacitor C2 provides a low-impedance path for short-circuiting a high-frequency signal to the ground, and the capacitor mainly short-circuits high-frequency noise of 40-100 GHz to the ground so as to prevent the high-frequency noise outside a frequency band from being amplified to form self-oscillation and cause instability.
Shielding off the power noise interference outside the chip, preventing the bonding wire from deteriorating, simplifying the wiring of the power line: an LC isolation network is introduced in the drain bias circuit, in which a series inductor L1 acts as a high impedance choke, preventing external noise current from entering the matching circuit, and preventing the current signal of the matching circuit from leaking out of the chip, thereby deteriorating matching. The capacitor Cd5 connected to the ground in parallel forms a low-impedance path to the ground near the resonant frequency by using the self-resonance effect, so that the off-chip noise voltage can be short-circuited to the ground, and the anti-interference capability is improved. The voltage signal leaked out from the output matching circuit can be short-circuited to the ground, and the matching deterioration can be prevented. The LC isolation network cuts off the propagation path of radio frequency signals inside and outside the chip. Since the signal in the output matching circuit is isolated by the LC network, the rf signal does not flow into the power line, and thus the power line can be freely wired without causing matching network mismatch.
Various other modifications and changes may be made by those skilled in the art based on the above-described technical solutions and concepts, and all such modifications and changes are intended to fall within the scope of the claims.
Claims (7)
1. A high-performance millimeter wave low-noise single-stage amplifier is characterized by comprising an input pad GSG1, a capacitor C1, a cascode amplifying unit, a capacitor C4 and an output pad GSG2 which are sequentially connected in series;
the cascode amplifying unit mainly comprises a MOS tube M1 and a MOS tube M2 which are arranged in a cascade mode:
the gate of the MOS transistor M1 is used as an input stage to be connected with a capacitor C1 through an input matching circuit, and the voltage end of the input matching circuit is connected with a direct current pad Vg1 through a pre-stage gate biasing circuit; the source of the MOS transistor M1 is grounded through a microstrip line TLs;
the grid electrode of the MOS tube M2 is connected with a direct current pad Vg2 through a back-stage grid electrode biasing circuit; the drain electrode of the MOS transistor M2 is used as an output stage through an output matching circuit and is connected with a capacitor C4, and the voltage end of the output matching circuit is connected with a direct current bonding pad Vd through a drain electrode biasing circuit;
a cascode matching circuit is connected in series between the drain of the MOS transistor M1 and the source of the MOS transistor M2.
2. The high performance millimeter wave low noise single stage amplifier according to claim 1, wherein said pre-stage gate bias circuit comprises a capacitor Cd3 and a resistor Rd 2; one end of the capacitor Cd3 is grounded, and the other end of the capacitor Cd3 is connected with a direct current pad Vg1 and a voltage end of the input matching circuit through a resistor Rd 2.
3. The high-performance millimeter wave low-noise single-stage amplifier according to claim 1, wherein the input matching circuit comprises a capacitor Cd1, a capacitor Cd2, a resistor Rd1, a microstrip line TLd1, a microstrip line TL1 and a microstrip line TL 2; one end of the resistor Rd1 is used as a voltage end to be connected with the preceding stage gate bias circuit, and the other end is grounded through a capacitor Cd 2; the voltage end is also grounded through a capacitor Cd 1; the microstrip line TLd1, the microstrip line TL1 and the microstrip line TL2 are in a T-shaped structure in a common-point mode, a non-common-point end of the microstrip line TLd1 is connected with a voltage end, a non-common-point end of the microstrip line TL1 is an input end of the input matching circuit, and a non-common-point end of the microstrip line TL2 is connected with a grid electrode of the MOS tube M1.
4. The high-performance millimeter wave low-noise single-stage amplifier according to claim 1, wherein the cascode matching circuit comprises a capacitor C2, a microstrip line TL3 and a microstrip line TL 4; the drain of the MOS transistor M1 is connected in series with the microstrip line TL3 and the microstrip line TL4 in series at one time and then connected with the source of the MOS transistor M2, and the connection point of the microstrip line TL3 and the microstrip line TL4 is grounded through a capacitor C2.
5. The high performance millimeter wave low noise single stage amplifier according to claim 1, wherein said post-stage gate bias circuit comprises a capacitor Cd4 and a resistor Rd 3; one end of the capacitor Cd4 is grounded, and the other end of the capacitor Cd4 is connected with a direct current pad Vg2 and the grid of the MOS transistor M2 through a resistor Rd 3.
6. The high performance millimeter wave low noise single stage amplifier according to claim 1, wherein said drain bias circuit comprises a capacitor Cd5 and an inductor L1; one end of the capacitor Cd5 is grounded, and the other end of the capacitor Cd5 is connected with a direct current pad Vd and a voltage end of the output matching circuit through an inductor L1.
7. The high-performance millimeter wave low-noise single-stage amplifier according to claim 1, wherein the output matching circuit comprises a capacitor Cd7, a capacitor Cd6, a resistor Rd4, a microstrip line TLd2, a microstrip line TL6 and a microstrip line TL 7; one end of the resistor Rd4 is used as a voltage end to be connected with the drain biasing circuit, and the other end is grounded through a capacitor Cd 6; the voltage end is also grounded through a capacitor Cd 7; the microstrip line TLd2, the microstrip line TL6 and the microstrip line TL7 are in a T-shaped structure at the same point, the non-common-point end of the microstrip line TLd2 is connected with a voltage end, the non-common-point end of the microstrip line TL6 is connected with the drain electrode of the MOS tube M2, and the non-common-point end of the microstrip line TL7 is the output end of the output matching circuit.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116094469A (en) * | 2023-04-11 | 2023-05-09 | 南京米乐为微电子科技有限公司 | Common gate amplifying circuit, low noise amplifier and ultra-wideband receiver |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116094469A (en) * | 2023-04-11 | 2023-05-09 | 南京米乐为微电子科技有限公司 | Common gate amplifying circuit, low noise amplifier and ultra-wideband receiver |
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