CN213241208U

CN213241208U - NVM read-write equipment of non-contact IC card chip

Info

Publication number: CN213241208U
Application number: CN202022132876.5U
Authority: CN
Inventors: 武鹏; 张建伟
Original assignee: Shanghai Mingsi Microelectronics Co ltd
Current assignee: Shanghai Mingsi Microelectronics Co ltd
Priority date: 2020-09-25
Filing date: 2020-09-25
Publication date: 2021-05-18
Anticipated expiration: 2030-09-25

Abstract

The utility model provides a NVM read-write equipment of non-contact IC-card chip, its characterized in that contains: demodulation circuit, pause identification circuit, NVM read-write circuit and control circuit. Use the beneficial effects are that, use a NVM read-write equipment of non-contact IC-card chip, can shift the chip to NVM's read-write operation and go on under the circumstances that has stable clock after the pause to avoided traditional NVM read-write equipment to probably take place in the circumstances that pause was coming to carry out NVM reading and writing, improved the reliability to NVM reading and writing in card reader send order stage.

Description

NVM read-write equipment of non-contact IC card chip

Technical Field

The utility model belongs to integrated circuit design field particularly, belongs to non-contact IC-card chip design field.

Background

A contactless IC (Integrated Circuit) card chip needs to extract energy from a carrier wave and use a clock recovered from the carrier wave as an operating clock of the chip. The chip has an NVM (Non-Volatile Memory) for storing data information such as chip ID, and when the chip works, the chip usually needs to read or write related data information from the NVM. The circuitry that reads and writes the NVM uses the operating clock recovered from the carrier to generate the timing signals needed for reading and writing the NVM.

The card reader and the non-contact IC card communicate by modulating a carrier wave, generally speaking, the card reader firstly modulates the carrier wave to enable the carrier wave to generate a plurality of pause to represent a command needing to be transmitted, and a demodulation circuit cannot recover a clock in the pause stage.

The time when the traditional NVM read-write device reads and writes the NVM and the time when the pause appears are random, when a chip is reading or writing the NVM, if the card reader just sends the pause at the moment, because the pause period has no clock, the generated NVM read-write signal can not meet the timing sequence requirement of the NVM on the read-write signal, thereby causing the read-write failure of the NVM and influencing the normal work of the chip.

Disclosure of Invention

In order to overcome the shortcoming of the prior art, the utility model provides a NVM read-write equipment of non-contact IC-card chip, its characterized in that contains: demodulation circuit, pause identification circuit, NVM read-write circuit and control circuit.

And the output of the demodulation circuit is radio frequency output data rf _ dataout and a radio frequency output clock rf _ clkout. The function of the demodulation circuit is to demodulate the carrier, to demodulate the data signal on the carrier, i.e., rf _ dataout, and to recover the clock signal, i.e., rf _ clkout, from the carrier.

And the input of the pause identification circuit is connected with the radio frequency output data rf _ dataout and the radio frequency output clock rf _ clkout of the demodulation circuit, and the output signal of the pause identification circuit is pause _ done which is connected with the control circuit. The function of the pause recognition circuit is to determine that pause has ended and to generate a pause _ done indication signal.

The pause identification circuit is characterized by comprising a first flip-flop, a second flip-flop and an exclusive-or gate circuit, wherein the D end of the first flip-flop is connected with rf _ dataout, the CK end of the first flip-flop is connected with rf _ clkout, the output of the first flip-flop is connected with the D end of the second flip-flop and a first input end of the exclusive-or gate circuit, the D end of the second flip-flop is connected with the output of the first flip-flop, the CK end of the second flip-flop is connected with rf _ clkout, the output of the second flip-flop is connected with a second input end of the exclusive-or gate circuit, the first input end of the exclusive-or gate circuit is connected with the output end of the first flip-flop, the second input end of the exclusive-or gate circuit is connected with the output end of the second flip-flop.

The input of the control circuit is connected with an output signal pause _ done of the pause identification circuit, the output signals are NVM _ wren and NVM _ rden, the NVM _ wren signal is NVM write enable, and the NVM _ rden signal is NVM read enable and is connected to the NVM read-write circuit. The control circuit has the function of generating an enable signal for reading or writing the NVM according to the indication of the pa and use _ done signals, and performing reading and writing of the NVM after transferring the reading and writing of the NVM to the pause under the condition of stable clock.

And the input of the NVM reading and writing circuit is connected with the output signals NVM _ wren and NVM _ rden of the control circuit, and the output of the NVM reading and writing circuit is an NVM reading and writing timing signal. The NVM reading and writing circuit has the function that only after receiving NVM _ wren or NVM _ rden signals, reading and writing time sequence signals of the NVM are generated, and because different types of NVM (like eeprom, flash and the like) have different time sequence requirements on the reading and writing time sequence signals, the NVM reading and writing circuit generates different NVM reading and writing time sequence signals according to the type of the NVM.

Use the beneficial effects are that, use a NVM read-write equipment of non-contact IC-card chip, can shift the chip to NVM's read-write operation and go on under the circumstances that has stable clock after the pause to avoided traditional NVM read-write equipment to probably take place in the circumstances that pause was coming to carry out NVM reading and writing, improved the reliability to NVM reading and writing in card reader send order stage.

Drawings

FIG. 1 is a schematic diagram of a NVM read/write device for a non-contact IC card chip

FIG. 2 is the utility model discloses a pause identification circuit structure chart

Detailed Description

The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

As shown in fig. 1, an NVM read/write apparatus for non-contact IC card chip comprises: demodulation circuit, pause identification circuit, NVM read-write circuit and control circuit.

The input of the control circuit is connected with an output signal pause _ done of the pause identification circuit, the output signals are NVM _ wren and NVM _ rden, the NVM _ wren signal is NVM write enable, and the NVM _ rden signal is NVM read enable and is connected to the NVM read-write circuit. The control circuit has the function of generating an enable signal for reading or writing the NVM according to the indication of the pause _ done signal, so that reading and writing of the NVM are carried out after the pause is transferred and under the condition of stable clock.

And the input of the NVM reading and writing circuit is connected with the output signals NVM _ wren and NVM _ rden of the control circuit, and the output of the NVM reading and writing circuit is an NVM reading and writing timing signal. The NVM read-write circuit has a function of generating a read-write timing signal of the NVM only after receiving an NVM _ wren or NVM _ rden signal, because different types of NVMs use eeprom in this embodiment, the NVM read-write circuit generates a write timing signal of eeprom after receiving NVM _ wren, and the NVM read-write circuit generates a read timing signal of eeprom after receiving NVM _ rden.

Although the present invention has been described in detail with respect to the preferred embodiments, various modifications and alterations will become apparent to those skilled in the art upon reading the foregoing description. The above description and drawings are only examples of the practice of the invention, and it should be understood that the above description should not be taken as limiting the invention.

Claims

1. An NVM read/write device for a non-contact IC card chip, comprising: the device comprises a demodulation circuit, a pause identification circuit, an NVM read-write circuit and a control circuit; the demodulation circuit outputs radio frequency output data rf _ dataout and a radio frequency output clock rf _ clkout, and the demodulation circuit has the functions of demodulating a carrier, demodulating a data signal on the carrier, namely rf _ dataout, and recovering a clock signal, namely rf _ clkout, from the carrier; the input of the pause identification circuit is connected with the radio frequency output data rf _ dataout and the radio frequency output clock rf _ clkout of the demodulation circuit, the output signal is pause _ done which is connected with the control circuit, and the pause identification circuit has the function of judging that pause is finished and generating a pause _ done indication signal; the input of the control circuit is connected with an output signal pause _ done of the pause identification circuit, the output signals are NVM _ wren and NVM _ rden, the NVM _ wren signal is NVM write enable, the NVM _ rden signal is NVM read enable, the control circuit is connected to the NVM read-write circuit, and the control circuit is used for generating an enable signal for starting reading or writing of the NVM according to the indication of the pause _ done signal; the NVM reading and writing circuit has the function that the NVM reading and writing timing signals of the NVM are generated only after receiving the NVM _ wren or NVM _ rden signals, and the NVM reading and writing circuit generates different NVM reading and writing timing signals according to the type of the NVM because different types of NVM have different timing requirements on the reading and writing timing signals.

2. The NVM read/write apparatus for a contactless IC card chip as claimed in claim 1, wherein said pause recognition circuit comprises a first flip-flop, a second flip-flop and an xor gate circuit, wherein the D terminal of said first flip-flop is connected to rf _ dataout, the CK terminal of said first flip-flop is connected to rf _ clkout, the output of said first flip-flop is connected to the D terminal of said second flip-flop and the first input terminal of said xor gate circuit, the D terminal of said second flip-flop is connected to the output of said first flip-flop, the CK terminal of said first flip-flop is connected to rf _ clkout, the output of said second flip-flop is connected to the second input terminal of said xor gate circuit, the first input terminal of said xor gate circuit is connected to the output terminal of said first flip-flop, the second input terminal of said xor gate circuit is connected to the output terminal of said second flip-flop, and the output signal of said xor gate circuit is pause _ done.