CN213125982U - Power divider, amplifier, wireless transmitting terminal and system - Google Patents
Power divider, amplifier, wireless transmitting terminal and system Download PDFInfo
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- CN213125982U CN213125982U CN202022031798.XU CN202022031798U CN213125982U CN 213125982 U CN213125982 U CN 213125982U CN 202022031798 U CN202022031798 U CN 202022031798U CN 213125982 U CN213125982 U CN 213125982U
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Abstract
The utility model discloses a ware, amplifier, wireless transmitting terminal and system are divided to merit belongs to wireless communication power amplifier technical field. The invention designs a power divider comprising three loops, and accesses the power divider to the signal input end of a symmetrical Doherty power amplifier circuit to realize the automatic distribution of the power of two branches of a carrier power amplifier and a peak power amplifier, and compared with the mode that the traditional Doherty power amplifier circuit is provided with a load feedback loop to realize the power distribution of the two branches, the power divider does not improve the linearity of the power amplifier by sacrificing the direct current power consumption, so that the problem that the linearity of the amplifier is not improved any more by continuing to retreat when the power is retreated to a certain degree, such as when the three-order cross modulation reaches below-50 dBc, but can obviously improve the linearity of the amplifier while improving the efficiency of a power amplifier retreat area, and can adapt to the occasions with high linearity requirements.
Description
Technical Field
The utility model relates to a ware, amplifier, wireless transmitting terminal and system are divided to merit belongs to wireless communication power amplifier technical field.
Background
In the wireless communication technology, a power amplifier is not required to transmit signals, and the main function of the power amplifier is to amplify the power of signals output by a front stage and then transmit the amplified signals to an antenna for transmission. In the existing power amplifier, the Doherty power amplifier becomes a hotspot for researching the power amplifier of the base station by the advantages of simple technical structure, high cost performance and the like.
As is well known, a Doherty power amplifier comprises two branch power amplifiers, a main power amplifier and an auxiliary power amplifier; the main power amplifier is always started, and the auxiliary power amplifier is started according to the load condition. Usually, a load feedback loop exists in the Doherty power amplifier circuit, and the load condition is fed back to the main power amplifier, so that the auxiliary power amplifier is started when the load is large, and the power distribution of the main and auxiliary power amplifier branches is determined, so that the Doherty power amplifier realizes large output power.
The power back-off technology is a common method for improving power amplification, i.e. a tube with higher power is selected as a small power tube, and the linearity of the power amplifier is actually improved by sacrificing direct current power consumption.
The power back-off method is to back-off the power amplifier by 6-10 dB from the saturation region and enter the linear working region by operating at a level far less than the 1dB compression point, so as to improve the third-order intermodulation coefficient of the power amplifier. In general, third order intermodulation distortion improves by 2dB when the fundamental power is reduced by 1 dB.
The power back-off method is simple and easy to implement, does not need to add any additional equipment, is an effective method for improving the linearity of the amplifier, and has the defect of greatly reducing the efficiency. In addition, when the power is backed off to some extent, when the third order quadrature modulation reaches below-50 dBc, continuing the back off will no longer improve the linearity of the amplifier. Therefore, power back-off has certain disadvantages where linearity requirements are high.
SUMMERY OF THE UTILITY MODEL
In order to solve the above problems, the present invention provides a power divider, which comprises three loops, respectively marked as loop a, loop B and loop C; the three loops are connected in sequence, the loop A is the smallest in size, the loop C is the largest in size, and the loop B is between the loop A and the loop C in size.
In one embodiment, the loop a has the dimensions: the radius is between 10mm and 20mm, and the width is between 0.1mm and 1 mm; the radius of the loop B is 0.1-10 mm larger than that of the loop A, and the width of the loop B is 0.1-1 mm larger than that of the loop A; the radius of the loop C is 0.1mm to 10mm larger than that of the loop B, and the width of the loop C is 0.1mm to 1mm larger than that of the loop B.
In one embodiment, the loop a has a radius of 16.38mm and a width of 0.63 mm; the radius of the loop B is 17.62mm, and the width of the loop B is 0.91 mm; loop C has a radius of 17.39mm and a width of 1.25 mm.
A second object of the present invention is to provide a power amplifier based on load modulation, the power amplifier based on load modulation is an amplifier obtained after the signal input end of the Doherty power amplifier circuit is connected to the above power divider.
In one embodiment, the Doherty power amplifier adopts a symmetric Doherty amplifier with an AB-type structure of carrier power amplifier and a C-type structure of peak power amplifier.
In one embodiment, the branch power amplifier of the Doherty power amplifier selects a GaN power tube CGH 40025F.
In one embodiment, the quiescent operating point of the carrier power amplifier of the Doherty power amplifier is selected at a drain voltage V _ DS of 28V and a gate voltage V _ GS of-3V.
In one embodiment, the quiescent operating point of the peak power amplifier of the Doherty power amplifier is selected at a drain voltage V _ DS of 28V and a gate voltage V _ GS of-3.8V.
A third object of the present invention is to provide a wireless transmitting terminal, which includes the above power amplifier based on load modulation.
A third object of the present invention is to provide a wireless transmitting system, which comprises the above wireless transmitting terminal.
The utility model has the advantages that:
the utility model provides a structure that the power divider is different from the existing power divider and only comprises one loop, the utility model provides a power divider which comprises three loops, respectively marked as loop A, loop B and loop C; the three loops are connected in sequence, the loop A is the smallest in size, the loop C is the largest in size, and the loop B is between the loop A and the loop C in size. The power divider with the structure is connected to the signal input end of the symmetrical Doherty power amplifier circuit, so that the automatic power distribution of the carrier power amplifier and the peak power amplifier is realized, and compared with the mode that a load feedback loop is arranged in the conventional Doherty power amplifier circuit to realize the power distribution of the two branches, the power divider does not improve the linearity of the power amplifier by sacrificing the direct current power consumption, so that the problem that the linearity of the amplifier is not improved any more when the power is returned to a certain degree, such as when the third-order quadrature modulation reaches below-50 dBc, the efficiency of a power amplifier area is improved, the linearity of the amplifier can be obviously improved at the same time, and the power divider can be suitable for occasions with high linearity requirements, such as the amplification of base station signals, the application of a radar receiving end low noise amplifier and the like under a 5G application scene.
Drawings
Fig. 1 is a load modulation circuit diagram.
Fig. 2 is a schematic diagram of the back-off region efficiency of the Doherty power amplifier.
Fig. 3 is a schematic structural diagram of a power divider provided in an embodiment of the present invention.
Fig. 4 is a diagram of an electromagnetic simulation result of the power divider provided in one embodiment of the present invention.
Fig. 5 is a simulation diagram of S parameters of port1 of the power divider and the conventional power divider provided in an embodiment of the present invention.
Fig. 6 is a simulation diagram of S parameters of port 2 of the power divider and the conventional power divider provided in an embodiment of the present invention.
Fig. 7 is a circuit diagram of a power amplifier provided in an embodiment of the invention.
Fig. 8 is a simulation diagram of a load pulling result of a carrier power amplifier of the power amplifier provided in an embodiment of the present invention.
Fig. 9 is a simulation diagram of a pulling result of a carrier power amplifier source of the amplifier provided in an embodiment of the present invention.
Fig. 10 is a simulation diagram of a power amplifier peak power amplifier load pulling result provided in an embodiment of the present invention.
Fig. 11 is a simulation diagram of a power amplifier peak power source pulling result provided in an embodiment of the present invention.
Fig. 12 is a circuit diagram of a joint simulation of the peak power of the power amplifier provided in an embodiment of the invention.
Fig. 13 is a graph of power added efficiency for peak power of the power amplifier provided in one embodiment of the invention.
Fig. 14 is a detailed physical size diagram of a power divider at a signal input terminal of a power amplifier provided in an embodiment of the present invention.
Fig. 15 is an electromagnetic simulation diagram of a power divider at a signal input terminal of a power amplifier provided in an embodiment of the present invention.
Fig. 16 is an overall circuit diagram of a power amplifier provided in an embodiment of the present invention.
Figure 17 is a graph of the power added efficiency output of the power amplifier provided in one embodiment of the present invention.
Detailed Description
The following is a detailed description of the present invention.
Introduction of basic knowledge:
1. load modulation technique
As shown in FIG. 1, the load modulation circuit consists of two controlled current sources (A and B) and an impedance (R)L) Comprising two controlled current sources for generating corresponding currents IAAnd IBTogether flow into the impedance RL. The core idea of the load modulation technology is as follows: load apparent impedance (Z) corresponding to one controlled current sourceAOr ZB) Will be subjected to anotherThe current sources varying in traction, i.e. when the current (I) of one of the controlled current sources is variedAOr IB) When the load apparent impedance corresponding to another controlled current source changes, the load modulation technology is also called active load traction.
The specific equation is analyzed as follows:
from the superposition theorem, R can be foundLVoltage V onLThe value of (c):
VL＝(IA+IB)RL (1)
it follows that the apparent impedance for each controlled current source:
from equations (2) and (3), the current I generated by the controlled current source BBWill result in a load impedance Z of the controlled current source aAIs controlled by the current I generated by the current source AAWill result in a load impedance Z of the controlled current source BBA change in (c). The load modulation technology is applied to the field of microwave power amplifiers, a microwave power tube can be regarded as a controlled current source controlled by voltage, and each power amplifier circuit can be regarded as each current branch in the load modulation technology; therefore, the phase and amplitude change of each current will bring the change of the load impedance of the other current. Thereby adjusting the output power of the power amplifier by adjusting the load impedance.
2. Doherty power amplifier
In the Doherty power amplifier, the carrier power amplifier is generally an AB type power amplifier, and the peak power amplifier is generally a C type power amplifier. The phase compensation lines on two sides of each branch circuit are mainly used for compensating phase changes caused by a power dividing network and nonlinearity, so that the phases of two paths of power amplifiers are consistent when power is synthesized. Generally, the length of the phase compensation line is optimized by tuning according to the values of the output power and the power added efficiency during the design process.
The efficiency of the Doherty power amplifier structure is derived from the conducting state of the branch currents, and the conduction angle of each amplifier current depends on the respective operating point and the input voltage, and fig. 2 shows the back-off region efficiency of the Doherty power amplifier. Specifically, along with the gradual increase of the input signal of the power amplifier, the output power of the carrier power amplifier branch becomes large and enters a saturation state, at this time, the efficiency of the whole Doherty power amplifier has a first maximum value, and at this time, the peak power amplifier is in a critical state of being opened. And as the input power continues to increase, the peak power amplifier enters a saturated output state. The second maximum value appears in the efficiency of the drain electrode of the Doherty power amplifier, and the whole power amplifier enters a saturated output state. The region between the two efficiency maximums corresponding to the output power is called the back-off region of the Doherty power amplifier. It can be seen that for other power amplifiers, the efficiency of the back-off region can be approximated to the average efficiency of the power amplifier in a certain output power interval.
Example 1
This embodiment provides a power divider, which includes three loops, which are respectively denoted as loop a, loop B, and loop C; the three loops are connected in sequence, the loop A is the smallest in size, the loop C is the largest in size, and the loop B is between the loop A and the loop C in size.
The dimensions of the loop A are: the radius is between 10mm and 20mm, and the width is between 0.1mm and 1 mm; the radius of the loop B is 0.1-10 mm larger than that of the loop A, and the width of the loop B is 0.1-1 mm larger than that of the loop A; the radius of the loop C is 0.1mm to 10mm larger than that of the loop B, and the width of the loop C is 0.1mm to 1mm larger than that of the loop B.
In the embodiment, the radius of the loop A is set to be 16.38mm, and the width of the loop A is set to be 0.63 mm; the radius of the loop B is 17.62mm, and the width of the loop B is 0.91 mm; loop C radius 17.39mm, width 1.25mm, as shown in fig. 3, loop a contains input port and ports 4, 5; loop B includes port 4, port 5, port 6, port 7; loop C includes port 6, port 7, port 2, port 3.
The electromagnetic simulation result of the power divider is shown in fig. 4, Port1 is a signal input Port, and Port 2 and Port 3 are signal output ports. The simulation results shown in fig. 4 show the magnetic field strengths of the incident wave and the reflected wave, respectively. After the incident wave passes through the input port, the incident wave is distributed by the power divider with equal power. After the reflected wave passes through the port 2, the magnetic field intensity of the input port and the port 3 is very small; after the reflected wave passes through the port 3, the magnetic field intensity of the port1 and the port 2 is small, which shows that the isolation of the two output ports is good, and the power divider can effectively inhibit the signal crosstalk between the ports.
In order to highlight the advantages of the power divider provided by the present invention, this embodiment compares the power divider shown in fig. 3 provided by the present application with a conventional Wilkinson power divider. The S parameters of the conventional Wilkinson power divider and the power divider provided in the present application are shown in fig. 5 and 6.
Since the S-parameter characteristics of port 3 and port 2 are the same, the S-parameters of port1 and port 2 are shown in fig. 5 and 6, respectively. As can be seen from fig. 5, in the frequency band of 2.3GHz-2.7GHz, the parameter of the power divider S11 provided by the present application is-50 dB, and the parameter of the conventional power divider S11 is-40 dB, which indicates that the return loss of the input port of the present invention is very small, and is significantly better than that of the conventional power divider. As can be seen from fig. 6, in the frequency band of 2.20GHz to 2.70GHz, the S (23) value of the power divider provided by the present application is significantly lower, and at the central operating frequency of 2.45GHz, the S (22) value of the power divider provided by the present application is 15.8dB higher than that of the conventional power divider.
Example 2
The present embodiment provides an amplifier, where a symmetric Doherty amplifier with an AB-class structure and a C-class structure as a carrier power amplifier is adopted in the amplifier; the power dividing branch of the power amplifier is composed of two lambda/4 wavelength lines, and two output ports have a resistance value of 2ZoIs connected through a resistor, ZoIs the system impedance; the S parameter matrix of the equal power distribution power divider is as follows:
wherein j represents a complex coefficient, j2＝-1。
As shown in fig. 7, a circuit diagram of the power amplifier provided in this embodiment is shown. The power divider at the signal input end in fig. 7 is the power divider provided in the first embodiment.
The utility model discloses a theory of operation:
for carrier power amplification:
a branch power amplifier of the power amplifier adopts a GaN power tube CGH 40025F. For carrier power amplifier, because the carrier power amplifier is biased in AB type, the static working point is temporarily selected to be the voltage V of the instantaneous drain electrodeDS28V gate voltage VGSat-3V, the quiescent current is about 133mA, and the quiescent operating point can be fine-tuned according to the final simulation results. And then carrying out load traction and source traction on the carrier power amplifier. The load pull results are shown in fig. 8 and the source pull results are shown in fig. 9.
It can be seen that when the output impedance at the load end is 39.512-j5.517, the output power reaches 45.17dbm, and the power added efficiency reaches 71.72%. When the output impedance of the source end is 5.396-j1.055, the output power reaches 44.95dbm, and the power added efficiency reaches 70.23%. And designing output and input matching networks according to the traction result, finally integrating the matching networks of all parts, and performing circuit simulation and electromagnetic simulation on the whole AB class power amplifier, wherein the AB class joint simulation circuit is shown in figure 10. As shown in fig. 11, it can be seen that when the output power of the carrier power amplifier is 44.199dbm, the power added efficiency reaches 64.731%.
For peak power amplification:
the peak power amplifier is operated in the C-type state, and the static operating point is temporarily selected at the drain voltage V according to the CGH40025F transfer characteristic curve shown in FIG. 12DS28V gate voltage VGS-3.8V. In Doherty overall simulation, V can be optimizedGSThe on-time of the peak power amplifier is controlled.
The load pulling result of the peak power amplifier is shown in fig. 10, and the source pulling result is shown in fig. 11. It can be seen that the output power reaches 45.29dbm and the power added efficiency reaches 76.79% when the output impedance at the load end is 43.923-j 6.077. When the output impedance of the source end is 5.237-j2.388, the output power reaches 45.11dbm, and the power added efficiency reaches 78.78%. Because the efficiency of the class C power amplifier is superior to that of the class AB power amplifier, the efficiency of the peak power amplifier is higher than that of the carrier power amplifier.
Designing a matching network:
after the load traction and the source traction of the peak power amplifier are completed, the matching network design of output and input is carried out according to the traction result, finally, the matching networks of all parts are integrated, the circuit simulation and the electromagnetic simulation are carried out on the whole peak power amplifier, and a combined simulation circuit of the peak power amplifier is shown in fig. 12. Fig. 13 shows the corresponding simulation result, and it can be seen that the power added efficiency reaches 70.205% when the output power of the peak power amplifier is 44.355 dbm. The efficiency of the carrier power amplifier is 6 percent higher than that of the carrier power amplifier.
Power synthesis network of the Doherty power amplifier structure:
the specific physical size of the power divider connected to the signal input terminal of the Doherty power amplifier circuit is shown in fig. 14. Fig. 15 shows an electromagnetic simulation of the power divider.
Doherty power amplifier design result analysis
After the carrier power amplifier, the peak power amplifier, the power division structure, the synthesis network and the like of the Doherty power amplifier are designed, simulation analysis can be carried out on the whole power amplifier circuit. Fig. 16 shows a hierarchical circuit diagram of the entire Doherty power amplifier, where SCH _ carry is a carrier power amplifier sub-circuit, SCH _ peak is a peak power amplifier sub-circuit, and quarter wavelength lines of 50 Ω and 35 Ω are used for power synthesis in a load modulation network. Fig. 17 shows the power added efficiency output curve of the Doherty power amplifier.
It can be seen that in the 6db power back-off region, the efficiency of the whole power amplifier is above 45%, and the peak efficiency is close to 60%. Although the peak efficiency of the power amplifier is not as high as that of the class-F power amplifier, the whole efficiency is improved in a power back-off area. Therefore, the method is very suitable for the variable envelope signals widely used in the communication system nowadays.
Although the present invention has been described with reference to the preferred embodiments, it should be understood that various changes and modifications can be made by those skilled in the art without departing from the spirit and scope of the invention.
Claims (10)
1. A power divider is characterized by comprising three loops, namely a loop A, a loop B and a loop C; the three loops are connected in sequence, the loop A is the smallest in size, the loop C is the largest in size, and the loop B is between the loop A and the loop C in size.
2. The power divider of claim 1, wherein the loop A has the following dimensions: the radius is between 10mm and 20mm, and the width is between 0.1mm and 1 mm; the radius of the loop B is 0.1-10 mm larger than that of the loop A, and the width of the loop B is 0.1-1 mm larger than that of the loop A; the radius of the loop C is 0.1mm to 10mm larger than that of the loop B, and the width of the loop C is 0.1mm to 1mm larger than that of the loop B.
3. The power divider of claim 1, wherein the loop a has a radius of 16.38mm and a width of 0.63 mm; the radius of the loop B is 17.62mm, and the width of the loop B is 0.91 mm; loop C has a radius of 17.39mm and a width of 1.25 mm.
4. A power amplifier based on load modulation, wherein the power amplifier based on load modulation is obtained by connecting the power divider of any one of claims 1-3 to the signal input terminal of a Doherty power amplifier circuit.
5. The load modulation-based power amplifier of claim 4, wherein the Doherty power amplifier adopts a symmetric Doherty amplifier with a carrier power amplifier in an AB-type structure and a peak power amplifier in a C-type structure.
6. The load modulation-based power amplifier of claim 5, wherein a GaN power tube CGH40025F is selected as a branch power amplifier of the Doherty power amplifier.
7. The load modulation based power amplifier of claim 6, wherein a quiescent operating point of a carrier power amplifier of the Doherty power amplifier is selected at a drain voltage V _ DS-28V and a gate voltage V _ GS-3V.
8. The power amplifier of claim 7, wherein a quiescent operating point of a peak power amplifier of the Doherty power amplifier is selected at a drain voltage V _ DS-28V and a gate voltage V _ GS-3.8V.
9. A wireless transmitting terminal, characterized in that the wireless transmitting terminal comprises the load modulation based power amplifier according to any one of claims 4-8.
10. A wireless transmission system, characterized in that it comprises a wireless transmission terminal according to claim 9.
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| CN202022031798.XU CN213125982U (en) | 2020-09-14 | 2020-09-14 | Power divider, amplifier, wireless transmitting terminal and system |
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| CN202022031798.XU CN213125982U (en) | 2020-09-14 | 2020-09-14 | Power divider, amplifier, wireless transmitting terminal and system |
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