CN213072482U

CN213072482U - POE inverter

Info

Publication number: CN213072482U
Application number: CN202022461064.5U
Authority: CN
Inventors: 刘江; 付宏伟
Original assignee: Guangdong Unipoe Iot Technology Co ltd
Current assignee: Guangdong Unipoe Iot Technology Co ltd
Priority date: 2020-10-29
Filing date: 2020-10-29
Publication date: 2021-04-27
Anticipated expiration: 2030-10-29

Abstract

The utility model belongs to the technical field of the inverter technique and specifically relates to indicate a POE inverter, including PD module and contravariant module, the output of PD module with the input of contravariant module is connected, and the contravariant module includes first drive chip U2, second drive chip U4, switch tube Q5, switch tube Q6, switch tube Q10, switch tube Q11, and first drive chip U2 and second drive chip U4 all export the PWM signal that is used for controlling switch tube Q5, switch tube Q6, switch tube Q10, switch tube Q11 break-make. The utility model discloses an it is long so that POE inverter's output voltage crescent to utilize PWM signal control to be used for switching on of each switch tube of contravariant to reach the effect of suppression surge current and reduce the condition that PD module and PSE module protection restarted and take place.

Description

POE inverter

Technical Field

The utility model belongs to the technical field of the dc-to-ac converter technique and specifically relates to indicate a POE dc-to-ac converter.

Background

Conventional inverters have only the function of converting a dc input to an ac output. In order to improve the practicability of the inverter, a POE inverter is provided on the market, and the POE inverter can transmit POE and output alternating voltage and network signals. However, when the inverter with the POE function is provided with a heavy load switch, a large inrush current may occur, which often results in the occurrence of protection restart of the PSE module and the PD module in the POE inverter.

Disclosure of Invention

The utility model discloses problem to prior art provides a POE dc-to-ac converter that can restrain surge current.

The utility model adopts the following technical scheme: a POE inverter comprises a PD module and an inversion module, wherein the inversion module comprises a controller U14, a first driving chip U2, a second driving chip U4, a switching tube Q5, a switching tube Q6, a switching tube Q10, a switching tube Q11, a first alternating current output end and a second alternating current output end, a control end of the first driving chip U2 is connected with a first output end of the controller U14, a control end of the second driving chip U4 is connected with a second output end of the controller U14, a control end of the switching tube Q5 is connected with a first output end of a first driving chip U2, a control end of a switching tube Q6 is connected with a second output end of the first driving chip U2, a control end of a switching tube Q10 is connected with a first output end of a second driving chip U4, a control end of the switching tube Q11 is connected with a second output end of a second driving chip U4, a first output end of the first driving chip U2 and a second output end of the first driving chip U2, The first output end of the second driving chip U4 and the second output end of the second driving chip U4 are connected to output PWM signals, the first switch end of the switch tube Q5 and the first switch end of the switch tube Q10 are connected to the output end of the PD module, the first ac output end and the first switch end of the switch tube Q6 are connected to the second switch end of the switch tube Q5, the second ac output end and the first switch end of the switch tube Q11 are connected to the second switch end of the switch tube Q10, and the second switch end of the switch tube Q6 and the second switch end of the switch tube Q11 are grounded.

Preferably, the POE inverter further includes a diode D4, an anode of the diode D4 is connected to the output terminal of the PD module, and the first switch terminal of the switch Q5 and the first switch terminal of the switch Q10 are respectively connected to a cathode of the diode D4.

Preferably, the POE inverter further includes a resistor R26, and the first output terminal of the first driver chip U2 is connected to the control terminal of the switching tube Q5 through the resistor R26.

Preferably, the POE inverter further includes a resistor R28, and the second output terminal of the first driver chip U2 is connected to the control terminal of the switching tube Q6 through the resistor R29.

Preferably, the POE inverter further includes a resistor R48, and the first output terminal of the second driver chip U4 is connected to the control terminal of the switching tube Q10 through the resistor R48.

Preferably, the POE inverter further includes a resistor R50, and the second output terminal of the second driver chip U4 is connected to the control terminal of the switching tube Q11 through the resistor R50.

Preferably, the POE inverter further includes a capacitor C7, one end of the capacitor C7 is connected to the first ac output terminal, and the other end of the capacitor C7 is connected to the second ac output terminal.

Preferably, the POE inverter further includes a transformer T1, and the PD module is connected to the first switch terminal of the switching tube Q5 and the first switch terminal of the switching tube Q10 through the transformer T1.

Preferably, the POE inverter further comprises a network transformer T2, and the external PSE module is connected to the PD module through a network transformer T2.

The utility model has the advantages that: the on time of each switching tube for inversion is controlled by the PWM signal, so that the output voltage of the POE inverter is gradually increased, the effect of restraining surge current is achieved, and the occurrence of the protection and restart conditions of the PD module and the PSE module is reduced.

Drawings

Fig. 1 is a partial circuit diagram of a PD module according to the present invention.

Fig. 2 is another partial circuit diagram of the PD module according to the present invention.

Fig. 3 is a circuit diagram of the inverter module of the present invention.

The reference signs are: 1. an inversion module; 2. a PD module; 3. a first AC output; 4. a second AC output terminal.

Detailed Description

In order to facilitate understanding of those skilled in the art, the present invention will be further described with reference to the following examples and drawings, which are not intended to limit the present invention. The present invention will be described in detail with reference to the accompanying drawings.

As shown in fig. 2 and fig. 3, a POE inverter includes a PD module 2 and an inverter module 1, where the inverter module 1 includes a controller U14, a first driver chip U2, a second driver chip U4, a switch tube Q5, a switch tube Q6, a switch tube Q10, a switch tube Q11, a first ac output end 3, and a second ac output end 4, a control end of the first driver chip U2 is connected to a first output end of the controller U14, a control end of the second driver chip U4 is connected to a second output end of the controller U14, a control end of the switch tube Q5 is connected to a first output end of the first driver chip U2, a control end of the switch tube Q6 is connected to a second output end of the first driver chip U2, a control end of the switch tube Q10 is connected to a first output end of the second driver chip U4, a control end of the switch tube Q11 is connected to a second output end of the second driver chip U4, and a control end of the first driver chip 2 is connected to a first output end of the first driver chip U4, The second output end of the first driving chip U2, the first output end of the second driving chip U4 and the second output end of the second driving chip U4 are connected and are all used for outputting PWM signals, the first switch end of the switch tube Q5 and the first switch end of the switch tube Q10 are respectively connected with the output end of the PD module, the first ac output end 3 and the first switch end of the switch tube Q6 are respectively connected with the second switch end of the switch tube Q5, the second ac output end 4 and the first switch end of the switch tube Q11 are respectively connected with the second switch end of the switch tube Q10, and the second switch end of the switch tube Q6 and the second switch end of the switch tube Q11 are respectively grounded.

When the power supply is used, the PD module 2 outputs a power supply signal to the inversion module 1. The switching tube Q5, the switching tube Q6, the switching tube Q10 and the switching tube Q11 in the inverting module 1 invert the dc power signal to convert the dc power signal into an ac power signal, and the converted ac power signal is output from the first ac output terminal 3 and the second ac output terminal 4. The longer the on-time of the switching tube is, the larger the output voltage is, so in the inversion process, the duty ratio of the PWM can be gradually changed by the first driving chip U2 and the second driving chip U4 to gradually increase the on-time of the switching tube Q5, the switching tube Q6, the switching tube Q10 and the switching tube Q11, so that the output voltages of the first ac output terminal 3 and the second ac output terminal 4 are gradually increased, and the effect of suppressing the surge current is further achieved.

As shown in fig. 3, the POE inverter further includes a diode D4, an anode of the diode D4 is connected to the output terminal of the PD module 2, and the first switch terminal of the switch Q5 and the first switch terminal of the switch Q10 are respectively connected to a cathode of the diode D4, so as to prevent the current from flowing backwards.

As shown in fig. 3, the POE inverter further includes a resistor R26, and the first output terminal of the first driver chip U2 is connected to the control terminal of the switching tube Q5 through a resistor R26, so as to limit the current flowing into the control terminal of the switching tube Q5.

As shown in fig. 3, the POE inverter further includes a resistor R28, and the second output terminal of the first driver chip U2 is connected to the control terminal of the switching tube Q6 through a resistor R29, so as to limit the current flowing into the control terminal of the switching tube Q6.

As shown in fig. 3, the POE inverter further includes a resistor R48, and the first output terminal of the second driver chip U4 is connected to the control terminal of the switching tube Q10 through a resistor R48, so as to limit the current flowing into the control terminal of the switching tube Q10.

As shown in fig. 3, the POE inverter further includes a resistor R50, and the second output terminal of the second driver chip U4 is connected to the control terminal of the switching tube Q11 through a resistor R50, so as to limit the current flowing into the control terminal of the switching tube Q11.

As shown in fig. 3, the POE inverter further includes a capacitor C7, one end of the capacitor C7 is connected to the first ac output terminal 3, and the other end of the capacitor C7 is connected to the second ac output terminal 4, so as to reduce the output ripple of the first ac output terminal 3 and the second ac output terminal 4.

As shown in fig. 2 and fig. 3, the POE inverter further includes a transformer T1, and the PD module 2 is connected to the first switch terminal of the switching tube Q5 and the first switch terminal of the switching tube Q10 through the transformer T1.

As shown in fig. 1, the POE inverter further includes a network transformer T2, and the external PSE module is connected to the PD module 2 through a network transformer T2.

The above description is only for the preferred embodiment of the present invention, and the present invention is not limited to the above description, and although the present invention is disclosed in the preferred embodiment, it is not limited to the above description, and any person skilled in the art can make some changes or modifications to equivalent embodiments without departing from the scope of the present invention, but all the technical solutions of the present invention are within the scope of the present invention.

Claims

1. A POE inverter, its characterized in that: the power supply comprises a PD module and an inversion module, wherein the inversion module comprises a controller U14, a first driving chip U2, a second driving chip U4, a switching tube Q5, a switching tube Q6, a switching tube Q10, a switching tube Q11, a first alternating current output end and a second alternating current output end, the control end of the first driving chip U2 is connected with the first output end of the controller U14, the control end of the second driving chip U4 is connected with the second output end of the controller U14, the control end of the switching tube Q5 is connected with the first output end of the first driving chip U2, the control end of the switching tube Q6 is connected with the second output end of the first driving chip U2, the control end of the switching tube Q10 is connected with the first output end of the second driving chip U4, the control end of the switching tube Q11 is connected with the second output end of the second driving chip U4, the first output end of the first driving chip U2, the second output end of the first driving chip U6342, the second output end of the second driving chip U5928 and the second output end of the driving chip U599 are connected with the second output end of the driving chip U599 When outputting the PWM signal, the first switch end of the switch tube Q5 and the first switch end of the switch tube Q10 are respectively connected to the output end of the PD module, the first ac output end and the first switch end of the switch tube Q6 are respectively connected to the second switch end of the switch tube Q5, the second ac output end and the first switch end of the switch tube Q11 are respectively connected to the second switch end of the switch tube Q10, and the second switch end of the switch tube Q6 and the second switch end of the switch tube Q11 are respectively grounded.

2. The POE inverter of claim 1, wherein: the POE inverter further comprises a diode D4, an anode of the diode D4 is connected with an output end of the PD module, and a first switch end of the switch tube Q5 and a first switch end of the switch tube Q10 are respectively connected with a cathode of the diode D4.

3. The POE inverter of claim 1, wherein: the POE inverter further comprises a resistor R26, and a first output end of the first driver chip U2 is connected with a control end of the switching tube Q5 through a resistor R26.

4. The POE inverter of claim 1, wherein: the POE inverter further comprises a resistor R28, and a second output end of the first driver chip U2 is connected with a control end of the switching tube Q6 through a resistor R29.

5. The POE inverter of claim 1, wherein: the POE inverter further comprises a resistor R48, and a first output end of the second driver chip U4 is connected with a control end of the switching tube Q10 through a resistor R48.

6. The POE inverter of claim 1, wherein: the POE inverter further comprises a resistor R50, and a second output end of the second driver chip U4 is connected with a control end of the switching tube Q11 through a resistor R50.

7. The POE inverter of claim 1, wherein: the POE inverter further comprises a capacitor C7, one end of the capacitor C7 is connected with the first alternating current output end, and the other end of the capacitor C7 is connected with the second alternating current output end.

8. The POE inverter of claim 1, wherein: the POE inverter further includes a transformer T1, and the PD module is connected to the first switch end of the switching tube Q5 and the first switch end of the switching tube Q10 through the transformer T1.

9. The POE inverter of claim 1, wherein: the POE inverter further comprises a network transformer T2, and the external PSE module is connected to the PD module via a network transformer T2.