CN110677027A - Clamping type boosting power conversion circuit - Google Patents

Clamping type boosting power conversion circuit Download PDF

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Publication number
CN110677027A
CN110677027A CN201910917788.5A CN201910917788A CN110677027A CN 110677027 A CN110677027 A CN 110677027A CN 201910917788 A CN201910917788 A CN 201910917788A CN 110677027 A CN110677027 A CN 110677027A
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CN
China
Prior art keywords
conducting device
bus
unidirectional conducting
switch module
capacitor
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CN201910917788.5A
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Chinese (zh)
Inventor
王文波
王宏
鲁锦锋
周洪伟
梁欢迎
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TBEA Xinjiang Sunoasis Co Ltd
TBEA Xian Electric Technology Co Ltd
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TBEA Xinjiang Sunoasis Co Ltd
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Priority to CN201910917788.5A priority Critical patent/CN110677027A/en
Publication of CN110677027A publication Critical patent/CN110677027A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel

Abstract

A clamping type boost power conversion circuit comprises a power supply, an inductor, a first switch module, a second switch module, a first one-way conduction device, a second one-way conduction device, a third one-way conduction device, a fourth one-way conduction device, a fifth one-way conduction device, a sixth one-way conduction device, a flying capacitor CflyThe output upper bus capacitor, the output lower bus capacitor and the load unit; the fifth one-way conduction device is used for clamping the voltage stress of the second switch module to the voltage of the lower bus; and the sixth one-way conduction device is used for clamping the voltage stress of the fourth one-way conduction device to the upper bus voltage, so that the problem of overvoltage breakdown of the semiconductor device is avoided. Synchronous wave generation can be used in wave generation control, so that the control is simple; and staggered wave sending can be used, so that the inductance frequency is improved, and the inductance volume and the loss are reduced.

Description

Clamping type boosting power conversion circuit
Technical Field
The application relates to the technical field of boost power conversion circuits, in particular to a clamping type boost power conversion circuit.
Background
The Boost circuit is generally referred to as a Boost power conversion circuit, namely, the Boost power conversion circuit is used for inputting a voltage and outputting a higher voltage to further realize power conversion, and generally, the Boost power conversion circuit can realize a multi-level Boost circuit which can input more than or equal to three levels. Under the same input condition, the multi-level Boost circuit can realize higher-level voltage output by using devices with smaller voltage withstanding levels by reducing the voltage stress of power devices. Compared with the traditional two-level Boost circuit, the multi-level Boost circuit can realize medium-voltage high-power output.
As shown in fig. 1, when an input power supply is powered on, since the voltage of the flying capacitor is 0, T2 will bear the whole input voltage, the withstand voltage of each switching tube in a general multi-level Boost circuit is selected according to 0.5 times of the bus voltage or the upper and lower bus voltages, and when the input voltage is greater than the upper and lower bus voltages, T2 has a risk of voltage breakdown. When the output sides of the multiple Boost circuits are connected with the same bus in parallel, for example, when the multiple Boost circuits commonly existing in the photovoltaic inverter are applied, one or more of the multiple Boost circuits are electrified, namely, the bus voltage is already established, but one or more of the multiple Boost circuits are still not electrified, the flying capacitor and the input of the Boost circuit which is not electrified are both 0, the bus voltage is all applied to the fourth unidirectional conducting device D4, and the D4 bears the whole bus voltage. In combination with the requirement that the stress of the three-level device is selected according to the half-bus voltage, the D4 is very easy to cause overvoltage damage.
Disclosure of Invention
In order to overcome the problems in the prior art, the invention aims to provide a clamping type boost power conversion circuit which can solve the problem of non-voltage-sharing in series connection of devices in the prior art.
In order to achieve the purpose, the invention adopts the following technical scheme:
a clamping type boost power conversion circuit comprises a power supply VinThe power supply comprises an inductor L, a first switch module T1, a second switch module T2, a first one-way conducting device D1, a second one-way conducting device D2, a third one-way conducting device D3, a fourth one-way conducting device D4, and an output upper bus capacitor Cbus+Output lower bus capacitor Cbus-And a load unit; the power supply VinThe inductor L, the first switch module T1 and the second switch module T2 are sequentially connected in series to form a loop, the first unidirectional conducting device D1 and the second unidirectional conducting device D2 are respectively connected in parallel on the first switch module T1 and the second switch module T2 in an opposite direction, and the third unidirectional conducting device D3, the fourth unidirectional conducting device D4 and the output upper bus capacitor C are connected in parallelbus+Output lower bus capacitor Cbus-The three unidirectional conducting devices are sequentially connected in series, the anode of the third unidirectional conducting device D3 is connected with the series node of the inductor L and the first switch module T1, and the output lower bus capacitor Cbus-Negative pole and power supply VinThe load unit is connected with a bus capacitor C on the outputbus+And output lower bus capacitor Cbus-The output terminal of (2), characterized by also including clamping circuit module.
The clamping circuit module comprises a flying capacitor CflyAnd a fifth unidirectional device D5, the flying capacitor CflyIs electrically connected at the series node of the third unidirectional conducting device D3 and the fourth unidirectional conducting device D4, and a flying capacitor CflyIs electrically connected at the first and second switch module T1 and T2 series node; the anode of the fifth unidirectional conducting device D5 and the flying capacitor CflyIs connected with the negative terminal of the fifth unidirectional conducting device D5, the cathode of the fifth unidirectional conducting device D5 and the output upper bus capacitor Cbus+And output lower bus capacitor Cbus-Are connected.
The clamping circuit module comprises a flying capacitor CflyAnd a fifth unidirectional conducting device D5, which clamps the voltage stress of the second switch module T2 to the lower bus voltage when the supply voltage has been established and the bus voltage is not established, D5.
The clamping circuitThe module comprising a flying capacitor CflyA fifth unidirectional conducting device D5 and a sixth unidirectional conducting device D6, the flying capacitor CflyIs electrically connected at the series node of the third unidirectional conducting device D3 and the fourth unidirectional conducting device D4, and a flying capacitor CflyIs electrically connected at the first and second switch module T1 and T2 series node; the anode of the fifth unidirectional conducting device D5 and the flying capacitor CflyIs connected with the negative terminal of the fifth unidirectional conducting device D5, the cathode of the fifth unidirectional conducting device D5 and the output upper bus capacitor Cbus+And output lower bus capacitor Cbus-Are connected with each other; the anode of the sixth unidirectional conducting device D6 is connected to the cathode of the fifth unidirectional conducting device D5, and the cathode of the sixth unidirectional conducting device D6 is connected to the anode of the fourth unidirectional conducting device D4.
The clamping circuit module comprises a flying capacitor CflyA fifth unidirectional pass device D5, and a sixth unidirectional pass device D6, the sixth unidirectional pass device D6 clamps the voltage stress of the fourth unidirectional pass device D4 to the upper bus voltage when the bus voltage is established and the power input is not powered.
Compared with the prior art, the invention has the following advantages:
the clamping circuit module comprises a flying capacitor CflyAnd a fifth unidirectional conducting device D5, which clamps the voltage stress of the second switch module T2 to the lower bus voltage when the supply voltage has been established and the bus voltage is not established, D5. Thereby effectively protecting the second switch module and avoiding overvoltage breakdown.
The clamping circuit module comprises a flying capacitor CflyA fifth unidirectional pass device D5, and a sixth unidirectional pass device D6, the sixth unidirectional pass device D6 clamps the voltage stress of the fourth unidirectional pass device D4 to the upper bus voltage when the bus voltage is established and the power input is not powered. Therefore, the fourth one-way conduction device is effectively protected, and overvoltage breakdown is avoided.
Drawings
In order to more clearly illustrate the technical solutions in the implementation of the present application or the prior art, a brief description will be given below of the drawings used in the description of the embodiments of the present application or the prior art. It is clear that the following figures are some embodiments of the present application, from which other figures can be derived by a person skilled in the art without any invasive work.
Fig. 1 is a schematic diagram of a topology structure of a conventional flying capacitor three-level Boost circuit.
Fig. 2 is a circuit diagram of a clamping type boost power conversion circuit according to the present invention.
Fig. 3 is a circuit diagram of the clamping circuit of fig. 2.
Fig. 4 is another circuit diagram of the clamping type boost power conversion circuit of the present invention.
Fig. 5 is a circuit diagram of the clamping circuit of fig. 4.
FIG. 6a is a driving signal diagram of the synchronous wave-transmitting method of T1 and T2 in the circuit of FIG. 4.
Fig. 6b is a schematic diagram of current flow paths corresponding to four switching modes of the synchronous wave-generating mode in the circuit of fig. 4, where fig. 6b (1) is a switching mode a, fig. 6b (2) is a switching mode b, fig. 6b (3) is a switching mode c, and fig. 6b (4) is a switching mode d.
FIG. 7a is a diagram of driving signals in state 1 of the T1 and T2 interleaved wave-transmitting mode in the circuit of FIG. 4.
Fig. 7b is a schematic diagram of current flow paths corresponding to four switching modes in the staggered wave-sending mode state 1 of the circuit of fig. 4, where fig. 7b (1) is a switching mode a, fig. 7b (2) is a switching mode b, fig. 7b (3) is a switching mode c, and fig. 7b (4) is a switching mode d.
FIG. 8a is a diagram of driving signals in state 2 of the T1 and T2 interleaved wave-generating mode in the circuit of FIG. 4.
Fig. 8b is a schematic diagram of current flow paths corresponding to four switching modes in the staggered wave-sending mode state 2 in the circuit of fig. 4, where fig. 8b (1) is a switching mode a, fig. 8b (2) is a switching mode b, fig. 8b (3) is a switching mode c, and fig. 8b (4) is a switching mode d.
FIG. 9a is a diagram of driving signals in state 3 of the T1 and T2 interleaved wave-transmitting mode in the circuit of FIG. 4.
Fig. 9b is a schematic diagram of current flow paths corresponding to four switching modes in the staggered wave-sending mode state 3 in the circuit of fig. 4, where fig. 9b (1) is a switching mode a, fig. 9b (2) is a switching mode b, fig. 9b (3) is a switching mode c, and fig. 9b (4) is a switching mode d.
FIG. 10a is a diagram of driving signals in state 4 of the T1 and T2 interleaved wave-generating mode in the circuit of FIG. 4.
Fig. 10b is a schematic diagram of current flow paths corresponding to four switching modes in the staggered wave-sending mode state 4 in the circuit of fig. 4, where fig. 10b (1) is a switching mode a, fig. 10b (2) is a switching mode b, fig. 10b (3) is a switching mode c, and fig. 10b (4) is a switching mode d.
Fig. 11 is a circuit diagram of the mirror image of fig. 4.
Detailed Description
In order to make the technical solution better understood by those skilled in the art, a boost power conversion circuit is described in further detail below with reference to the accompanying drawings and the detailed description.
The boost power conversion circuit in the embodiment of the application mainly comprises:
FIG. 2 is a diagram of a clamping type boost power conversion circuit of the present invention, as shown in FIG. 2, including a power supply VinThe inductor L, the first switch module T1, the second switch module T2, the first one-way conduction device D1, the second one-way conduction device D2, the third one-way conduction device D3, the fourth one-way conduction device D4, and the output upper bus capacitor Cbus+Output lower bus capacitor Cbus-And a load unit. The power supply VinThe inductor L, the first switch module T1 and the second switch module T2 are sequentially connected in series to form a loop, the first unidirectional conducting device D1 and the second unidirectional conducting device D2 are respectively connected to the first switch module T1 and the second switch module T2 in parallel in a reverse direction, and the third unidirectional conducting device D3, the fourth unidirectional conducting device D4 and the output upper bus capacitor C are connected in parallel to form a loopbus+Output lower bus capacitor Cbus-The three unidirectional conducting devices are sequentially connected in series, the anode of the third unidirectional conducting device D3 is connected with the series node of the inductor L and the first switch module T1, and the output lower bus capacitor Cbus-Negative pole and power supply VinThe load unit is connected with the output upper bus capacitor Cbus+And output lower bus capacitor Cbus-the output terminal further comprising a clamping circuit module. The clamping circuit module comprises a flying capacitor CflyAnd a fifth unidirectional device D5. The flying capacitor CflyIs electrically connected at the series node of the third unidirectional conducting device D3 and the fourth unidirectional conducting device D4, and a flying capacitor CflyIs electrically connected to the series node of the first switch module T1 and the second switch module T2, the anode of the fifth unidirectional conducting device D5 and the flying capacitor CflyIs connected to the negative terminal of the fifth unidirectional conducting device D5, the cathode of the fifth unidirectional conducting device D5 and the output upper bus capacitor Cbus+And output lower bus capacitor Cbus-are connected.
Fig. 3 is a circuit diagram of the clamping circuit of fig. 2, which is a clamping type boost power conversion circuit, when the power voltage is established and the bus voltage is not established, the third unidirectional conducting device D3 and the fifth unidirectional conducting device D5 are turned on, and the voltage stress of the second switch module T2 is clamped to the lower bus voltage.
FIG. 4 is a diagram of another clamping type boost power converter circuit of the invention, as shown in FIG. 4, which includes a power source VinThe inductor L, the first switch module T1, the second switch module T2, the first one-way conducting device D1, the second one-way conducting device D2, the third one-way conducting device D3, the fourth one-way conducting device D4, and the output upper bus capacitor Cbus+Output lower bus capacitor Cbus-and a load unit. The power supply VinThe inductor L, the first switch module T1 and the second switch module T2 are sequentially connected in series to form a loop, the first unidirectional conducting device D1 and the second unidirectional conducting device D2 are respectively connected in parallel on the first switch module T1 and the second switch module T2 in an opposite direction, and the third unidirectional conducting device D3, the fourth unidirectional conducting device D4 and the output upper bus capacitor C are connected in parallelbus+Output lower bus capacitor Cbus-connected in series in turn, the anode of said third unidirectional conducting device D3 being connected to the series node of the inductance L and the first switching module T1, said output lower bus capacitance CbusNegative pole of (E) and power supply VinThe load unit is connected with a bus capacitor C on the outputbus+And output lower bus capacitor Cbus-the output terminal further comprising a clamping circuit module. The clamping circuit module comprises a flying capacitor CflyA fifth unidirectional conducting device D5 and a sixth unidirectional conducting device D6. The flying capacitor CflyIs electrically connected at the series node of the third unidirectional conducting device D3 and the fourth unidirectional conducting device D4, and a flying capacitor CflyIs electrically connected at the series node of the first switch module T1 and the second switch module T2, and the anode of the fifth unidirectional-conduction device D5 and the flying capacitor CflyIs connected with the negative terminal of the fifth unidirectional conducting device D5, the cathode of the fifth unidirectional conducting device D5 and the output upper bus capacitor Cbus+And output lower bus capacitor Cbus-the anode of the sixth unidirectional conducting device D6 is connected to the cathode of the fifth unidirectional conducting device D5, the cathode of the sixth unidirectional conducting device D6 is connected to the anode of the fourth unidirectional conducting device D4.
Fig. 5 is a circuit diagram of the clamping circuit of fig. 4, which is a clamping type boost power converter circuit, when the bus voltage is established and the power input is not powered, the sixth unidirectional conducting device D6 is turned on, and the voltage stress of the fourth unidirectional conducting device D4 is clamped to the upper bus voltage.
When the circuit normally operates, the wave transmitting modes of the first switch module T1 and the second switch module T2 are synchronous or not, and the wave transmitting modes can be divided into synchronous wave transmitting and staggered wave transmitting.
Fig. 6 is a working condition when the first switch module T1 and the second switch module T2 are synchronously transmitting, wherein fig. 6b is a schematic diagram of current flow paths corresponding to 4 switch modes in the circuit of fig. 4, and according to the driving signal diagram of the first switch module T1 and the second switch module T2 in fig. 6a, as shown in fig. 6b (1), in the switch mode a, the first switch module T1 is turned on, the second switch module T2 is turned off, at this time, the power Vin, the inductor L, the first switch module T1, the fifth unidirectional conducting device D5, and the output lower bus capacitor Cbus form a current loop, at this time, the voltage stress of the second switch module T2 is clamped to the lower bus voltage by the fifth unidirectional conducting device D5. As shown in fig. 6b (2), in the switching mode b, the first switch module T1 and the second switch module T2 are turned on simultaneously, and at this time, the power source Vin, the inductor L, the first switch module T1 and the second switch module T2 form a current loop. As shown in fig. 6b (3), the operation mode in the switching mode c is the same as that in the switching mode a. As shown in fig. 6b (4), in the switching mode D, the first switch module T1 and the second switch module T2 are turned off at the same time, and at this time, the power Vin, the inductor L, the third one-way conducting device D3, the fourth one-way conducting device D4, the output upper bus capacitor Cbus +, and the output lower bus capacitor Cbus "form a current loop. Wherein the sixth unidirectional conducting device D6 clamps the voltage stress of the fourth unidirectional conducting device D4 to the upper bus voltage. From the above analysis, we can see that in both mode a and c conditions, the power supply will charge the lower bus via L, T1 and D5, resulting in the lower bus energy being greater than the upper bus energy. The load unit needs to transfer part of the lower bus energy to the full bus through real-time adjustment.
For the interleaved wave generation method, there are 4 different operating states in total according to the comparison between the input voltage and the bus voltage, and the comparison between the flying capacitor voltage Vfly and the upper bus voltage Vbus +:
state 1: when Vin>0.5Vbus, duty cycle D of the switching module<0.5,Vfly>Vbus +; fig. 7b is a schematic diagram of current flow paths corresponding to 4 switching modes in the circuit of fig. 4, and according to the driving signal diagrams of the first switching module T1 and the second switching module T2 in fig. 7a, as shown in fig. 7b (1), in the switching mode a, the first switching module T1 is turned on, and the second switching module T2 is turned off, at this time, the power source Vin, the inductor L, the first switching module T1, and the flying capacitor C are turned offflyThe fourth one-way conduction device D4, the output upper bus capacitor Cbus + and the output lower bus capacitor Cbus-form a current loop, and the voltage stress of the second switch module T2 is caused by the flying capacitor CflyClamped to the bus voltage. As shown in fig. 7b (2), in the switching mode b, the first switch module T1 and the second switch module T2 are turned off simultaneously, and at this time, the power Vin, the inductor L, the third one-way conducting device D3, the fourth one-way conducting device D4, the output upper bus capacitor Cbus +, and the output lower bus capacitor Cbus "form a current loop. As shown in fig. 7b (3), in the switching mode C, the first switching module T1 is turned off, the second switching module T2 is turned on, and the power source Vin, the inductor L, the third unidirectional conducting device D3, and the flying capacitor C are turned onflyThe second switch module T2 forms a current loop. As shown in fig. 7b (4), in the switching mode D, the first switch module T1 and the second switch module T2 are turned off at the same time, and at this time, the power source Vin, the inductor L, the third one-way conducting device D3, the fourth one-way conducting device D4, the output upper bus capacitor Cbus +, and the output lower bus capacitor Cbus "form a current loop. Wherein the sixth unidirectional conducting device D6 clamps the voltage stress of the fourth unidirectional conducting device D4 to the upper bus voltage.
State 2: when Vin >0.5Vbus, duty cycle D <0.5, Vfly < Vbus +;
fig. 8b is a schematic diagram of current flow paths corresponding to 4 switching modes in the circuit of fig. 4, according to the driving signal diagram of the first switch module T1 and the second switch module T2 in fig. 8a, as shown in fig. 8b (1), in the switching mode a, the first switch module T1 is turned on, the second switch module T2 is turned off, at this time, the power Vin, the inductor L, the first switch module T1, the fifth unidirectional conducting device D5, and the output lower bus capacitor Cbus form a current loop, at this time, the voltage stress of the second switch module T2 is clamped to the lower bus voltage by the fifth unidirectional conducting device D5. As shown in fig. 8b (2), in the switching mode b, the first switching module T1 and the second switching module T2 are turned off simultaneously, and at this time, the power source Vin, the inductor L, the third unidirectional conducting device D3, and the flying capacitor C are turned off simultaneouslyflyThe fifth unidirectional device D5 and the output lower bus capacitor Cbus form a current loop, and the voltage stress of the second switch module T2 is clamped to the lower bus voltage by the fifth unidirectional device D5. As shown in fig. 8b (3), in the switching mode C, the first switching module T1 is turned off, the second switching module T2 is turned on, and at this time, the power source Vin, the inductor L, the third unidirectional conducting device D3, and the flying capacitor C are turned onflyThe second switch module T2 forms a current loop. As shown in fig. 8b (4), in the switching mode D, the first switching module T1 and the second switching module T2 are turned off simultaneously, and at this time, the power source Vin, the inductor L, the third unidirectional conducting device D3, and the flying capacitor C are turned off simultaneouslyflyThe fifth one-way conduction device D5 and the output lower bus capacitor Cbus form a current loop. Wherein the fifth unidirectional conducting device D5 clamps the second switch module T2 to the lower bus voltage.
State 3: when Vin <0.5Vbus, the duty cycle D >0.5, Vfly > Vbus +;
fig. 9b is a schematic diagram of current flow paths corresponding to 4 switching modes in the circuit of fig. 4, and according to the driving signal diagram of the first switching module T1 and the second switching module T2 in fig. 9a, as shown in fig. 9b (1), in the switching mode a, the first switching module T1 and the second switching module T2 are simultaneously turned on, and at this time, the power source Vin, the inductor L, the first switching module T1, and the second switching module T2 form a current loop. As shown in fig. 9b (2), in the switching mode b, the first switching module T1 is turned on, the second switching module T2 is turned off, and the power source Vin, the inductor L, the first switching module T1 and the flying capacitor C are turned onflyThe fourth one-way conduction device D4, the output upper bus capacitor Cbus + and the output lower bus capacitor Cbus-form a current loop. As shown in fig. 9b (3), in the switching mode c, the first switch module T1 and the second switch module T2 are turned on simultaneously, and at this time, the power source Vin, the inductor L, the first switch module T1 and the second switch module T2 form a current loop. As shown in fig. 9b (4), in the switching mode D, the first switching module T1 is turned off, the second switching module T2 is turned on, and at this time, the power source Vin, the inductor L, the third unidirectional conducting device D3, and the flying capacitor C are turned onflyThe second switch module T2 forms a current loop.
And 4: when Vin <0.5Vbus, the duty cycle D >0.5, Vfly < Vbus +;
fig. 10b is a schematic diagram of current flow paths corresponding to 4 switching modes in the circuit of fig. 4, and according to the driving signal diagram of the first switching module T1 and the second switching module T2 in fig. 10a, as shown in fig. 10b (1), in the switching mode a, the first switching module T1 and the second switching module T2 are simultaneously turned on, and at this time, the power source Vin, the inductor L, the first switching module T1, and the second switching module T2 form a current loop. The sixth unidirectionally conducting device D6 clamps the voltage of the fourth unidirectionally conducting device D4 to the upper bus voltage. As shown in fig. 10b (2), in the switching mode b, the first switch module T1 is turned on, and the second switch module T2 is turned off, at this time, the power source Vin, the inductor L, the first switch module T1, the fifth one-way pass device D5, and the output lower bus capacitor Cbus-form a current loop, wherein the fifth one-way pass device D5 clamps the second switch module T2 to the lower bus voltage. In the switching mode c, the first switching module is shown in FIG. 10b (3)The T1 and the second switch module T2 are turned on simultaneously, and at this time, the power Vin, the inductor L, the first switch module T1, and the second switch module T2 form a current loop. As shown in fig. 10b (4), in the switching mode D, the first switching module T1 is turned off, the second switching module T2 is turned on, and at this time, the power source Vin, the inductor L, the third unidirectional conducting device D3, and the flying capacitor C are turned onflyThe second switch module T2 forms a current loop.
FIG. 11 is a circuit diagram of the mirror image of FIG. 4, showing a clamping type boost power conversion circuit including a power supply VinThe inductor L, the first switch module T1, the second switch module T2, the first one-way conducting device D1, the second one-way conducting device D2, the third one-way conducting device D3, the fourth one-way conducting device D4, and the output upper bus capacitor Cbus+Output lower bus capacitor Cbus-and a load unit. The power supply VinThe first switch module T1, the second switch module T2 and the inductor L are sequentially connected in series to form a loop, the first unidirectional conducting device D1 and the second unidirectional conducting device D2 are respectively connected in parallel on the first switch module T1 and the second switch module T2 in an opposite direction, and the output upper bus capacitor C is connected with the output upper bus capacitor Cbus+Output lower bus capacitor CbusA fourth unidirectional conducting device D4 and a third unidirectional conducting device D3 connected in series in sequence, wherein the cathode of the third unidirectional conducting device D3 is connected with the series node of the inductor L and the second switch module T2, and the output upper bus capacitor C is connected with the output upper bus capacitor Cbus+Positive pole and power supply VinThe load unit is connected with the output end of the upper and lower bus capacitors, and the clamping circuit module comprises a flying capacitor CflyA fifth unidirectional conducting device D5 and a sixth unidirectional conducting device D6. The flying capacitor CflyIs electrically connected at the series node of the first and second switch modules, and a flying capacitor CflyIs electrically connected at a series node of a third unidirectional conducting device D3 and a fourth unidirectional conducting device D4, the cathode of the fifth unidirectional conducting device D5 and the flying capacitor CflyIs connected with the positive terminal of the fifth unidirectional conducting device D5, the anode of the fifth unidirectional conducting device D5 is connected with the output upper bus capacitor Cbus+And output lower bus capacitor Cbus-series connection ofThe cathode of the sixth unidirectional conducting device D6 is connected to the anode of the fifth unidirectional conducting device D5, and the anode of the sixth unidirectional conducting device D6 is connected to the cathode of the fourth unidirectional conducting device D4.

Claims (5)

1. A clamping type boost power conversion circuit comprises a power supply VinThe inductor L, the first switch module T1, the second switch module T2, the first one-way conducting device D1, the second one-way conducting device D2, the third one-way conducting device D3, the fourth one-way conducting device D4, and the output upper bus capacitor Cbus+Output lower bus capacitor Cbus-And a load unit; the power supply VinThe inductor L, the first switch module T1 and the second switch module T2 are sequentially connected in series to form a loop, the first unidirectional conducting device D1 and the second unidirectional conducting device D2 are respectively connected in parallel on the first switch module T1 and the second switch module T2 in an opposite direction, and the third unidirectional conducting device D3, the fourth unidirectional conducting device D4 and the output upper bus capacitor C are connected in parallelbus+Output lower bus capacitor Cbus-The three unidirectional conducting devices are sequentially connected in series, the anode of the third unidirectional conducting device D3 is connected with the series node of the inductor L and the first switch module T1, and the output lower bus capacitor Cbus-Negative pole and power supply VinThe load unit is connected with a bus capacitor C on the outputbus+And output lower bus capacitor Cbus-The output of (2), its characterized in that: the circuit structure also comprises a clamping circuit module.
2. The clamping type boost power conversion circuit according to claim 1, wherein: the clamping circuit module comprises a flying capacitor CflyAnd a fifth unidirectional device D5, the flying capacitor CflyIs electrically connected at the series node of the third unidirectional conducting device D3 and the fourth unidirectional conducting device D4, and a flying capacitor CflyIs electrically connected at the first and second switch module T1 and T2 series node; the anode of the fifth unidirectional conducting device D5 and the flying capacitor CflyIs connected to the negative terminal of the fifth unidirectional conducting device D5, the cathode of the fifth unidirectional conducting device D5 and the outputUpper bus capacitor Cbus+And output lower bus capacitor Cbus-Are connected.
3. The clamping type boost power conversion circuit according to claim 2, wherein: when the supply voltage has been established and the bus voltage is not established, the fifth unidirectional conducting device D5 stress clamps the voltage of the second switch module T2 to the lower bus voltage.
4. The clamping type boost power conversion circuit according to claim 1, wherein: the clamping circuit module comprises a flying capacitor CflyA fifth unidirectional conducting device D5 and a sixth unidirectional conducting device D6, the flying capacitor CflyIs electrically connected at the series node of the third unidirectional conducting device D3 and the fourth unidirectional conducting device D4, and a flying capacitor CflyIs electrically connected at the first and second switch module T1 and T2 series node; the anode of the fifth unidirectional conducting device D5 and the flying capacitor CflyIs connected with the negative terminal of the fifth unidirectional conducting device D5, the cathode of the fifth unidirectional conducting device D5 and the output upper bus capacitor Cbus+And output lower bus capacitor Cbus-Are connected with each other; the anode of the sixth unidirectional conducting device D6 is connected to the cathode of the fifth unidirectional conducting device D5, and the cathode of the sixth unidirectional conducting device D6 is connected to the anode of the fourth unidirectional conducting device D4.
5. The clamping type boost power conversion circuit according to claim 4, wherein: when the bus voltage is established and the power input is not powered, the sixth unidirectional conducting device D6 clamps the voltage stress of the fourth unidirectional conducting device D4 to the upper bus voltage.
CN201910917788.5A 2019-09-26 2019-09-26 Clamping type boosting power conversion circuit Pending CN110677027A (en)

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Application Number Priority Date Filing Date Title
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111293880A (en) * 2020-03-04 2020-06-16 深圳科士达科技股份有限公司 Direct current power conversion circuit
TWI719906B (en) * 2020-06-05 2021-02-21 台達電子工業股份有限公司 Boosting circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111293880A (en) * 2020-03-04 2020-06-16 深圳科士达科技股份有限公司 Direct current power conversion circuit
CN111293880B (en) * 2020-03-04 2023-07-04 深圳科士达新能源有限公司 Direct current power conversion circuit
TWI719906B (en) * 2020-06-05 2021-02-21 台達電子工業股份有限公司 Boosting circuit

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