CN212727139U - TFTLCD video signal scaling processing device based on FPGA platform - Google Patents
TFTLCD video signal scaling processing device based on FPGA platform Download PDFInfo
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- CN212727139U CN212727139U CN202021475739.5U CN202021475739U CN212727139U CN 212727139 U CN212727139 U CN 212727139U CN 202021475739 U CN202021475739 U CN 202021475739U CN 212727139 U CN212727139 U CN 212727139U
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Abstract
The utility model discloses a TFTLCD video signal zooming processing device based on FPGA platform, including display mechanism and treater, treater electric connection is in the display mechanism rear end, the device adopts field programmable gate array, use 1 SDRAM controller to control 2 SDRAM read-write and realize TFTLCD video signal zooming system's processing and display, make the device compensate the performance deficiency that TFTLCD video signal zooming system exists, FPGA writes the video data of input into SDRAM and caches, the data transfer is zoomed to the video zooming module, the video signal after zooming writes into SDRAM again and caches, wait for TCON liquid crystal display control module to read, make the equipment reduce hardware complexity and material cost, reduce the area of PCB, and the commonality is good simultaneously, it is convenient to transplant, the demand that company's multiple TCON liquid crystal display module shows in real time is satisfied, the flexibility of the TFTLCD liquid crystal display module is improved.
Description
Technical Field
The utility model relates to a digital video image processing technology field specifically is a TFTLCD video signal processing apparatus that zooms based on FPGA platform.
Background
With the rapid development of scientific technology, image processing is considered to be one of the most important fields in the next decades. The digital image processing technology is developing towards the direction that the processing algorithm is more optimized, the processing speed is higher, and the definition of the processed image is higher, so that the intelligent generation, processing, recognition and understanding of the image are the final targets of the digital image processing. Some companies design and develop dedicated video image processors (and vision processors, optimized in terms of performance and quality, and then provide licensing to the outside, which is called intellectual property, and others sell chips directly, which is called silicon chips.
Different liquid crystal display modules usually have different display resolutions, and the conventional method is to design special liquid crystal display driving software for each liquid crystal display module, so that when various liquid crystal display modules exist, the operation is quite inconvenient. In order to better meet the real-time display requirement of various TFT LCD liquid crystal display modules of companies, the TFT LCD video signal scaling system is realized by adopting a solution of IP and chips, so that high performance can be obtained, but the system is not flexible and has a high price (a license or a chip with related functions needs to be purchased); pure software (upper computer processing) is adopted, the operation method is simple, but the occupied resources are large, and the requirement of real-time display of the video image cannot be met.
To the problem, the utility model provides a TFTLCD video signal zooms processing apparatus based on FPGA platform.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a TFTLCD video signal zooms processing apparatus based on FPGA platform, it is not enough to have possessed the performance that compensaties original TFTLCD video signal zooms system, and TFTLCD liquid crystal display module is little and nimble advantage to the problem in the background art has been solved.
In order to achieve the above object, the utility model provides a following technical scheme: a TFTLCD video signal zooming processing device based on an FPGA platform comprises a display mechanism and a processor, wherein the processor is electrically connected to the rear end of the display mechanism, the display mechanism comprises an installation frame, a liquid crystal display screen, a TCON liquid crystal display control module and a power supply system, the liquid crystal display screen is arranged at the rear end of the installation frame, the TCON liquid crystal display control module is arranged at the rear end of the liquid crystal display screen, and the power supply system is arranged in the display mechanism and the processor;
the processor comprises an FPGA, an HDMI/DVI/LVDS to RGB and a Flash, one end of the FPGA is electrically connected with the TCON liquid crystal display control module, the other end of the FPGA is electrically connected with the HDMI/DVI/LVDS to RGB, and the Flash is arranged at the top end of the FPGA.
Preferably, the FPGA includes a clock generator and an LVDS, the clock generator and the LVDS are disposed at a top end of the FPGA, and the LVDS is disposed at one side of the clock generator.
Preferably, the clock generator comprises an SDRAM and a video scaling module, the SDRAM and the video scaling module are arranged on one side of the clock generator, and the video scaling module is arranged on one side of the SDRAM.
Preferably, the side end of the TCON liquid crystal display control module is electrically connected with one side of the SDRAM, and the other side of the SDRAM is connected with one side of the LVDS.
Preferably, the HDMI/DVI/LVDS to RGB includes an HDMI/DVI/LVDS signal source, and an HDMI/DVI/LVDS signal source is disposed inside the HDMI/DVI/LVDS to RGB.
Compared with the prior art, the beneficial effects of the utility model are as follows:
1. the utility model provides a TFTLCD video signal zooms processing apparatus based on FPGA platform, the device adopt field programmable gate array, use 1 SDRAM controller control 2 SDRAM reading and writing to realize TFT LCD video signal zoom system's processing and demonstration for the device has compensatied the performance that TFTLCD video signal zoom system exists not enough.
2. The utility model provides a TFTLCD video signal zooms processing apparatus based on FPGA platform, FPGA writes into SDRAM with the video data of input and caches, data transfer zooms the module and zooms the processing to the video, SDRAM carries out the cache is write into once more to the video signal after zooming, wait for TCON liquid crystal display control module to read, make this equipment reduce hardware complexity and material cost, the area of PCB has been reduced, the commonality is good simultaneously, it is convenient to transplant, the demand that the multiple TCON liquid crystal display module of company shows in real time has been satisfied, the flexibility that TFTLCD liquid crystal display module shows has been improved.
Drawings
Fig. 1 is a schematic view of the overall structure of the present invention;
FIG. 2 is a schematic diagram of a processor according to the present invention;
fig. 3 is a system block diagram of the present invention.
In the figure: 1. a display mechanism; 11. a mounting frame; 12. a liquid crystal display screen; 13. a TCON liquid crystal display control module; 14. a power supply system; 2. a processor; 21. an FPGA; 211. a clock generator; 2111. SDRAM; 2112. a video scaling module; 212. LVDS; 22. HDMI/DVI/LVDS to RGB; 221. HDMI/DVI/LVDS signal source; 23. flash.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Please refer to fig. 1, a TFTLCD video signal scaling processing device based on an FPGA platform includes a display mechanism 1 and a processor 2, the processor 2 is electrically connected to the rear end of the display mechanism 1, the display mechanism 1 includes an installation frame 11, a liquid crystal display 12, a TCON liquid crystal display control module 13 and a power system 14, the rear end of the installation frame 11 is provided with the liquid crystal display 12, the rear end of the liquid crystal display 12 is provided with the TCON liquid crystal display control module 13, and the power system 14 is arranged inside the display mechanism 1 and the processor 2.
Referring to fig. 2, the processor 2 includes an FPGA21, an HDMI/DVI/LVDS to RGB22 and a Flash23, one end of the FPGA21 is electrically connected to the TCON liquid crystal display control module 13, the other end of the FPGA21 is electrically connected to the HDMI/DVI/LVDS to RGB22, the top end of the FPGA21 is provided with the Flash23, the FPGA21 includes a clock generator 211 and an LVDS212, the top end of the FPGA21 is provided with the clock generator 211 and the LVDS212, one side of the clock generator 211 is provided with the LVDS212, the clock generator 211 includes an SDRAM2111 and a video scaling module 2112, one side of the clock generator 211 is provided with the SDRAM2111 and the video scaling module 2112, one side of the SDRAM2111 is provided with the video scaling module 2112, the side end of the TCON liquid crystal display control module 13 is electrically.
Please refer to fig. 3, the HDMI/DVI/LVDS to RGB22 includes an HDMI/DVI/LVDS signal source 221, the HDMI/DVI/LVDS to RGB22 is internally provided with the HDMI/DVI/LVDS signal source 221, the power system 14 is responsible for providing working voltage to each module of the system, the clock generator 211 is responsible for providing a driving clock to each submodule of the FPGA21, the HDMI/DVI/LVDS to RGB22 chip receives an external LVDS212 video signal, converts the video signal into an RGB signal, and outputs the RGB signal to the FPGA21, the FPGA21 writes the input video data into the SDRAM2111 for buffering, then performs the video scaling module 2112 for processing, writes the scaled video signal into the SDRAM2111 again for buffering, waits for the TCON liquid crystal display control module 13 to read, and the TCON liquid crystal display control module 13 reads the video data in the SDRAM2111 for processing by the LVDS212 sending module; the LVDS212 sending module performs parallel-serial conversion and sends out according to the control time sequence of the TFTLCD, a liquid crystal display 12 is driven to perform real-time display, a Flash23 memory is used for loading a program of an FPGA21, the device adopts a field programmable logic gate array, 1 SDRAM2111 controller is used for controlling the reading and writing of 2 SDRAM2111, the processing and the display of a TFTLCD video signal zooming system are realized, the device makes up the performance deficiency of the TFTLCD video signal zooming system, the FPGA21 writes the input video data into the SDRAM2111 for caching, the data is transmitted to the video zooming module 2112 for zooming, the zoomed video signal is written into the SDRAM again for caching, the device waits for the reading of the TCON liquid crystal display control module 13, the hardware complexity and the material cost are reduced, the area of the PCB is reduced, meanwhile, the universality is good, the transplantation is convenient, the real-time display requirements of various TCON liquid crystal display modules 13 of companies are met, the flexibility of the TFTLCD liquid crystal display module is improved.
In summary, the following steps: the utility model provides a TFTLCD video signal zooms processing apparatus based on FPGA platform, the device adopts field programmable logic gate array, use 1 SDRAM2111 controller control 2 SDRAM2111 to read and write the processing and the demonstration that TFTLCD video signal zooms system has been realized, make the device compensate the performance that TFTLCD video signal zooms system exists not enough, FPGA21 writes into SDRAM2111 with the video data of input and caches, data transfer zooms the processing to video zoom module 2112, the video signal after zooming writes into SDRAM2111 once more and caches, wait for TCON liquid crystal display control module 13 to read, make this equipment reduce hardware complexity and material cost, the area of PCB has been reduced, simultaneously the commonality is good, it is convenient to transplant, the multiple TCON liquid crystal display module 13 real-time demand that shows of company has been satisfied, the flexibility that TFTLCD liquid crystal display module shows has been improved.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (5)
1. The utility model provides a TFTLCD video signal zooms processing apparatus based on FPGA platform, includes display mechanism (1) and treater (2), treater (2) electric connection is in display mechanism (1) rear end, its characterized in that: the display mechanism (1) comprises an installation frame (11), a liquid crystal display (12), a TCON liquid crystal display control module (13) and a power supply system (14), the liquid crystal display (12) is arranged at the rear end of the installation frame (11), the TCON liquid crystal display control module (13) is arranged at the rear end of the liquid crystal display (12), and the power supply system (14) is arranged inside the display mechanism (1) and the processor (2);
the processor (2) comprises an FPGA (21), an HDMI/DVI/LVDS to RGB (22) and a Flash (23), one end of the FPGA (21) is electrically connected with the TCON liquid crystal display control module (13), the other end of the FPGA (21) is electrically connected with the HDMI/DVI/LVDS to RGB (22), and the top end of the FPGA (21) is provided with the Flash (23).
2. The apparatus for scaling and processing TFTLCD video signal based on FPGA platform according to claim 1, wherein: the FPGA (21) comprises a clock generator (211) and an LVDS (212), the clock generator (211) and the LVDS (212) are arranged at the top end of the FPGA (21), and the LVDS (212) is arranged on one side of the clock generator (211).
3. The apparatus for scaling and processing TFTLCD video signal based on FPGA platform according to claim 2, wherein: the clock generator (211) comprises an SDRAM (2111) and a video scaling module (2112), the SDRAM (2111) and the video scaling module (2112) are arranged on one side of the clock generator (211), and the video scaling module (2112) is arranged on one side of the SDRAM (2111).
4. The apparatus for scaling and processing TFTLCD video signal based on FPGA platform according to claim 1, wherein: the side end of the TCON liquid crystal display control module (13) is electrically connected with one side of an SDRAM (2111), and the other side of the SDRAM (2111) is connected with one side of an LVDS (212).
5. The apparatus for scaling and processing TFTLCD video signal based on FPGA platform according to claim 1, wherein: the HDMI/DVI/LVDS to RGB (22) comprises an HDMI/DVI/LVDS signal source (221), and the HDMI/DVI/LVDS to RGB (22) is internally provided with the HDMI/DVI/LVDS signal source (221).
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CN115150566A (en) * | 2022-09-01 | 2022-10-04 | 杭州雄迈集成电路技术股份有限公司 | Multi-path multi-resolution video real-time output method and system |
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Publication number | Priority date | Publication date | Assignee | Title |
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CN115150566A (en) * | 2022-09-01 | 2022-10-04 | 杭州雄迈集成电路技术股份有限公司 | Multi-path multi-resolution video real-time output method and system |
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