CN212695994U - Pulse optical fiber amplifier system for realizing OOK and PPM debugging mode - Google Patents
Pulse optical fiber amplifier system for realizing OOK and PPM debugging mode Download PDFInfo
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Abstract
The utility model relates to a realize pulse fiber amplifier system of OOK and PPM debugging mode, including power module, FPGA logic module, OOK modulation drive module and PPM modulation drive module, power module with FPGA logic module, OOK modulation drive module and PPM modulation drive module homogeneous phase connect, FPGA logic module with OOK modulation drive module and PPM modulation drive module be connected. Adopted the utility model discloses a realize the pulse fiber amplifier system of OOK and PPM debugging mode, will strengthen digital optical communication's stability and interference killing feature through the mode that OOK modulation and PPM modulation combined together, can freely switch according to user's needs through modulating OOK and PPM to greatly improved the application field of this function, for example optical fiber communication between city and city, submarine optical cable communication, satellite communication and so on.
Description
Technical Field
The utility model relates to an electronic circuit field especially relates to remote wireless optical communication field, specifically indicates a pulse fiber amplifier system who realizes OOK and PPM debugging mode.
Background
With the advent of the information-oriented society, communication technologies have also been developed day by day. In the past few years, the demand for transmission rate has been increasing, the number of users using high-speed data transmission has been increasing, optical fiber communication has become a backbone network of wide area communication networks because of the ability to transmit high-rate data, and more than 90% of information in wide area communication networks is transmitted through optical fiber nowadays. But from the optical backbone to the "last mile" of the subscriber, it is not only costly but also time consuming if the optical cable is laid; many wireless communication technologies can solve the "last mile" problem. In the wireless optical communication technology, in order to ensure the reliability and stability of the link, a good link power budget must be provided. The wireless optical communication generally adopts an intensity modulation/direct detection system, and the main modulation modes of the system comprise on-off keying (OOK), Pulse Position Modulation (PPM), Differential Pulse Position Modulation (DPPM), Digital Pulse Interval Modulation (DPIM), double-head pulse interval modulation (DH-PIM) and the like. The method mainly analyzes a circuit design scheme which simultaneously supports OOK and PPM modes to switch corresponding circuits.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming the shortcoming of above-mentioned prior art, providing a pulse fiber amplifier system who satisfies reliability height, stability good, the comparatively extensive realization OOK of application scope and PPM debugging mode.
In order to achieve the above object, the pulse optical fiber amplifier system of the present invention for implementing OOK and PPM debugging mode is as follows:
the pulse optical fiber amplifier system for realizing the OOK and PPM debugging mode is mainly characterized by comprising a power module, an FPGA logic module, an OOK modulation driving module and a PPM modulation driving module, wherein the power module is connected with the FPGA logic module, the OOK modulation driving module and the PPM modulation driving module, and the FPGA logic module is connected with the OOK modulation driving module and the PPM modulation driving module.
Preferably, the PPM modulation driving module includes a high-speed comparator and an NMOS driving unit, the high-speed comparator and the NMOS driving unit are connected in series, the high-speed comparator is connected with the FPGA logic module, and the NMOS driving unit is connected with the power supply.
Preferably, the OOK modulation driving module includes a chip ADN 2871.
Preferably, the power module adopts a DC-DC chip.
Preferably, the system further comprises a first resistor, a second resistor, a third resistor and a fourth resistor, wherein one end of the first resistor is connected with the power module, and the other end of the first resistor is grounded; one end of the second resistor is connected with the first resistor, and the other end of the second resistor is connected with the OOK modulation driving module; one end of the third resistor is connected with the OOK modulation driving module, and the other end of the third resistor is grounded; one end of the fourth resistor is connected with the OOK modulation driving module, and the other end of the fourth resistor is grounded.
Adopted the utility model discloses a realize the pulse fiber amplifier system of OOK and PPM debugging mode, will strengthen digital optical communication's stability and interference killing feature through the mode that OOK modulation and PPM modulation combined together, can freely switch according to user's needs through modulating OOK and PPM to greatly improved the application field of this function, for example optical fiber communication between city and city, submarine optical cable communication, satellite communication and so on.
Drawings
Fig. 1 is a general block diagram of a pulse fiber amplifier system implementing OOK and PPM debugging modes according to the present invention.
Fig. 2 is a circuit diagram of a pulse fiber amplifier system for implementing OOK and PPM debugging modes according to the present invention.
Fig. 3 is an eye diagram effect of the OOK modulation actual test of the pulse fiber amplifier system implementing OOK and PPM debugging modes according to the present invention.
Detailed Description
In order to more clearly describe the technical content of the present invention, the following further description is given with reference to specific embodiments.
The utility model discloses an among the technical scheme of the pulse fiber amplifier system of realization OOK and PPM debugging mode, each functional module and the module unit that wherein include all can correspond to specific hardware circuit in the integrated circuit structure, consequently only relate to the improvement of specific hardware circuit, and the hardware part is not merely the carrier that belongs to execution control software or computer program, consequently solves corresponding technical problem and obtains corresponding technical effect and also does not relate to the application of any control software or computer program, that is to say, the utility model discloses only utilize the improvement in the aspect of the hardware circuit structure that these modules and units relate to can solve the technical problem that will solve to obtain corresponding technical effect, and need not assist and can realize corresponding function with specific control software or computer program.
The utility model discloses a this realize pulse fiber amplifier system of OOK and PPM debugging mode, including power module, FPGA logic module, OOK modulation drive module and PPM modulation drive module, power module with FPGA logic module, OOK modulation drive module and PPM modulation drive module homogeneous phase connect, FPGA logic module with OOK modulation drive module and PPM modulation drive module be connected.
Preferably, the PPM modulation driving module includes a high-speed comparator and an NMOS driving unit, the high-speed comparator and the NMOS driving unit are connected in series, the high-speed comparator is connected with the FPGA logic module, and the NMOS driving unit is connected with the power supply.
As a preferred embodiment of the present invention, the OOK modulation driving module includes a chip ADN 2871.
As a preferred embodiment of the present invention, the power module employs a DC-DC chip.
As a preferred embodiment of the present invention, the system further includes a first resistor, a second resistor, a third resistor and a fourth resistor, wherein one end of the first resistor is connected to the power module, and the other end is grounded; one end of the second resistor is connected with the first resistor, and the other end of the second resistor is connected with the OOK modulation driving module; one end of the third resistor is connected with the OOK modulation driving module, and the other end of the third resistor is grounded; one end of the fourth resistor is connected with the OOK modulation driving module, and the other end of the fourth resistor is grounded.
The utility model discloses an among the concrete implementation mode, wireless optical communication has optical fiber communication and mobile communication's advantage as a neotype communication technology, can realize the broadband transmission, and the network deployment is nimble, need not to apply for the frequency, does not have electromagnetic interference moreover, and the security is fabulous.
In OOK systems, each bit is transmitted by pulsing the light source on or off for each bit interval. This is the most basic form of modulation and can be encoded simply by flashing the light source.
In order to further improve the interference resistance of the transmission channel, Pulse Position Modulation (PPM) is widely used for optical communication with the atmospheric channel. PPM modulation is a quadrature modulation scheme.
Compared with the OOK modulation scheme, the average power of PPM modulation is reduced, but the drawback is the increased pulse width requirement.
The utility model discloses mainly through OOK modulation and the mode that the PPM modulation combined together, strengthen digital optical communication's stability and interference killing feature.
The utility model discloses mainly adopt following technical scheme to realize the purpose:
a pulse optical fiber amplifier module with both OOK and PPM debugging modes comprises a power supply part, an OOK modulation semiconductor laser driving part, an FPGA logic part and a PPM modulation MOS driving part.
The power supply part adopts a DC-DC voltage reduction topology, the input voltage is 12V, the output voltage is 5V, the output voltage is adjusted through resistors R1 and R2, the corresponding calculation formula is VOUT is 0.765 (1+ R2/R1), therefore, the output voltage of 5V supplies power for the OOK modulation semiconductor laser driver, and then the voltage of 5V is reduced to 3.3V through a linear voltage stabilizer to supply power for the FPGA module.
The OOK modulation semiconductor laser part is mainly realized by a chip ADN2871, the purpose of using the chip is mainly to realize a high-speed traffic function, as is known, the current semiconductor discrete device cannot reach a pulse signal of GHz, and the main reason is that the junction capacitance is relatively too large, so that the rising edge time is too long, the high-speed signal of a terminal is seriously distorted, and the application of actual needs cannot be met, and the high-speed semiconductor laser driving chip can support the code rate of 50Mbps to 4.25Gbps, and the bit error rate is 0 under the condition that the output optical power is as low as-35 dBm.
Optimizing the error rate of actual signal transmission, mainly adjusting the sizes of bias current and modulation current to ensure that actual transmission data '0' and '1' have obvious limits, namely the actual eye diagram quality, when adjusting R3 and R4 to a proper value, the threshold of the eye diagram displayed by an oscilloscope is higher, the rising edge and the falling edge are highly overlapped, at the moment, the eye diagram quality can be adjusted to the most proper value, the size of output light is gradually reduced, when the output light can reach-35 dBm, the bit error rate bit can still reach 0, the scheme can realize long-distance optical transmission without error rate under an OOK mode, thereby protecting the high-speed transmission of information, being not interfered by the external environment, and only limiting the distance of the mode, when the optical power is lower than-35 dBm, although the error correction function is added in the demodulation process, the defect of the mode is still not enough to be changed.
The PPM modulation mainly outputs a high-frequency pulse signal through the FPGA, and the high-frequency pulse signal is modulated onto a pin of a semiconductor laser through a high-speed comparator and a driver, so that the discrete component has the advantages of simple structure, convenience in implementation and easiness in control, and brings the result that the output average power of the discrete component is reduced, and the opposite pulse power is increased, analysis shows that the compromise rate between the power and the frequency band utilization rate of the PPM is very good, and the PPM modulation mode recommended by the IEEE802.11 committee in 1995 in the infrared wireless communication with the rate of 0-10 MHz is used. The PPM of multiple pulses can be according to the combination or arrangement mode of multiple pulses, which represents their own ability to transmit information, and for the PPM of multiple pulses, various pulses have different characteristics, such as different level values or different pulse widths, which is more complex in realization and is therefore generally used rarely.
The utility model discloses a can freely switch OOK modulation and PPM modulation according to user's needs to greatly improve the application of this function, for example optical fiber communication between city and city, submarine optical cable communication, satellite communication and so on.
The DC-DC switched buck topology converts high voltage to low voltage to power the various modules. The output voltage is adjustable by adjusting R1 and R2.
XC6SLX4 is used as the core part of the circuit, OOK modulation signals and PPM modulation signals are generated accordingly, and the switching of the two modes mainly controls the existence of the OOK modulation signals through the enabling signals of the switch ADN2871, thereby realizing the function.
When carrying out the bit error rate test, firstly, attention is paid to the eye pattern effect detected by inputting an OOK modulated optical signal into a PIN tube, and the resistance values of R3 and R4 are required to be adjusted at this time, so that the bias current and the modulation current are modulated, the final eye pattern quality is guaranteed, the height is clear, the rising edge and the falling edge are steep enough, the eye pattern effect is the eye pattern effect after the debugging is completed in the graph 3, and the speed reaches 3G.
The PPM modulation driving part comprises a core component type high-speed comparator and an NMOS driving part, wherein the high-speed comparator buffers a PPM signal sent by the FPGA and provides the PPM signal for high-speed NMOS driving, and the NMOS driving requirement is that the junction capacitance is small and can be replaced by a high-speed NMOS.
The OOK modulation semiconductor laser part is mainly realized by a chip ADN2871, the purpose of using the chip is mainly to realize a high-speed traffic function, as is known, the current semiconductor discrete device can not reach a pulse signal of a GHz, the main reason is that the junction capacitance is relatively too large, so that the rising edge time is too long, the high-speed signal of a terminal is seriously distorted, and the application of actual needs can not be met, and the high-speed semiconductor laser driving chip can support the code rate of 50Mbps to 4.25Gbps, and the bit error rate is 0 under the condition that the output optical power is as low as-35 dBm.
PPM modulation mainly outputs high-frequency pulse signals through FPGA, and the high-frequency pulse signals are modulated onto pins of a semiconductor laser through a high-speed comparator and a driver, so that the discrete component has the advantages of simple structure, convenience in implementation and easiness in control, and brings the result that the output average power of the discrete component is reduced, and the pulse power is increased reversely
One of the simplest digital modulation schemes is an OOK mode, i.e., on-off keying. The modulation principle is that the transmitted frequency is controlled according to the transmission amplitude, for example, when the transmission amplitude is high, the frequency of a transmission carrier wave is transmitted, otherwise, when the transmission amplitude is low, the carrier wave frequency is not transmitted, so that the modulation has the greatest advantage of low power consumption and is mainly applied to mobile equipment powered by a battery.
In the PPM modulation mode, because the input data is input in serial and 4-bit data can be transmitted in one frame, the input data needs to be converted in serial and parallel, and the principle shows that when 4-bit data is transmitted, the number of gaps in one frame is 16, and because the design does not consider the guard time slot, the clock signal is the 4-frequency division of the time slot signal. The main method for generating the PPM signal is to count the time slot signal through a counter of the FPGA, when the data comes high, the time slot signal is marked as 1, otherwise, the time slot signal is 0, and in order to keep the time of the signal consistent, the counter is controlled to be cleared by a frame signal.
Adopted the utility model discloses a realize the pulse fiber amplifier system of OOK and PPM debugging mode, will strengthen digital optical communication's stability and interference killing feature through the mode that OOK modulation and PPM modulation combined together, can freely switch according to user's needs through modulating OOK and PPM to greatly improved the application field of this function, for example optical fiber communication between city and city, submarine optical cable communication, satellite communication and so on.
In this specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
Claims (5)
1. A pulse optical fiber amplifier system for realizing OOK and PPM debugging modes is characterized by comprising a power module, an FPGA logic module, an OOK modulation driving module and a PPM modulation driving module, wherein the power module is connected with the FPGA logic module, the OOK modulation driving module and the PPM modulation driving module, and the FPGA logic module is connected with the OOK modulation driving module and the PPM modulation driving module.
2. The pulse fiber amplifier system for realizing OOK and PPM debugging mode according to claim 1, wherein the PPM modulation driving module comprises a high speed comparator and an NMOS driving unit, the high speed comparator and the NMOS driving unit are connected in series, the high speed comparator is connected with the FPGA logic module, and the NMOS driving unit is connected with a power supply.
3. The pulse fiber amplifier system for realizing OOK and PPM debugging mode of claim 1, wherein said OOK modulation driving module comprises chip ADN 2871.
4. The pulse fiber amplifier system for realizing OOK and PPM debugging mode of claim 1, wherein said power module employs a DC-DC chip.
5. The system of claim 1, further comprising a first resistor, a second resistor, a third resistor and a fourth resistor, wherein one end of the first resistor is connected to the power module, and the other end of the first resistor is connected to ground; one end of the second resistor is connected with the first resistor, and the other end of the second resistor is connected with the OOK modulation driving module; one end of the third resistor is connected with the OOK modulation driving module, and the other end of the third resistor is grounded; one end of the fourth resistor is connected with the OOK modulation driving module, and the other end of the fourth resistor is grounded.
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