CN201303326Y - DC wire carrier wave communication device - Google Patents
DC wire carrier wave communication device Download PDFInfo
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- CN201303326Y CN201303326Y CNU2008201001321U CN200820100132U CN201303326Y CN 201303326 Y CN201303326 Y CN 201303326Y CN U2008201001321 U CNU2008201001321 U CN U2008201001321U CN 200820100132 U CN200820100132 U CN 200820100132U CN 201303326 Y CN201303326 Y CN 201303326Y
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Abstract
The utility model discloses a DC wire carrier wave communication device which is characterized in that the DC wire carrier wave communication device consists of a transmitter unit and a receiver unit; wherein the transmitter unit is provided with a modulator, a second modulator, a carrier wave generator, a data buffer, a push-pull driver and a low-pass filter; and the receiver unit is provided with an amplitude limiter, a band-pass filter, a frequency selective amplifier, an emitter follower, an envelope detector, a voltage comparator and a reference voltage source. The DC wire carrier wave communication device has the advantages of simple structure and low cost and can provide big DC current at amperes or tens of amperes to a load and can ensure the power supply quality of the current. The DC wire carrier wave communication device enhances the interference resisting ability of the communication device and increases the data transmission security.
Description
Technical field
The utility model belongs to wired network communication equipment, specifically, is specifically related to a kind of DC line carrier communication device.
Background technology
Tremendous development along with electronic technology and embedded system platform, situation by the same total processor collaborative work of a plurality of coprocessors in application system is more and more general, and in a large amount of application, the distance of coprocessor and total processor is far away, communication therebetween needs emphasis to consider when becoming system design problem.Adopt cable, optical fiber no doubt can access advantages of higher stability as communications carrier, yet can increase the complexity of system cost and hardware line.Under some special situation, restricted such as the wiring quantity between total processor and the coprocessor, set up the wire communication carrier of a special use and can not implement, have to adopt radio communication in this case.But the reliability of radio communication and anti-interference be well below wire communication, and cost also is much higher than wire communication, will introduce complicated geocoding algorithm when handling a plurality of slave unit at the same time, makes the reliability of system and exploitativeness descend greatly.
For this reason, having occurred based on supply line is the DC bus communication technology of communications carrier, is to communicate by the carrier modulation technology.Make full use of existing supply line resource, need not special-purpose communication line and just can communicate, avoided overlapping investment.The onewire communication technology as Dallas company.It realizes that principle is: reach the purpose of message transmission by the time slot of " 0 level " on the control DC line, the baseband signal of its communication is by modulation.
But the shortcoming of existing DC bus communication technology is: the baseband signal of its communication is not by modulation, the total power supply of DC is high internal resistance, can only provide maximum tens of milliamperes little direct currents to load equipment, and the time slot of " 0 level " carries out transfer of data on the control DC line, also influenced galvanic power supply quality, the antijamming capability of transfer of data is weak, confidentiality is poor.
The utility model content
The purpose of this utility model provides a kind of DC line carrier communication device, can modulate the baseband signal of communication, can provide the big direct current of number peace to tens of peaces to load, and can guarantee the power supply quality of electric current.
For achieving the above object, the utility model is explained a kind of DC line carrier communication device, it is characterized in that: form by transmitter unit and receiving element,
Wherein transmitter unit is provided with modulator, the carrier signal that the first input end reception carrier generator of this modulator sends, second input of described modulator is connected on the output of data buffer, the output output modulation signal of described modulator is given push-pull driver, the modulation signal that the output output of this push-pull driver is amplified is given low pass filter, and the output dateout of this low pass filter is to direct current DC line;
Wherein receiving element is provided with amplitude limiter, the input of this amplitude limiter receives the data on the described DC line, the output of amplitude limiter outputs signal to band pass filter, signal is given frequency selective amplifier after the output output filtering of this band pass filter, the output output amplifying signal of this frequency selective amplifier is given emitter follower, the output of this emitter follower outputs signal to envelope detector, the output output digital baseband signal of this envelope detector is given the reverse input end of voltage comparator, the positive input of this voltage comparator receives the reference voltage of reference voltage source output, the output output digital signal of this voltage comparator.
Transmitter unit carries out modulation and demodulation to the baseband signal of communicating by letter respectively with receiving element, can provide the big direct current of number peace to load to tens of peaces, and guaranteed to have strengthened the power supply quality of electric current a little less than the interference performance of communicator, also strengthened the confidentiality of transfer of data.
Described carrier generator is by NAND gate, crystal oscillator, 14,15 electric capacity and 13,14 resistance constitute, ground connection behind described 14 electric capacity of the first end string of wherein said crystal oscillator, behind described 13 resistance of this first end string, be connected with the output of described NAND gate again, ground connection behind described 15 electric capacity of the second end string of described crystal oscillator, behind described 14 resistance of this second end string, be connected with the output of described NAND gate again, this second end also is connected with two inputs of described NAND gate,, the output outgoing carrier signal of this NAND gate is given described modulator;
Carrier generator: be created in the carrier signal of transmitting on the DC circuit.
Described data buffer is a NAND gate, and two inputs of this NAND gate connect together and receive the digital signal of extraneous input, and the output of this NAND gate outputs signal to described modulator;
Data buffer: receive the digital signal of outer signals source input, and the digital signal of buffering input, prevent that generation is disturbed to fore line signal source.
Described modulator comprises NAND gate, behind output string 12 resistance of this NAND gate, connects described push-pull driver again.
Modulator: produce the ASK modulating wave.
Described push-pull driver is made up of the 3rd, the 4th triode, the base stage of described the 3rd, the 4th triode connects together and accepts described modulation signal, wherein the collector electrode of the 3rd triode connects low-voltage DC level, the emitter of the 3rd triode connects described low pass filter, the emitter of the 3rd triode also connects the collector electrode of described the 4th triode, the grounded emitter of the 4th triode.
Push-pull driver: amplified current, arrive the DC bus to drive the ASK carrier signal of having modulated.
Described low pass filter is made up of the 4th inductance and 11,12,13 electric capacity, one end of wherein said 12 electric capacity connects described push-pull driver, the other end of 12 electric capacity connects the front end of described the 4th inductance, ground connection behind described 13 electric capacity of the front end string of the 4th inductance, described 11 electric capacity (C11) backs ground connection is gone here and there in the rear end of the 4th inductance, and the rear end dateout of the 4th inductance is to direct current DC line.
Low pass filter: modulated signal is carried out filtering, and the unwanted higher harmonic components of filtering is to reduce the interference to surrounding devices and DC bus.
Described amplitude limiter is made of first electric capacity, first resistance, first diode and second diode, wherein the front end of first electric capacity receives the data on the direct current DC line, the positive pole of described first diode of back termination of this first electric capacity, the minus earth of this first diode, the negative pole of described second diode of back termination of this first electric capacity, the plus earth of this second diode, the rear end of this first electric capacity also outputs signal to described band pass filter.
Amplitude limiter: the amplitude of restriction DC bus-in singal, protect follow-up frequency selective amplifier can not transship.
Described band pass filter is made up of first inductance, second inductance (L2), second electric capacity (C2) and the 3rd electric capacity (C3), wherein the front end of first inductance connects the output of described amplitude limiter, described second electric capacity (C2) back ground connection is gone here and there in the rear end of this first inductance, described second inductance (L2) back ground connection is gone here and there in the rear end of this first inductance, the rear end of this first inductance also connects the front end of described the 3rd electric capacity (C3), and the rear end of the 3rd electric capacity (C3) connects described frequency selective amplifier.
Band pass filter: the modulated signal on the DC bus is carried out filtering,, select useful modulated signal, improve signal to noise ratio and antijamming capability to isolate useless interference signal.
Described frequency selective amplifier is by second resistance, the 3rd resistance, the 5th electric capacity, the 6th electric capacity, first triode and the 3rd inductance constitute, wherein the base stage of first triode connects described band pass filter, this base stage also is connected with low-voltage DC level through described second resistance, the emitter of first triode is through described the 3rd grounding through resistance, this emitter is also gone here and there behind described the 6th electric capacity, be connected with ground, the collector electrode of this first triode is connected with low-voltage DC level through described the 3rd inductance, this collector electrode is also gone here and there behind described the 5th electric capacity, be connected with low-voltage DC level, this collector electrode connects described emitter follower.
Frequency selective amplifier: modulated signal is amplified, so that the processing of follow-up envelope detector.
Described emitter follower is by the 5th electric capacity, the 4th electric capacity, the 7th electric capacity, the 4th resistance, the 5th resistance and second triode are formed, wherein the front end of the 4th electric capacity connects described frequency selective amplifier, go here and there behind described the 4th resistance rear end of the 4th electric capacity, be connected with low-voltage DC level, the rear end of the 4th electric capacity also connects the base stage of described second triode, the collector electrode of this second triode is connected with low-voltage DC level, behind described the 5th resistance of emitter string, be connected with ground, this emitter also connects the front end of described the 7th electric capacity, and the rear end of the 7th electric capacity is connected with described envelope detector.
Emitter follower: cushion amplifying signal, avoid preamplifying circuit produce is disturbed the driving force that improves simultaneously the back level.
Described envelope detector is made of the 6th resistance, the 7th resistance, the 8th electric capacity and the 3rd diode, wherein the positive pole of the 3rd diode connects described emitter follower, this positive pole is gone here and there described the 6th resistance and is connected with ground, the negative pole of the 3rd diode is connected with ground through described the 7th resistance, this negative pole also connects an end of described the 8th electric capacity, the other end ground connection of the 8th electric capacity, the negative pole of described the 3rd diode connects the reverse input end of described voltage comparator;
Envelope detector: modulated ASK signal is carried out envelope detection, demodulate digital baseband signal.
Described reference voltage source is made of the 8th resistance, the 4th diode, the 9th electric capacity, wherein an end of the 8th resistance is connected with low-voltage DC level, the other end is connected with the positive pole of described the 4th diode, the minus earth of the 4th diode, be connected in series described the 9th electric capacity between the positive pole of the 4th diode and the ground, the positive pole of this 4th diode also connects the positive input of described voltage comparator.
Reference voltage source: provide comparison reference voltage to voltage comparator.
Described voltage comparator is made of 11 resistance, the tenth electric capacity and comparator, wherein the positive input of comparator connects described reference voltage source, the reverse input end of comparator connects described envelope detector, be connected described the tenth electric capacity between the positive input of comparator and the reverse input end, behind described 11 resistance of the output string of this comparator, be connected the output output digital signal of this comparator with low-voltage DC level.
Voltage comparator: the digital baseband signal that demodulates is carried out shaping, can improve the antijamming capability of circuit simultaneously by the threshold values that reference voltage source is set.
Remarkable result of the present utility model is: a kind of DC line carrier communication device simple in structure, with low cost is provided, can provide the big direct current of number peace to load to tens of peaces, and guaranteed the power supply quality of electric current, strengthened a little less than the interference performance of communicator, also strengthened the confidentiality of transfer of data.
Description of drawings
Fig. 1 is a functional block diagram of the present utility model;
Fig. 2 is circuit theory diagrams of the present utility model.
Embodiment
Below in conjunction with the drawings and specific embodiments the utility model is described in further detail.
As shown in Figure 1: a kind of DC line carrier communication device, form by transmitter unit and receiving element,
Wherein transmitter unit is provided with modulator 3, the carrier signal that the first input end reception carrier generator 1 of this modulator 3 sends, second input of described modulator 3 is connected on the output of data buffer 2, the output output modulation signal of described modulator 3 is given push-pull driver 4, the modulation signal that the output output of this push-pull driver 4 is amplified is given low pass filter 5, and the output dateout of this low pass filter 5 is to direct current DC line;
Wherein receiving element is provided with amplitude limiter 6, the input of this amplitude limiter 6 receives the data on the described DC line, the output of amplitude limiter 6 outputs signal to band pass filter 7, signal is given frequency selective amplifier 8 after the output output filtering of this band pass filter 7, the output output amplifying signal of this frequency selective amplifier 8 is given emitter follower 9, the output of this emitter follower 9 outputs signal to envelope detector 10, the output output digital baseband signal of this envelope detector 10 is given the reverse input end of voltage comparator 11, the positive input of this voltage comparator 11 receives the reference voltage of reference voltage source 12 outputs, the output output digital signal of this voltage comparator 11.
Described carrier generator 1 is by NAND gate U2C, crystal oscillator X1,14,15 capacitor C 14, C15 and 13,14 resistance R 13, R14 constitutes, described 14 capacitor C of the first end string of wherein said crystal oscillator X1 14 back ground connection, after described 13 resistance R 13 of this first end string, be connected with the output of described NAND gate U2C again, described 15 capacitor C of the second end string of described crystal oscillator X1 15 back ground connection, after described 14 resistance R 14 of this second end string, be connected with the output of described NAND gate U2C again, this second end also is connected with two inputs of described NAND gate U2C,, the output outgoing carrier signal of this NAND gate U2C is given described modulator 3;
Described data buffer 2 is NAND gate U2B, and two inputs of this NAND gate U2B connect together and receive the digital signal of extraneous input, and the output of this NAND gate U2B outputs signal to described modulator 3;
Described modulator 3 comprises NAND gate U2A, after output string 12 resistance R 12 of this NAND gate U2A, connects described push-pull driver 4 again.
Described push-pull driver 4 is made up of the 3rd, the 4th triode Q3, Q4, the base stage of described the 3rd, the 4th triode Q3, Q4 connects together and accepts described modulation signal, wherein the collector electrode of the 3rd triode Q3 connects low-voltage DC level, the emitter of the 3rd triode Q3 connects described low pass filter 5, the emitter of the 3rd triode Q3 also connects the collector electrode of described the 4th triode Q4, the grounded emitter of the 4th triode Q4.
Described low pass filter 5 is made up of the 4th inductance L 4 and 11,12,13 capacitor C 11, C12, C13, one end of wherein said 12 capacitor C 12 connects described push-pull driver 4, the other end of 12 capacitor C 12 connects the front end of described the 4th inductance L 4, described 13 capacitor C of the front end string of the 4th inductance L 4 13 back ground connection, described 11 capacitor C 11 back ground connection are gone here and there in the rear end of the 4th inductance L 4, and the rear end dateout of the 4th inductance L 4 is to direct current DC line.
Described amplitude limiter 6 is made of first capacitor C 1, first resistance R 1, the first diode D1 and the second diode D2, wherein the front end of first capacitor C 1 receives the data on the direct current DC line, the positive pole of the described first diode D1 of back termination of this first capacitor C 1, the minus earth of this first diode D1, the negative pole of the described second diode D2 of back termination of this first capacitor C 1, the plus earth of this second diode D2, the rear end of this first capacitor C 1 also outputs signal to described band pass filter 7.
Described band pass filter 7 is made up of first inductance L 1, second inductance L 2, second capacitor C 2 and the 3rd capacitor C 3, wherein the front end of first inductance L 1 connects the output of described amplitude limiter 6, described second capacitor C 2 back ground connection are gone here and there in the rear end of this first inductance L 1, described second inductance L 2 back ground connection are gone here and there in the rear end of this first inductance L 1, the rear end of this first inductance L 1 also connects the front end of described the 3rd capacitor C 3, and the rear end of the 3rd capacitor C 3 connects described frequency selective amplifier 8.
Described frequency selective amplifier 8 is by second resistance R 2, the 3rd resistance R 3, the 5th capacitor C 5, the 6th capacitor C 6, the first triode Q1 and the 3rd inductance L 3 constitute, wherein the base stage of the first triode Q1 connects described band pass filter 7, this base stage also is connected with low-voltage DC level through described second resistance R 2, the emitter of the first triode Q1 is through described the 3rd resistance R 3 ground connection, this emitter is also gone here and there after described the 6th capacitor C 6, be connected with ground, the collector electrode of this first triode Q1 is connected with low-voltage DC level through described the 3rd inductance L 3, this collector electrode is also gone here and there after described the 5th capacitor C 5, be connected with low-voltage DC level, this collector electrode connects described emitter follower 9.
Described emitter follower 9 is by the 5th capacitor C 5, the 4th capacitor C 4, the 7th capacitor C 7, the 4th resistance R 4, the 5th resistance R 5 and the second triode Q2 form, wherein the front end of the 4th capacitor C 4 connects described frequency selective amplifier 8, go here and there after described the 4th resistance R 4 rear end of the 4th capacitor C 4, be connected with low-voltage DC level, the rear end of the 4th capacitor C 4 also connects the base stage of the described second triode Q2, the collector electrode of this second triode Q2 is connected with low-voltage DC level, after described the 5th resistance R 5 of emitter string, be connected with ground, this emitter also connects the front end of described the 7th capacitor C 7, and the rear end of the 7th capacitor C 7 is connected with described envelope detector 10.
Described envelope detector 10 is made of the 6th resistance R 6, the 7th resistance R 7, the 8th capacitor C 8 and the 3rd diode D3, wherein the positive pole of the 3rd diode D3 connects described emitter follower 9, this positive pole is gone here and there described the 6th resistance R 6 and is connected with ground, the negative pole of the 3rd diode D3 is connected with ground through described the 7th resistance R 7, this negative pole also connects an end of described the 8th capacitor C 8, the other end ground connection of the 8th capacitor C 8, the negative pole of described the 3rd diode D3 connects the reverse input end of described voltage comparator 11;
Described reference voltage source 12 is made of the 8th resistance R 8, the 4th diode D4, the 9th capacitor C 9, wherein an end of the 8th resistance R 8 is connected with low-voltage DC level, the other end is connected with the positive pole of described the 4th diode D4, the minus earth of the 4th diode D4, be connected in series described the 9th capacitor C 9 between the positive pole of the 4th diode D4 and the ground, the positive pole of this 4th diode D4 also connects the positive input of described voltage comparator 11.
Described voltage comparator 11 is made of 11 resistance R 11, the tenth capacitor C 10 and comparator U1, wherein the positive input of comparator U1 connects described reference voltage source 12, the reverse input end of comparator U1 connects described envelope detector 10, be connected described the tenth capacitor C 10 between the positive input of comparator U1 and the reverse input end, after described 11 resistance R 11 of the output string of this comparator U1, be connected the output output digital signal of this comparator U1 with low-voltage DC level.
Its operation principle is:
Transmitter unit:
Carrier generator 1: be created in the carrier signal of transmitting on the DC circuit.
Data buffer 2: receive the digital signal of outer signals source input, and the digital signal of buffering input, prevent that generation is disturbed to fore line signal source.
Modulator 3: produce the ASK modulating wave.
Push-pull driver 4: amplified current, arrive the DC bus to drive the ASK carrier signal of having modulated.
Low pass filter 5: modulated signal is carried out filtering, and the unwanted higher harmonic components of filtering is to reduce the interference to surrounding devices and DC bus.
Receiving element:
Amplitude limiter 6: the amplitude of restriction DC bus-in singal, protect follow-up frequency selective amplifier can not transship.
Band pass filter 7: the modulated signal on the DC bus is carried out filtering,, select useful modulated signal, improve signal to noise ratio and antijamming capability to isolate useless interference signal.
Frequency selective amplifier 8: modulated signal is amplified, so that the processing of follow-up envelope detector 10.
Emitter follower 9: cushion amplifying signal, avoid preamplifying circuit produce is disturbed the driving force that improves simultaneously the back level.
Envelope detector 10: modulated ASK signal is carried out envelope detection, demodulate digital baseband signal.
Reference voltage source 12: provide comparison reference voltage to voltage comparator.
Voltage comparator 11: the digital baseband signal that demodulates is carried out shaping, can improve the antijamming capability of circuit simultaneously by the threshold values that reference voltage source is set.
Claims (10)
1, a kind of DC line carrier communication device is characterized in that: forms by transmitter unit and receiving element,
Wherein transmitter unit is provided with modulator (3), the carrier signal that the first input end reception carrier generator (1) of this modulator (3) sends, second input of described modulator (3) is connected on the output of data buffer (2), the output output modulation signal of described modulator (3) is given push-pull driver (4), the modulation signal that the output output of this push-pull driver (4) is amplified is given low pass filter (5), and the output dateout of this low pass filter (5) is to direct current DC line;
Wherein receiving element is provided with amplitude limiter (6), the input of this amplitude limiter (6) receives the data on the described DC line, the output of amplitude limiter (6) outputs signal to band pass filter (7), signal is given frequency selective amplifier (8) after the output output filtering of this band pass filter (7), the output output amplifying signal of this frequency selective amplifier (8) is given emitter follower (9), the output of this emitter follower (9) outputs signal to envelope detector (10), the output output digital baseband signal of this envelope detector (10) is given the reverse input end of voltage comparator (11), the positive input of this voltage comparator (11) receives the reference voltage of reference voltage source (12) output, the output output digital signal of this voltage comparator (11).
2, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described carrier generator (1) is by NAND gate (U2C), crystal oscillator (X1), 14,15 electric capacity (C14, C15) and 13,14 resistance (R13, R14) constitute, described 14 electric capacity of the first end string (C14) the back ground connection of wherein said crystal oscillator (X1), behind these described 13 resistance of first end string (R13), output with described NAND gate (U2C) is connected again, described 15 electric capacity of the second end string (C15) the back ground connection of described crystal oscillator (X1), behind these described 14 resistance of second end string (R14), output with described NAND gate (U2C) is connected again, this second end also is connected with two inputs of described NAND gate (U2C),, the output outgoing carrier signal of this NAND gate (U2C) is given described modulator (3);
Described data buffer (2) is NAND gate (U2B), and two inputs of this NAND gate (U2B) connect together and receive the digital signal of extraneous input, and the output of this NAND gate (U2B) outputs signal to described modulator (3);
Described modulator (3) comprises NAND gate (U2A), behind output string 12 resistance (R12) of this NAND gate (U2A), connects described push-pull driver (4) again.
3, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described push-pull driver (4) is made up of the 3rd, the 4th triode (Q3, Q4), the base stage of described the 3rd, the 4th triode (Q3, Q4) connects together and accepts described modulation signal, wherein the collector electrode of the 3rd triode (Q3) connects low-voltage DC level, the emitter of the 3rd triode (Q3) connects described low pass filter (5), the emitter of the 3rd triode (Q3) also connects the collector electrode of described the 4th triode (Q4), the grounded emitter of the 4th triode (Q4).
4, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described low pass filter (5) is by the 4th inductance (L4) and 11,12,13 electric capacity (C11, C12, C13) form, one end of wherein said 12 electric capacity (C12) connects described push-pull driver (4), the other end of 12 electric capacity (C12) connects the front end of described the 4th inductance (L4), described 13 electric capacity of the front end string of the 4th inductance (L4) (C13) back ground connection, described 11 electric capacity (C11) backs ground connection is gone here and there in the rear end of the 4th inductance (L4), and the rear end dateout of the 4th inductance (L4) is to direct current DC line.
5, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described amplitude limiter (6) is by first electric capacity (C1), first resistance (R1), first diode (D1), constitute with second diode (D2), wherein the front end of first electric capacity (C1) receives the data on the direct current DC line, the positive pole of described first diode of the back termination of this first electric capacity (C1) (D1), the minus earth of this first diode (D1), the negative pole of described second diode of the back termination of this first electric capacity (C1) (D2), the plus earth of this second diode (D2), the rear end of this first electric capacity (C1) also outputs signal to described band pass filter (7).
6, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described band pass filter (7) is by first inductance (L1), second inductance (L2), second electric capacity (C2) and the 3rd electric capacity (C3) are formed, wherein the front end of first inductance (L1) connects the output of described amplitude limiter (6), described second electric capacity (C2) back ground connection is gone here and there in the rear end of this first inductance (L1), described second inductance (L2) back ground connection is gone here and there in the rear end of this first inductance (L1), the rear end of this first inductance (L1) also connects the front end of described the 3rd electric capacity (C3), and the rear end of the 3rd electric capacity (C3) connects described frequency selective amplifier (8).
7, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described frequency selective amplifier (8) is by second resistance (R2), the 3rd resistance (R3), the 5th electric capacity (C5), the 6th electric capacity (C6), first triode (Q1) and the 3rd inductance (L3) constitute, wherein the base stage of first triode (Q1) connects described band pass filter (7), this base stage also is connected with low-voltage DC level through described second resistance (R2), the emitter of first triode (Q1) is through described the 3rd resistance (R3) ground connection, this emitter is also gone here and there behind described the 6th electric capacity (C6), be connected with ground, the collector electrode of this first triode (Q1) is connected with low-voltage DC level through described the 3rd inductance (L3), this collector electrode is also gone here and there behind described the 5th electric capacity (C5), be connected with low-voltage DC level, this collector electrode connects described emitter follower (9).
8, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described emitter follower (9) is by the 5th electric capacity (C5), the 4th electric capacity (C4), the 7th electric capacity (C7), the 4th resistance (R4), the 5th resistance (R5) and second triode (Q2) are formed, wherein the front end of the 4th electric capacity (C4) connects described frequency selective amplifier (8), go here and there behind described the 4th resistance (R4) rear end of the 4th electric capacity (C4), be connected with low-voltage DC level, the rear end of the 4th electric capacity (C4) also connects the base stage of described second triode (Q2), the collector electrode of this second triode (Q2) is connected with low-voltage DC level, behind described the 5th resistance of emitter string (R5), be connected with ground, this emitter also connects the front end of described the 7th electric capacity (C7), and the rear end of the 7th electric capacity (C7) is connected with described envelope detector (10).
9, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described envelope detector (10) is by the 6th resistance (R6), the 7th resistance (R7), the 8th electric capacity (C8) and the 3rd diode (D3) constitute, wherein the positive pole of the 3rd diode (D3) connects described emitter follower (9), this positive pole is gone here and there described the 6th resistance (R6) and is connected with ground, the negative pole of the 3rd diode (D3) is connected with ground through described the 7th resistance (R7), this negative pole also connects an end of described the 8th electric capacity (C8), the other end ground connection of the 8th electric capacity (C8), the negative pole of described the 3rd diode (D3) connects the reverse input end of described voltage comparator (11);
Described reference voltage source (12) is made of the 8th resistance (R8), the 4th diode (D4), the 9th electric capacity (C9), wherein an end of the 8th resistance (R8) is connected with low-voltage DC level, the other end is connected with the positive pole of described the 4th diode (D4), the minus earth of the 4th diode (D4), be connected in series described the 9th electric capacity (C9) between the positive pole of the 4th diode (D4) and the ground, the positive pole of this 4th diode (D4) also connects the positive input of described voltage comparator (11).
10, according to the described DC line carrier communication of claim 1 device, it is characterized in that: described voltage comparator (11) is by 11 resistance (R11), the tenth electric capacity (C10) and comparator (U1) constitute, wherein the positive input of comparator (U1) connects described reference voltage source (12), the reverse input end of comparator (U1) connects described envelope detector (10), be connected described the tenth electric capacity (C10) between the positive input of comparator (U1) and the reverse input end, behind described 11 resistance of the output string of this comparator (U1) (R11), be connected the output output digital signal of this comparator (U1) with low-voltage DC level.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201001321U CN201303326Y (en) | 2008-09-26 | 2008-09-26 | DC wire carrier wave communication device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201001321U CN201303326Y (en) | 2008-09-26 | 2008-09-26 | DC wire carrier wave communication device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101359933B (en) * | 2008-09-25 | 2012-07-04 | 蒋富强 | Dc line carrier communication device |
| CN108983667A (en) * | 2018-08-01 | 2018-12-11 | 惠州市德赛西威汽车电子股份有限公司 | Realize the method and its level shifting circuit of peripheral hardware and vehicle module one-way communication |
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2008
- 2008-09-26 CN CNU2008201001321U patent/CN201303326Y/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101359933B (en) * | 2008-09-25 | 2012-07-04 | 蒋富强 | Dc line carrier communication device |
| CN108983667A (en) * | 2018-08-01 | 2018-12-11 | 惠州市德赛西威汽车电子股份有限公司 | Realize the method and its level shifting circuit of peripheral hardware and vehicle module one-way communication |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20090902 Effective date of abandoning: 20080926 |