CN212485324U

CN212485324U - SiC MOSFET module ceramic copper-clad plate structure

Info

Publication number: CN212485324U
Application number: CN202021151093.5U
Authority: CN
Inventors: 谌容
Original assignee: Sunnychip Semiconductor Co
Current assignee: Sunnychip Semiconductor Co
Priority date: 2020-06-19
Filing date: 2020-06-19
Publication date: 2021-02-05
Anticipated expiration: 2030-06-19

Abstract

The utility model discloses a SiC MOSFET module ceramic copper-clad plate structure, including bottom plate, upper bridge arm, lower bridge arm, connecting bridge, aluminium wire, the vertical cross in bottom plate middle part evenly is equipped with a plurality of welding areas, upper bridge arm includes the first copper-clad ceramic base plate, the third copper-clad ceramic base plate that the homonymy was established and locates the sixth copper-clad ceramic base plate and the signal end of bottom plate edge middle and upper portion and expose, lower bridge arm includes the second copper-clad ceramic base plate, the fourth copper-clad ceramic base plate and the fifth copper-clad ceramic base plate and the signal end of locating bottom plate edge middle and lower portion and expose that locate the opposite side, first copper-clad ceramic base plate, the second copper-clad ceramic base plate, the third copper-clad ceramic base plate and the fourth copper-clad ceramic base; and each copper-clad ceramic substrate is provided with a chip welding area and a plurality of grid resistors. The utility model relates to a realize high-power module, the structure symmetry triggers the route unanimously, reduces and vibrates and customer end fault rate, realizes flow equalizing and dispels the heat well.

Description

SiC MOSFET module ceramic copper-clad plate structure

Technical Field

The utility model relates to a semiconductor power device encapsulates technical field, concretely relates to SiC MOSFET module pottery copper clad laminate structure.

Background

The silicon carbide material, namely SiC, has the characteristics of large forbidden band width, high thermal conductivity, high critical avalanche breakdown electric field intensity, large saturated carrier drift velocity, good thermal stability and the like, and is an ideal material for manufacturing power semiconductor devices. Compared with the silicon device of the same grade, the SiC high-voltage device has lower on-state voltage drop, higher working frequency, lower power consumption, smaller volume and better thermal property, and is more suitable for being applied to power electronic circuits.

The SiC Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is taken as a SiC power device with the most market application potential, and has the advantages of high voltage resistance and high frequency. In order to sufficiently realize the high-frequency characteristics of the SiC device, it is important to reduce the stray inductance and stray capacitance inside the module itself in the package layout.

In the prior art, the signal ends of the upper and lower bridge arms of the traditional half-bridge module structure are distributed on the same side of the module, the trigger path of the lower bridge arm is inevitably longer than that of the upper bridge arm, and oscillation is very easy to cause in high-frequency application, so that the traditional half-bridge module packaging structure cannot meet the high-frequency requirement of the SiC device.

Disclosure of Invention

In order to solve the problem, the utility model aims at providing a SiC MOSFET module pottery covers copper plate structure adds symmetrical structure, reduces and vibrates, realizes flow equalizing and then improves the radiating effect of whole module through series connection grid resistance.

The utility model adopts the technical proposal that:

a SiC MOSFET module ceramic copper-clad plate structure comprises a bottom plate, an upper bridge arm, a lower bridge arm, a connecting bridge and an aluminum wire, wherein a plurality of welding areas are vertically and uniformly arranged in a crossed manner in the middle of the bottom plate, the upper bridge arm comprises a first copper-clad ceramic substrate, a third copper-clad ceramic substrate and a sixth copper-clad ceramic substrate arranged in the middle upper part of the edge of the bottom plate, which are arranged on the same side, and signal ends are exposed, the lower bridge arm comprises a second copper-clad ceramic substrate, a fourth copper-clad ceramic substrate and a fifth copper-clad ceramic substrate arranged in the middle lower part of the edge of the bottom plate, which are arranged on the other side, and the signal ends are exposed, so that the driving plate can be conveniently connected, and the first copper-clad ceramic substrate; each copper-clad ceramic substrate is provided with a chip welding area and a plurality of grid resistors, the chip welding area is connected with a SiC MOSFET chip and a SiC SBD chip in series through aluminum wires, and the grid of the SiC MOSFET chip is connected with the signal end of the copper-clad ceramic substrate in the welding area after being connected with the grid resistors in series.

Preferentially, the SiC MOSFET chips and the SiC SBD chips in the welding areas of the first copper-clad ceramic substrate and the third copper-clad ceramic substrate are respectively connected in parallel correspondingly, the SiC MOSFET chips and the SiC SBD chips in the welding areas of the second copper-clad ceramic substrate and the fourth copper-clad ceramic substrate are respectively connected in parallel correspondingly, the area of a single chip of the SiC MOSFET chip is small, the flowing current specification is small, and the chips are connected in parallel to form a high-power module device and realize flow equalization conveniently.

Preferably, the upper bridge arm and the lower bridge arm are arranged on the bottom plate in an axial symmetry manner, so that the signal end wiring paths of the sixth copper-clad ceramic substrate and the fifth copper-clad ceramic substrate are the same, the triggering paths of the upper bridge arm and the lower bridge arm are the same, and the oscillation caused by stray inductance and stray capacitance in high-frequency application is reduced.

Preferably, the first copper-clad ceramic substrate and the second copper-clad ceramic substrate, and the third copper-clad ceramic substrate and the fourth copper-clad ceramic substrate are fixedly connected through a bridge.

Preferably, the chip welding area is provided with a solder mask frame, and the plurality of solder mask frames are respectively arranged in axial symmetry with the horizontal axis and the vertical axis, so that the SiC MOSFET chip and the SiC SBD chip can be conveniently placed.

Preferentially, the connecting bridge is made of copper, so that the heat conductivity is good, and the heat dissipation efficiency is improved.

Preferably, the SiC MOSFET chip and the SiC SBD chip are disposed on the chip bonding pad by soldering.

The utility model has the advantages that:

1. the upper bridge arm and the lower bridge arm are symmetrically arranged and have the same wiring path, so that the trigger paths of the upper bridge arm and the lower bridge arm are consistent, the vibration caused by stray inductance and capacitance is reduced, and the fault rate of a client is reduced;

2. the SiC MOSFET chips are connected in parallel to form a high-power module device, the grid electrodes of the SiC MOSFET chips are connected in series with a grid electrode resistor, compared with the grid electrode resistor, the line resistance generated by the path from the grid electrode on the chip to the signal end of the copper-coated ceramic substrate is small and negligible, and because the voltages of the SiC MOSFET chips connected in parallel are the same, the grid electrode resistors connected in series can achieve dynamic current sharing and static current sharing, so that the reliability of the module is improved, and the phenomenon that a certain chip is seriously heated due to the large current flowing through the chip when the current is not;

3. the first copper-clad ceramic substrate, the second copper-clad ceramic substrate, the third copper-clad ceramic substrate and the fourth copper-clad ceramic substrate are symmetrically distributed on the bottom plate in a field shape, and the heat dissipation effect of the whole module is improved.

Drawings

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the invention and not to limit the invention. In the drawings:

fig. 1 is a schematic diagram of a half-bridge module topology of the present invention;

FIG. 2 is a schematic view of the welding region connection of the present invention;

fig. 3 is the distribution and connection schematic diagram of the ceramic copper-clad plate of the utility model.

Labeled as: 1. the printed circuit board comprises a base plate, 11 welding areas, 2 upper bridge arms, 21 first copper-clad ceramic substrates, 22 third copper-clad ceramic substrates, 23 sixth copper-clad ceramic substrates, 3 lower bridge arms, 31 second copper-clad ceramic substrates, 32 fourth copper-clad ceramic substrates, 33 fifth copper-clad ceramic substrates, 4 connecting bridges, 5 aluminum wires, 6 chip welding areas, 61.SiC MOSFET chips, 62 SiC SBD chips, 63 solder mask frames and 7 grid resistors.

Detailed Description

As shown in FIGS. 1-3, a SiC MOSFET module ceramic copper clad laminate structure comprises a bottom plate 1, an upper bridge arm 2, a lower bridge arm 3, a connecting bridge 4 and an aluminum wire 5, wherein a plurality of welding areas 11 are vertically and uniformly arranged in the middle of the bottom plate 1 in a crossed manner, the upper bridge arm 2 comprises a first copper clad ceramic substrate 21, a third copper clad ceramic substrate 22 and a sixth copper clad ceramic substrate 23 arranged at the middle upper part of the edge of the bottom plate 1, which are arranged at the same side, and signal ends are exposed, the lower bridge arm 3 comprises a second copper clad ceramic substrate 31, a fourth copper clad ceramic substrate 32 and a fifth copper clad ceramic substrate 33 arranged at the middle lower part of the edge of the bottom plate 1, which are arranged at the other side, and signal ends are exposed, so as to be convenient for connecting a driving plate, the upper bridge arm 2 and the lower bridge arm 3 are axially symmetrically arranged on the bottom plate 1, so that the signal end wiring paths of the sixth, the oscillation caused by stray inductance and stray capacitance in high-frequency application is reduced; the first copper-clad ceramic substrate 21, the second copper-clad ceramic substrate 31, the third copper-clad ceramic substrate 22 and the fourth copper-clad ceramic substrate 32 are uniformly arranged on the welding area 11 in a grid shape, and the first copper-clad ceramic substrate 21, the second copper-clad ceramic substrate 31, the third copper-clad ceramic substrate 22 and the fourth copper-clad ceramic substrate 32 are fixedly connected through the copper connecting bridge 4, so that the heat conductivity is good, and the heat dissipation efficiency is improved;

as shown in fig. 2 to 3, each copper-clad ceramic substrate is provided with a chip pad 6 and a plurality of gate resistors 7, the chip pad 6 is connected in series with a SiC MOSFET chip 61 and a SiC SBD chip 62 through an aluminum wire 5, and the SiC MOSFET chip 61 and the SiC SBD chip 62 are disposed on the chip pad 6 by welding. The grid of the SiC MOSFET chip 61 is connected with a 5-ohm grid resistor 7 in series and then is connected with the signal end of the copper-clad ceramic substrate in the welding area 11, the SiC MOSFET chips 61 and the SiC SBD chips 62 in the welding area 11 in which the first copper-clad ceramic substrate 21 and the third copper-clad ceramic substrate 22 are respectively and correspondingly connected in parallel, the SiC MOSFET chips 61 and the SiC SBD chips 62 in the welding area 11 in which the second copper-clad ceramic substrate 31 and the fourth copper-clad ceramic substrate 32 are respectively and correspondingly connected in parallel, the area of a single chip of the SiC MOSFET chip 61 is small, the specification of flowing current is small, and the high-power module device can be conveniently formed after the chips are connected in parallel; because the positions of the parallel chips are different, the paths on the signal ends of the SiC MOSFET chip 61 and the corresponding copper-clad ceramic substrate are different, the line resistance generated by the paths is only in the milliohm level but still different, the micro line resistance generated by the paths can be ignored after the 5-ohm grid resistor 7 is connected in series, and when the parallel chips are connected, the voltage of each SiC MOSFET chip 61 is the same, and the series resistance is the same, so that the static current equalization and the dynamic current equalization can be realized by the plurality of SiC MOSFET chips 61 in different working states, the heat dissipation nonuniformity is avoided, the solder mask frame 63 is arranged on the chip welding area 6, and the solder mask frames 63 are respectively arranged in axial symmetry with the horizontal axis and the vertical axis, thereby facilitating the placing operation of the SiC MOSFET chips 61 and the SiC.

The utility model has the advantages that: the design realizes high-power modules, the structure is symmetrical, the trigger paths are consistent, the vibration and client fault rate are reduced, the current equalization is realized, and the heat dissipation is good.

Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. The utility model provides a SiC MOSFET module pottery copper clad laminate structure, includes bottom plate, goes up bridge arm, lower bridge arm, connecting bridge, aluminium wire, and the bottom plate middle part is perpendicular alternately evenly to be equipped with a plurality of welding area, its characterized in that: the upper bridge arm comprises a first copper-clad ceramic substrate, a third copper-clad ceramic substrate and a sixth copper-clad ceramic substrate which are arranged on the middle upper part of the edge of the bottom plate, the first copper-clad ceramic substrate, the third copper-clad ceramic substrate and the sixth copper-clad ceramic substrate are arranged on the same side, the signal end of the upper bridge arm is exposed, the lower bridge arm comprises a second copper-clad ceramic substrate, a fourth copper-clad ceramic substrate and a fifth copper-clad ceramic substrate which are arranged on the other side, the middle lower part of the edge of the bottom plate, the signal end of the lower bridge arm is exposed, and the first copper-; each copper-clad ceramic substrate is provided with a chip welding area and a plurality of grid resistors, the chip welding area is connected with a SiC MOSFET chip and a SiC SBD chip in series through aluminum wires, and the grid of the SiC MOSFET chip is connected with the signal end of the copper-clad ceramic substrate in the welding area after being connected with the grid resistors in series.

2. The SiC MOSFET module ceramic copper clad laminate structure of claim 1, wherein: the SiC MOSFET chips and the SiC SBD chips in the welding areas of the first copper-clad ceramic substrate and the third copper-clad ceramic substrate are correspondingly connected in parallel respectively, and the SiC MOSFET chips and the SiC SBD chips in the welding areas of the second copper-clad ceramic substrate and the fourth copper-clad ceramic substrate are correspondingly connected in parallel respectively.

3. The SiC MOSFET module ceramic copper clad laminate structure of claim 1, wherein: the upper bridge arm and the lower bridge arm are arranged on the bottom plate in an axial symmetry mode, so that the signal end wiring paths of the sixth copper-clad ceramic substrate and the fifth copper-clad ceramic substrate are identical.

4. The SiC MOSFET module ceramic copper clad laminate structure of claim 1, wherein: the first copper-clad ceramic substrate and the second copper-clad ceramic substrate as well as the third copper-clad ceramic substrate and the fourth copper-clad ceramic substrate are fixedly connected through a connecting bridge.

5. The SiC MOSFET module ceramic copper clad laminate structure of claim 1, wherein: the chip welding area is provided with a resistance welding frame, and the plurality of resistance welding frames are respectively arranged in axial symmetry with the horizontal axis and the vertical axis.

6. The SiC MOSFET module ceramic copper clad laminate structure of claim 1, wherein: the connecting bridge is made of copper.

7. The SiC MOSFET module ceramic copper clad laminate structure of claim 1, wherein: the SiC MOSFET chip and the SiC SBD chip are arranged on the chip welding area in a welding mode.