CN212278336U - Backboard and video processing equipment - Google Patents
Backboard and video processing equipment Download PDFInfo
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- CN212278336U CN212278336U CN202020717377.XU CN202020717377U CN212278336U CN 212278336 U CN212278336 U CN 212278336U CN 202020717377 U CN202020717377 U CN 202020717377U CN 212278336 U CN212278336 U CN 212278336U
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Abstract
The embodiment of the utility model discloses a back plate, which comprises a matrix exchange circuit; an input card connector connected to the matrix switching circuit; the output card connector is connected with the matrix switching circuit; a graphic processing card connector connected to the matrix switching circuit; a main control card connector for connecting the matrix switching circuit, the input card connector, the output card connector and the image processing card connector; and the video intelligent processing card connector is connected with the graphic processing card connector and the main control card connector. Furthermore, the embodiment of the utility model provides a still disclose one kind and can adopt the video processing equipment of backplate. The utility model discloses with the video display effect that has promoted, user experience degree has been promoted.
Description
Technical Field
The utility model relates to a video display field especially relates to a backplate and a video processing equipment.
Background
With the rapid development of the video processing industry, people have higher and higher requirements on video display effects. Especially, in various video playing environments, the display of videos has different display effect requirements. However, the display effect of the current video processing device has some problems, such as video noise, video jitter, brightness and contrast, which cannot be adaptive to the playing environment, and obviously, the current video processing device cannot meet the demand of people.
SUMMERY OF THE UTILITY MODEL
For solving at least partial problem among the above-mentioned problem, the embodiment of the utility model provides a backplate and a video processing equipment to video display effect has been promoted, user experience degree has been promoted.
On the one hand, the embodiment of the utility model provides a pair of backplate, include: a matrix switching circuit; an input card connector connected to the matrix switching circuit; the output card connector is connected with the matrix switching circuit; a graphic processing card connector connected to the matrix switching circuit; a main control card connector for connecting the matrix switching circuit, the input card connector, the output card connector and the image processing card connector; and the video intelligent processing card connector is connected with the graphic processing card connector and the main control card connector.
According to the technical scheme, the video intelligent processing card is arranged, artificial intelligent self-adaptive processing is performed on the video data before the video data are output, the video display effect is improved, and the user experience degree and the product competitiveness are improved.
In an embodiment of the present invention, the matrix switch circuit includes a matrix switch chip, the matrix switch chip connects the input card connector, the output card connector, the image processing card connector and the master control card connector.
In an embodiment of the present invention, the input card connector, the output card connector, the image processing card connector, the main control card connector and the video intelligent processing card connector are plug connectors respectively.
On the other hand, the embodiment of the utility model provides a video processing device, include: such as the aforementioned backplane, input card, output card, master control card, image processing card and video intelligent processing card; the input card is inserted into the input card connector of the back panel, the output card is inserted into the output card connector of the back panel, the main control card is inserted into the main control card connector of the back panel, the image processing card is inserted into the image processing card connector of the back panel, and the video smart processing card is connected to the video smart processing card connector of the back panel.
In an embodiment of the present invention, the video smart card comprises an AI processing chip and a first connector, the AI processing chip is connected to the first connector; the first connector is connected to the video intelligent processing card connector of the backboard; the video intelligent processing card also comprises a database memory, and the database memory is connected with the AI processing chip; the video intelligent processing card also comprises a sensing circuit, and the sensing circuit is connected with the AI chip.
In an embodiment of the present invention, the input card includes a video input interface, a first programmable logic device, a first microprocessor, and a second connector, the first programmable logic device is connected to the video input interface and the first microcontroller, the second connector is connected to the first programmable logic device, and the second connector is connected to the input card connector of the back plate.
In an embodiment of the present invention, the output card includes a video output interface, a second programmable logic device, a second microprocessor and a third connector, the second programmable logic device is connected to the video output interface and the second microcontroller, the third connector is connected to the second programmable logic device, and the third connector is connected to the backplane the output card connector.
In an embodiment of the present invention, the image processing card includes a third programmable logic device, a third microprocessor and a fourth connector, the third programmable logic device connects the third microcontroller and the fourth connector, the fourth connector is connected to the image processing card connector of the back plate.
In an embodiment of the present invention, the master control card includes an embedded processor and a fifth connector, the embedded processor is connected to the fifth connector, and the fifth connector is connected to the master control card connector of the backplane.
In an embodiment of the present invention, the backplane further comprises a cascade card connector, the cascade card connector connects the matrix switch circuit and the master control card connector.
In an embodiment of the present invention, the video processing apparatus further comprises a cascade card, the cascade card being plugged to the cascade card connector of the backplane.
In an embodiment of the present invention, the cascade card includes a fourth programmable logic device, a fourth microprocessor, a sixth connector, a first data interface and a second data interface, the fourth microprocessor is connected to the sixth connector, the first data interface is connected to the second data interface, and the sixth connector is connected to the backplane the cascade card connector.
In another aspect, an embodiment of the present invention provides a video processing apparatus, including: the system comprises a matrix switching circuit, an input card, an output card, a master control card, an image processing card and a video intelligent processing card; the matrix switching circuit is connected between the input card and the output card, the input card and the output card are respectively connected with the image processing card, the matrix switching circuit and the image processing card are respectively connected with the main control card, and the video intelligent processing card is connected with the image processing card.
In an embodiment of the present invention, the video processing apparatus further includes a cascade card, the cascade card connecting the matrix switching circuit and the image processing card.
In an embodiment of the present invention, the number of the input cards and the number of the output cards are a plurality of, the plurality of input cards are connected to the matrix switch circuit and connected to the image processing cards, respectively, and the plurality of output cards are connected to the matrix switch circuit and connected to the image processing cards, respectively.
The technical scheme can have one or more of the following advantages or beneficial effects: through setting up video intelligent processing card, carry out artificial intelligence self-adaptation to it before video data output and handle, promoted video display effect, promoted user experience degree and product competitiveness. In addition, input card, output card, image processing card, master control card, video intelligent processing card all adopt the connector to connect for the user can connect with the dismouting convenient and fast ground, has promoted work efficiency. Furthermore, configuring the matrix switch circuit to interface with high speed serial interfaces such as serial interfaces, e.g., serializer/deserializer interfaces, between the output card and the input card may reduce the requirements of the output channel and thereby increase the data transmission rate. In addition, the expansion capacity of the video processing equipment can be improved by adding the cascading cards.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a video processing apparatus according to an embodiment of the present invention.
Fig. 2 shows a schematic structural diagram of the back plate in fig. 1.
Fig. 3 shows a schematic structure of the input card in fig. 1.
Fig. 4 shows a schematic diagram of the structure of the image processing card in fig. 1.
Fig. 5 shows a schematic structure diagram of the video smart processing card in fig. 1.
Fig. 6 illustrates a schematic diagram of the structure of the output card of fig. 1.
Fig. 7 shows a schematic structural diagram of the master control card in fig. 1.
Fig. 8 is a schematic structural diagram of another video processing apparatus according to an embodiment of the present invention.
Fig. 9 shows a schematic diagram of the structure of the cascade card in fig. 8.
Fig. 10 is a schematic structural diagram of a video processing apparatus according to another embodiment of the present invention.
Fig. 11 is a schematic structural diagram of another video processing apparatus according to another embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
As shown in fig. 1, an embodiment of the present invention provides a video processing apparatus 800. The video processing apparatus 800 includes, for example: the system comprises a backplane 100, an input card 200, an output card 300, an image processing card 400, a master control card 500 and a video intelligent processing card 600. The input card 200, the output card 300, the image processing card 400, the master control card 500 and the video smart processing card 600 are respectively connected to the backplane 100.
Specifically, the back plate 100 is a PCB circuit board. As shown in fig. 2, the backplane 100 comprises, for example, a matrix switch circuit 11, an input card connector 13, an output card connector 15, an image processing card connector 19, a video smart card connector 18, and a host control card connector 17. The matrix switching circuit 11 is connected between the input card connector 13 and the output card connector 15; the graphic processing card connector 19 is connected with the matrix switching circuit 11; a main control card connector connecting matrix switching circuit 11, an input card connector 13, an output card connector 15 and an image processing card connector 19; the video intelligent processing card connector 18 is connected with the image processing card connector 19 and the main control card connector 17. In addition, the input card connector 13 can be connected to at least one input card; the output connector 15 is connectable to at least one output card.
As described above, the matrix Switch circuit 11 includes, for example, a matrix Switch chip such as a CrossPoint Switch chip. The matrix switching chip is connected with the input card connector 13, the output card connector 15, the image processing card connector 19 and the main control card connector 17, switches the corresponding input card output data to the image processing card connected to the image processing card connector for processing according to a control instruction issued by the main control card inserted into the main control card connector 17, and switches the processed data to the corresponding output card again for output. In order to improve the utilization rate of the matrix switch chip of the backplane, reduce the channel requirement of the switch chip, and improve the switching capability, it is preferable that the matrix switch circuit 11 connects the input card connector 13 and the output card connector 15, and the image processing card connector 19 via a serial bus such as a high-speed serial bus like a SERDES bus, so that the input card, the output card, and the image processing card, etc. can perform video image data transmission with the matrix switch circuit 11 via the high-speed serial bus like the SERDES, respectively.
The input card connector 13, the output card connector 15, the image processing card connector 19, the main control card connector 17, and the video smart card connector 18 are plug connectors, such as a pin header connector, a female header connector, and a high-contact plug. Therefore, the input card, the output card, the image processing card, the master control card, the video intelligent processing card and other board cards can be conveniently and quickly plugged into corresponding connectors on the back plate, and the connection efficiency is improved.
As shown in fig. 1, the input card 200 is inserted into the input card connector 13 of the backplane 100, and is mainly used for preprocessing an input video source. The input card 200 is connected to the interconnection board 110. Specifically, as shown in fig. 3, the input card 200 is provided thereon with, for example, a video input interface 210, a programmable logic device 220, a microcontroller 230, and a connector 240. The programmable logic device 220 is connected to the video input interface 210, the connector 240 and the microcontroller 230. The video input interface 210 is used for receiving an externally input video source signal. The video input interface 210 may be, for example, a standard video interface, such as an HDMI interface, a DVI interface, a DP interface or an SDI interface, and the video input interface 210 may also be an optical fiber interface or other interfaces for transmitting video or image data, which is not limited to this. Further, the number of the video input interfaces 210 may be multiple, and the multiple video input interfaces 210 are respectively selected from a part or all of an HDMI interface, a DVI interface, a DP interface, and an SDI interface, for example, the video input interfaces 210 may include two HDMI interfaces and two DP interfaces. Therefore, a user can set a plurality of video input interfaces 210 on the video preprocessing card 150 as required to further meet the requirements of the user for more diversified video input interfaces. The Programmable logic device 220 may be, for example, an FPGA (Field Programmable Gate Array), which is of a model such as XC7K160TFFG676ABX and XC7K325TFFG900, and is mainly used for decoding, detecting an input source, performing spatial conversion, performing deinterlacing, and performing image quality adjustment, such as brightness adjustment, under the control of the microcontroller 230. The microcontroller 230, for example, an MCU, may have a model of, for example, nxp lpc433DFET100, which is used to load the programmable logic device 220, communicate with the outside, and the like. Further, the input card 200 may also include a volatile memory 250, such as DDR3, for example, model IS43T216640B-107, coupled to the programmable logic device 220 for data caching and the like. Of course, the video decoding here can also be done with a professional decoding chip, which can be connected between the video input interface 210 and the programmable logic device 220, for example.
As shown in fig. 1, the image processing card 400 is connected to the image processing card connector 19 of the backplane 100, and is mainly used for processing such as scaling, image quality enhancement, and layer aliasing of video data and image data received from the input card 200. Specifically, as shown in fig. 4, the image processing card 400 is provided with a programmable logic device 420, a microcontroller 430, and a connector 410. The connector 410 is connected to the programmable logic device 420, and the microcontroller 430 is connected to the programmable logic device 420. The connector 410 is, for example, a socket connector such as a high-profile plug-in, a pin header, or the like. The programmable logic device 420 may be, for example, an FPGA, which may have a model number of XC7K160TFFG676ABX and XC7K325TFFG900, and is mainly configured to perform processing such as window scaling, layer overlaying, and image quality enhancement on video data or image data received through the connector 410 under the control of the microcontroller 430, and output the processed image data through the connector 410. A microcontroller 430, such as an MCU, may be of a type such as nxp lpc433DFET100, for loading the programmable logic device 420, communicating with the outside, and the like. Further, the image processing card 400 may also include a volatile memory 440, such as DDR3, for example, model IS43T216640B-107, coupled to the programmable logic device 420 for data caching and the like.
As shown in fig. 1, the video smart processing card 500 is connected to the video smart processing card connector 18 of the backplane 100 and the image processing card 400 is connected through the video smart processing card connector 18 and the image processing card connector 19. The video smart card 500 is mainly used for performing adaptive smart processing on the video data and the image data received from the image processing card 400 based on an artificial intelligence technology, for example, repairing and denoising, super-resolution, video debouncing, and the like to improve the display effect of the video. Specifically, as shown in fig. 5, an AI (Artificial Intelligence) processing chip 620 and a connector 610 are provided on the video smart processing card 500. The connector 410 is connected to the AI processing chip 620. The connector 410 is, for example, a socket connector such as a high-profile plug-in, a pin header, or the like. The AI processing chip 620 mainly performs processing such as adaptive enhancement of video effects and deep learning. The AI processor chip 620 may be, for example, a haisi Hi3559A/C series processor, or other similar AI processors, which is not limited herein. The AI processing chip 620 performs adaptive enhancement processing of display effect on the video data from the image processing card 400, such as video data sampling, problem identification and judgment, repair denoising, super-resolution, video debouncing and the like when a problem is found, under the control of the control signal transmitted through the connector 610 and from the host control card 500, and returns the processed video data to the image processing card 400, so that the image processing card 400 transmits the processed video data to the matrix switching circuit 11 and finally outputs the processed video data through the output card 300; when no problem is found, no processing is performed. It should be noted here that the AI processing chip 620 performs adaptive processing of the display effect on the received video data, and the processing method and the processing technique thereof may also adopt a mature artificial intelligence video processing technique in the prior art, which is not described herein again. As shown in fig. 5, the video smart card 500 may also include a database memory 630. The database memory 630 is connected to the AI processing chip 620. The database memory 185 is, for example, a nonvolatile memory such as an EMMC (Embedded multimedia Card) or the like, which can be used to store a database, such as video noise sample data, luminance sample data, deep learning data, and the like, required for the AI processing chip 620 to perform adaptive processing on the pre-processed video. Further, as shown in fig. 5, the video smart processing card 500 may further include a sensing circuit 640. The sensing circuit 640 includes, for example, a brightness sensor, a photosensitive sensor, and other sensing elements, and is configured to sense brightness, contrast, and other conditions of an external environment, and transmit a sensing result signal to the AI processing chip 620, so that the AI processing chip 620 performs adaptive adjustment on the received video data, so that the adjusted video data is adapted to the external environment where the video processing device 800 is located after being played on the display screen, so as to improve a display effect and user experience. For example, in a cinema, the sensing circuit 640 senses that the internal brightness is low and transmits a sensing signal to the AI processing chip 620, and the AI processing chip 620 adjusts the brightness parameter of the video data according to the sensing signal so that the brightness of the video data display matches the brightness in the cinema, so that the viewer can watch the movie comfortably. For example, in the case of an advertisement screen in a high-brightness environment, the AI processing chip 620 adaptively adjusts parameters such as brightness and contrast of the video data according to a signal fed back from the sensing circuit 640, so that the video data is clearly displayed on the advertisement screen, and people can clearly see the content of the advertisement being played.
As shown in fig. 1, the output card 300 is connected to the output card connector 15 of the backplane 100, and is mainly used for processing image data to be output, such as output reflection, interface feathering, interface adaptation, and encoding, and finally outputting to a back-end device, such as an LED display. Specifically, as shown in fig. 6, the output card 300 includes, for example, a connector 310, a programmable logic 320, a microcontroller 330, and a video output interface 340. Programmable logic 320 connects connector 310, microcontroller 330, and video output interface 340. The video output interface 340 is, for example, a standard video interface, such as an HDMI interface, a DVI interface, a DP interface, or an SDI interface. Further, the number of the video output interfaces 340 may be plural, and the plurality of video output interfaces 340 may be selected from a part or all of HDMI interface, DVI interface, DP interface, SDI interface, and in addition, the video output interfaces 340 may also be optical fiber interface or other interfaces for transmitting video or image data, which is not limited by the present invention. Therefore, the diversified video output interface requirements of users can be further met. The connector 310 may be, for example, a socket connector such as a pin header connector, a high-profile card, etc., and the output card 300 is plugged to the output card connector 15 of the backplane board 100 through the connector 310. The programmable logic device 320 may be, for example, an FPGA, which has a model number of XC7K160TFFG676ABX and XC7K325TFFG900, and is mainly used for performing processing such as output review, interface feathering, interface adaptation, encoding, and the like on video data or image data received through the connector 310 under the control of the microcontroller 330, and outputting the processed image data through the video output interface 340. The microcontroller 330, for example, an MCU, may be of a model such as NXP LPC433DFET100, which is used to load the programmable logic device 320, communicate with the outside, and the like. Further, the output card 300 may also include a volatile memory 350, such as DDR3, for example, model IS43T216640B-107, coupled to the programmable logic device 320 for data caching, and the like.
As shown in fig. 1, the master control card 500 is connected to the master control card connector 17 of the backplane 100, and is mainly used for providing control signals to the input card 200, the output card 300, the image processing card 400, the video smart processing card 600, and the like, and for implementing communication and human-computer interaction with the outside. Master control card 500 may, for example, include a connector 510 and an embedded processor 520. The connector 510 is connected to the embedded processor 520. The embedded processor 520 may be, for example, an embedded processor based on an ARM core, and is mainly used for controlling the implementation of human-computer interaction functions, such as switching control of layers, input source monitoring, and the like. Further, the master control card 500 also includes, for example, a communication interface 530. The communication interface 530 may be, for example, a USB interface, an RS232 interface, an ethernet interface such as RJ45, etc. for implementing human-computer interaction functions, such as receiving input information of a user, etc., and transmitting the input information to the embedded processor 520 for the embedded processor 520 to convert into corresponding control signals for controlling the cards.
In addition, as shown in fig. 8, the video processing apparatus 800 may further include a cascade card 700. The backplane 100 is further provided with a cascade card connector 16, and the cascade card connector 16 connects the matrix switch circuit 11 and the main control card connector 17. The cascading card 700 is coupled to the cascading card connector 16. The cascade card 700 can connect the video processing apparatus 800 to another video processing apparatus, such as another video processing apparatus, receive video data from another video processing apparatus, and output video data on its own video processing apparatus to another video processing apparatus, which can share video sources of the two video processing apparatuses and improve the expansion capability of the video processing apparatus. Specifically, as shown in fig. 9, the cascading card may include, for example, a data interface 710, a data interface 720, a programmable logic device 730, a microcontroller 740, and a connector 750. Programmable logic device 730 is connected to data interface 710, data interface 720, microcontroller 740, and connector 750. Data interfaces 710, 720 may be, for example, cxp (coaxpress) interfaces. The CXP interface is an asymmetric high-speed point-to-point serial communication digital interface standard and has the characteristics of high data transmission quality, long transmission distance and the like. Of course, the data interfaces 710 and 720 may also be other types of data transmission interfaces, and the present invention is not limited thereto. One of the data interfaces 710 and 720 can obtain video data of the video processing device from other video processing devices connected with the video processing device, and transmit the video data to the programmable logic device 730 and the matrix switching chip of the matrix switching circuit 11 through the connector 750; the other of the data interface 710 and the data interface 720 may output the video data transmitted by the matrix switch circuit 11, the connector 750, and the programmable logic device 730 to other video processing apparatuses connected thereto for use by the other video processing apparatuses. The programmable logic device 730, which may be an FPGA, may be, for example, of a type XC7K160TFFG676ABX, XC7K325TFFG900, and is mainly used to process received video data or image data under the control of the microcontroller 740, and output the processed image data through the connector 750 or the data interface 710, 720. A microcontroller 740, for example an MCU, the model of which may be, for example, NXP LPC433DFET100, is used to load the programmable logic device 730, and to communicate with the outside, etc.
In addition, in other embodiments of the present invention, the video processing apparatus 800 further includes a power supply unit (not shown in the figure), and the back plate 100 of the video processing apparatus 800 is provided with power supply connectors (not shown in the figure) which are connected to the matrix switching circuit 11, the input card connector 13, the output connector 15, the image processing card connector 19, the video smart processing card connector 18, and the main control card connector 17. The power supply unit is connected with the power supply connector to supply power to the matrix switching circuit 11, the input card 200, the output card 300, the image processing card 400, the video intelligent processing card 600 and the master control card 500. The power supply unit here can adopt a power supply module mature in the prior art, and is not described here again.
In addition, referring to fig. 10, in another embodiment of the present invention, a video processing apparatus 900 according to a fourth embodiment of the present invention is substantially the same as the circuit configuration of the video processing apparatus 800 in fig. 1, but is different in that no connector is provided between the circuit components of the video processing apparatus 900, and the components are directly connected to each other, for example, all the components of the video processing apparatus 900 are disposed on a backplane and are not connected to each other by a connector. Specifically, the video processing apparatus 900 includes, for example, a matrix switch circuit 901, an input card 902, an output card 903, an image processing card 904, a master control card 905, a video smart processing card 906. The input card 902, the output card 903, the image processing card 904, and the host control card 905 are connected to the matrix switch circuit 901, and the input card 902, the output card 903, the image processing card 904, and the video smart card 906 are connected to the host control card 905. Video smart processing card 906 is connected to image processing card 904. The matrix switch circuit 901, the input card 902, the output card 903, the image processing card 904, the master control card 905, and the video smart processing card 906 may all adopt the matrix switch circuit 11, the input card 13, the output card 15, the image processing card 19, the master control card 17, and the video smart processing card 18 in the foregoing embodiments, and the specific structures thereof are not described herein again.
Further, as shown in fig. 11, the video processing apparatus 900 further includes a cascade card 907. A cascade card 907 connects the matrix switching circuit 901 and the master control card 905. The cascade card 907 may be the cascade card 700 in the previous embodiment, and the detailed structure thereof is not described herein.
As mentioned above, the video processing apparatus 900 further includes a power supply unit (not shown in the figure). The power supply unit is connected with the matrix switching circuit 11, the input card 200, the output card 300, the image processing card 400, the video intelligent processing card 600 and the master control card 500 to supply power. The power supply unit may adopt a power supply module mature in the prior art, and is not described herein again.
To sum up, the embodiment of the utility model provides a through setting up video intelligent processing card, carry out artificial intelligence self-adaptation to it before video data output and handle, promoted video display effect, promoted user experience degree and product competitiveness. In addition, input card, output card, image processing card, master control card, video intelligent processing card all adopt the connector to connect for the user can connect with the dismouting convenient and fast ground, has promoted work efficiency. Furthermore, configuring the matrix switch circuit to interface with high speed serial interfaces such as serial interfaces, e.g., serializer/deserializer interfaces, between the output card and the input card may reduce the requirements of the output channel and thereby increase the data transmission rate. In addition, the expansion capacity of the video processing equipment can be improved by adding the cascading cards.
In the several embodiments provided in the present disclosure, it should be understood that the disclosed system, apparatus, and method may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and the actual implementation may have another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (15)
1. A backing sheet, comprising:
a matrix switching circuit;
an input card connector connected to the matrix switching circuit;
the output card connector is connected with the matrix switching circuit;
an image processing card connector connected to the matrix switching circuit;
a main control card connector for connecting the matrix switching circuit, the input card connector, the output card connector and the image processing card connector; and
and the video intelligent processing card connector is connected with the image processing card connector and the main control card connector.
2. The backplane of claim 1, wherein the matrix switch circuit comprises a matrix switch chip that connects the input card connector, the output card connector, the image processing card connector, and the master control card connector.
3. A backplane according to claim 1, wherein the input card connector, the output card connector, the image processing card connector, the host control card connector and the video smart card connector are jack connectors, respectively.
4. A video processing apparatus, comprising: the backplane of any one of claims 1 to 3, an input card, an output card, a master control card, an image processing card, and a video smart processing card; the input card is inserted into the input card connector of the back panel, the output card is inserted into the output card connector of the back panel, the main control card is inserted into the main control card connector of the back panel, the image processing card is inserted into the image processing card connector of the back panel, and the video smart processing card is connected to the video smart processing card connector of the back panel.
5. The video processing device according to claim 4, wherein the video smart card comprises an AI processing chip and a first connector, the AI processing chip being connected to the first connector; the first connector is connected to the video intelligent processing card connector of the backboard; the video intelligent processing card also comprises a database memory, and the database memory is connected with the AI processing chip; the video intelligent processing card also comprises a sensing circuit, and the sensing circuit is connected with the AI processing chip.
6. The video processing device of claim 4, wherein the input card comprises a video input interface, a first programmable logic device and a first microcontroller, and a second connector, the first programmable logic device connecting the video input interface and the first microcontroller, the second connector connecting the first programmable logic device, the second connector connecting to the input card connector of the backplane.
7. The video processing device of claim 4, wherein the output card comprises a video output interface, a second programmable logic device and a second microcontroller, and a third connector, the second programmable logic device connecting the video output interface and the second microcontroller, the third connector connecting the second programmable logic device, the third connector connecting to the output card connector of the backplane.
8. The video processing device according to claim 4, wherein the image processing card comprises a third programmable logic device and a third microcontroller and a fourth connector, the third programmable logic device connecting the third microcontroller and the fourth connector, the fourth connector being connected to the image processing card connector of the backplane.
9. The video processing device according to claim 4, wherein the master control card comprises an embedded processor and a fifth connector, the embedded processor is connected to the fifth connector, and the fifth connector is connected to the master control card connector of the backplane.
10. The video processing device of claim 4, wherein the backplane further comprises a cascading card connector connecting the matrix switch circuit and the master control card connector.
11. The video processing device of claim 10, further comprising a cascade card that is plugged to the cascade card connector of the backplane.
12. The video processing device according to claim 11, wherein the cascading card comprises a fourth programmable logic device, a fourth microcontroller, a sixth connector, a first data interface, and a second data interface, the fourth microcontroller, the sixth connector, the first data interface, and the second data interface are respectively connected to the fourth programmable logic device, and the sixth connector is connected to the cascading card connector of the backplane.
13. A video processing apparatus, comprising: the system comprises a matrix switching circuit, an input card, an output card, a master control card, an image processing card and a video intelligent processing card; the matrix switching circuit is connected between the input card and the output card, the input card and the output card are respectively connected with the image processing card, the matrix switching circuit and the image processing card are respectively connected with the main control card, and the video intelligent processing card is connected with the image processing card.
14. The video processing apparatus according to claim 13, further comprising a cascade card connecting the matrix switch circuit and the image processing card.
15. The apparatus according to claim 13, wherein the number of the input cards and the number of the output cards are plural, the plural input cards are connected to the matrix switch circuit and to the image processing cards, respectively, and the plural output cards are connected to the matrix switch circuit and to the image processing cards, respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| CN117082191A (en) * | 2023-10-13 | 2023-11-17 | 广东保伦电子股份有限公司 | Extended multi-channel video source back display system and multi-channel video back display method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117082191A (en) * | 2023-10-13 | 2023-11-17 | 广东保伦电子股份有限公司 | Extended multi-channel video source back display system and multi-channel video back display method |
| CN117082191B (en) * | 2023-10-13 | 2024-03-08 | 广东保伦电子股份有限公司 | Extended multi-channel video source back display system and multi-channel video back display method |
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