CN220821063U - Signal compatible circuit, signal compatible system and electronic equipment - Google Patents

Abstract

The application belongs to the technical field of display, and provides a signal compatible circuit, a signal compatible system and electronic equipment. The signal compatible circuit comprises a first resistor module, a second resistor module, a first signal conversion module, an eDP interface and a V-by-One interface, wherein the first resistor module is electrically connected with the eDP interface, the first signal conversion module is respectively electrically connected with the second resistor module and the V-by-One interface, the eDP interface is used for being electrically connected with a first display screen, the V-by-One interface is used for being electrically connected with a second display screen, and when the first display screen is driven, the first resistor module is used for being electrically connected with a main board; when the second display screen is driven, the first resistor module is disconnected with the main board, and the second resistor module is used for being electrically connected with the main board. The signal compatible circuit provided by the embodiment of the application solves the problem that a mainboard cannot support the V-by-One interface and the eDP interface at the same time.

Description

Signal compatible circuit, signal compatible system and electronic equipment

Technical Field

The application belongs to the technical field of display, and particularly relates to a signal compatible circuit, a signal compatible system and electronic equipment.

Background

Along with the development of the technology of the main board and the display screen, the interactive large screen is also diversified day by day, and the video communication between the main board and the display screen becomes the key problem to be solved first.

At present, some display screen interfaces on the market are V-by-one interfaces (VBO for short, which is a digital interface standard technology facing image information transmission), some display screen interfaces are eDP interfaces (Embedded DisplayPort, which is a standard protocol in the technical field of digital display), and many mainboards only support the eDP interfaces and do not support the V-by-one interfaces.

Disclosure of utility model

The embodiment of the application provides a signal compatible circuit, a signal compatible system and electronic equipment, which can solve the problem that a mainboard cannot support a V-by-One interface and an eDP interface at the same time.

In a first aspect, an embodiment of the present application provides a signal compatible circuit, including a first resistor module, a second resistor module, a first signal conversion module, an eDP interface and a V-by-One interface, where the first resistor module is electrically connected to the eDP interface, the first signal conversion module is electrically connected to the second resistor module and the V-by-One interface, the eDP interface is electrically connected to a first display screen, the V-by-One interface is electrically connected to a second display screen, and when the first display screen is driven, the first resistor module is electrically connected to a motherboard; when the second display screen is driven, the first resistor module is disconnected with the main board, and the second resistor module is used for being electrically connected with the main board.

In a possible implementation manner of the first aspect, the first resistor module includes a plurality of first resistors, first ends of the plurality of first resistors are electrically connected to a plurality of input ends in the eDP interface in a one-to-one correspondence manner, and when the first display screen is driven, second ends of the plurality of first resistors are electrically connected to a plurality of output ends in the main board in a one-to-one correspondence manner.

In a possible implementation manner of the first aspect, the second resistor module includes a plurality of second resistors, first ends of the second resistors are electrically connected to the first signal conversion module, and when the second display screen is driven, second ends of the second resistors are electrically connected to a plurality of output ends in the main board in a one-to-one correspondence manner.

In a possible implementation manner of the first aspect, the first signal conversion module includes a first signal conversion chip, and the first signal conversion chip is electrically connected to the second resistor module and the V-by-One interface, respectively.

In a possible implementation manner of the first aspect, the first signal conversion module further includes a plurality of first capacitors, anodes of the first capacitors are electrically connected to a plurality of output terminals in the first signal conversion chip in a One-to-One correspondence manner, and cathodes of the first capacitors are electrically connected to a plurality of input terminals in the V-by-One interface in a One-to-One correspondence manner.

In a possible implementation manner of the first aspect, the signal compatible circuit further includes a switch module, a control end of the switch module is electrically connected to the motherboard, a first output end of the switch module is electrically connected to the first resistor module, and a second output end of the switch module is electrically connected to the second resistor module.

In a possible implementation manner of the first aspect, the switch module includes a multiple-way switch chip, a plurality of first connection ends of the multiple-way switch chip are electrically connected with a plurality of output ends in the main board in a one-to-one correspondence manner, a plurality of second connection ends of the multiple-way switch chip are electrically connected with the first resistor module, and a plurality of third connection ends of the multiple-way switch chip are electrically connected with the second resistor module.

In a possible implementation manner of the first aspect, the signal compatible circuit further includes a second signal conversion module, where the second signal conversion module is electrically connected to the first resistor module and the eDP interface, respectively.

In a second aspect, an embodiment of the present application provides a signal compatible system, including a motherboard and a signal compatible circuit according to any One of the first aspect, where an eDP interface in the signal compatible circuit is used to be electrically connected to a first display screen, and a V-by-One interface in the signal compatible circuit is used to be electrically connected to a second display screen, where the motherboard is electrically connected to a first resistor module in the signal compatible circuit when the first display screen is driven, and where the motherboard is disconnected from the first resistor module and is electrically connected to a second resistor module in the signal compatible circuit when the second display screen is driven.

In a third aspect, an embodiment of the present application provides an electronic device, including the signal compatible system of the second aspect.

Compared with the prior art, the embodiment of the application has the beneficial effects that:

The embodiment of the application provides a signal compatible circuit which comprises a first resistor module, a second resistor module, a first signal conversion module, an eDP interface and a V-by-One interface. The first resistor module is electrically connected with the eDP interface, the first signal conversion module is electrically connected with the second resistor module and the V-by-One interface respectively, the eDP interface is used for being electrically connected with the first display screen, and the V-by-One interface is used for being electrically connected with the second display screen.

When the first display screen is driven, the first resistor module is used for being electrically connected with the main board, the first resistor module is used for transmitting a first driving signal output by the main board to the eDP interface, and the eDP interface is used for driving the first display screen according to the first driving signal.

When the second display screen is driven, the first resistor module is disconnected with the main board, the second resistor module is electrically connected with the main board, the second resistor module is used for transmitting a second driving signal output by the main board to the first signal conversion module, the first signal conversion module is used for converting the second driving signal into a V-by-One signal, and the V-by-One interface is used for driving the second display screen according to the V-by-One signal.

The signal compatible circuit provided by the embodiment of the application selects different interfaces through the first resistor module and the second resistor module, so that the mainboard can support the eDP interface and the V-by-One interface.

In summary, the signal compatible circuit provided by the embodiment of the application solves the problem that the mainboard cannot support the V-by-One interface and the eDP interface at the same time.

It will be appreciated that the advantages of the second to third aspects may be found in the relevant description of the first aspect, and are not described in detail herein.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic block diagram of a signal compatible circuit provided by an embodiment of the present application;

FIG. 2 is a schematic block diagram of a signal compatible circuit provided by another embodiment of the present application;

FIG. 3 is a schematic block diagram of a signal compatible circuit provided by another embodiment of the present application;

FIG. 4 is a schematic diagram of a circuit structure between a motherboard and a first resistor module;

FIG. 5 is a schematic diagram of a circuit structure between a motherboard and a second resistor module;

FIG. 6 is a schematic diagram of a circuit structure of a first signal conversion module;

FIG. 7 is a schematic diagram of a second circuit configuration of the first signal conversion module;

FIG. 8 is a schematic circuit diagram of an eDP interface;

FIG. 9 is a schematic circuit diagram of a V-by-One interface;

FIG. 10 is a schematic circuit diagram of a switch module;

fig. 11 is a functional block diagram of a signal compatible system.

In the figure: 10. a signal compatible circuit; 11. a first resistor module; 12. an eDP interface; 13. a second resistor module; 14. a first signal conversion module; 15. a V-by-One interface; 16. a switch module; 17. a second signal conversion module; 20. a main board; 30. a first display screen; 40. a second display screen; 50. a signal compatible system.

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

As used in the present description and the appended claims, the term "if" may be interpreted in context as "when …" or "once" or "in response to a determination" or "in response to detection. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".

Furthermore, the terms "first," "second," "third," and the like in the description of the present specification and in the appended claims, are used for distinguishing between descriptions and not necessarily for indicating or implying a relative importance.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

The eDP is a standard protocol in the technical field of digital display, has high bandwidth (each group can reach 5.4 Gbps), good integration and simple related product design, and the eDP interface can reduce the complexity of equipment, support the necessary functions of key cross-industry application programs, and provide performance scalability to support higher color depth, refresh rate and display resolution. The eDP interface has three basic architectures including Main channel (Main Link), accessory channel (AUX) and Hot Plug (HPD) for video and audio transmission.

V-by-one is a signal standard specially oriented to high-definition digital image signal transmission, and consists of 1-8 groups of paired signals, so that the problem of wiring time lag is solved, EMI (Electromagnetic Interference ) is greatly reduced, the maximum transmission speed of each group of signals is improved (up to 3.75 Gbps), the number of transmission lines is greatly reduced, and the low-cost, low-EMI and light-weight can be realized.

At present, many mainboards at the market end do not support communication between V-by-one signals and a display screen, only support communication between eDP signals and the display screen, namely do not support a V-by-one interface, and only support an eDP interface.

In order to solve the problem that only the eDP interface is supported by the motherboard and the V-by-One interface and the eDP interface cannot be simultaneously supported, an embodiment of the present application provides a signal compatible circuit, as shown in fig. 1, a signal compatible circuit 10 includes a first resistor module 11, a second resistor module 13, a first signal conversion module 14, an eDP interface 12 and a V-by-One interface 15. The first resistor module 11 is electrically connected with the eDP interface 12, the first signal conversion module 14 is electrically connected with the second resistor module 13 and the V-by-One interface 15, the eDP interface 12 is electrically connected with the first display screen 30, and the V-by-One interface 15 is electrically connected with the second display screen 40.

When the first display 30 is driven, as shown in fig. 1, the first resistor module 11 is electrically connected to the motherboard 20, the first resistor module 11 is used for transmitting a first driving signal output by the motherboard 20 to the eDP interface 12, and the eDP interface 12 is used for driving the first display 30 according to the first driving signal.

When the second display 40 is driven, as shown in fig. 2, the first resistor module 11 is disconnected from the main board 20, the second resistor module 13 is electrically connected to the main board 20, the second resistor module 13 is used for transmitting the second driving signal output by the main board 20 to the first signal conversion module 14, the first signal conversion module 14 is used for converting the second driving signal into a V-by-One signal, and the V-by-One interface 15 is used for driving the second display 40 according to the V-by-One signal.

The signal compatible circuit 10 provided by the embodiment of the application selects different interfaces through the first resistor module 11 and the second resistor module 13, so that the main board 20 can support not only the eDP interface but also the V-by-One interface.

In summary, the signal compatible circuit 10 provided by the embodiment of the application solves the problem that the motherboard 20 cannot support the V-by-One interface and the eDP interface at the same time.

For example, the motherboard 20 may be an RK3588 chip, and the RK3588 chip is a high-performance, low-power application processor chip, suitable for ARM PC (ADVANCED RISC MACHINE Personal Computer, ARM architecture personal computer), edge computing, personal mobile internet appliance, and other multimedia products, as shown in fig. 4 and 5. The I2C pin of the RK3588 chip is a pin for configuring other peripheral equipment, and is a communication pin; the HDMI_TX pin of the RK3588 chip is HDMI (High Definition Multimedia Interface, high-definition multimedia interface) and eDP multiplexing pin, when the display screen supports the eDP interface, the first resistor module 11 is connected with the RK3588 chip, so as to drive the display screen supporting the eDP interface; when the display screen supports the V-by-One interface, the second resistor module 13 is connected with the RK3588 chip, and the HDMI signal is converted into the V-by-One signal through the first signal conversion module 14, so that the display screen supporting the V-by-One interface is driven; the EDP-AUX signal channel of the RK3588 chip is an auxiliary channel of the eDP interface; the HPD-IN pin (79 th pin) of the RK3588 chip is a hot plug pin, and whether a signal is accessed or not is checked through the change of high and low levels (the default is a low level signal, and the signal insertion is a high level signal).

Taking the RK3588 chip as an example of the motherboard 20, specific circuit structures of the first resistor module 11, the second resistor module 13, the first signal conversion module 14, the eDP interface 12 and the V-by-One interface 15 are described.

As shown in fig. 4, the first resistor module 11 includes a plurality of first resistors, and first ends of the plurality of first resistors are electrically connected to a plurality of input ends in the eDP interface 12 in a one-to-one correspondence manner, and when the first display screen 30 is driven, second ends of the plurality of first resistors are electrically connected to a plurality of output ends in the motherboard 20 in a one-to-one correspondence manner. Wherein the second resistor module 13 is disconnected from the main board 20. The resistors RD 10-RD 18 in fig. 4 are all first resistors, and the first end and the second end of the first resistor may be any one of the two ends of the first resistor. The circuit structure of the eDP interface 12 is shown in fig. 8.

Specifically, the first ends of the first resistors are electrically connected with the 19 th pin, the 24 th pin, the 25 th pin, the 27 th pin, the 28 th pin, the 30 th pin, the 31 st pin, the 33 rd pin and the 34 th pin of the eDP interface 12 in a one-to-one correspondence manner, and when the first display screen 30 is driven, the second ends of the first resistors are electrically connected with the 71 st pin to the 79 th pin of the motherboard 20 in a one-to-one correspondence manner, and are used for receiving the first driving signals output by the motherboard 20 and transmitting the first driving signals to the eDP interface 12. The present application selects the eDP interface 12 through a plurality of first resistors to achieve the purpose of driving the first display screen 30.

The first resistor is a jumper resistor, and the resistance value is 0.

The number of the first resistors is illustratively determined according to the chip type of the motherboard 20, and in this embodiment, the number of the first resistors is 9.

The first resistor module 11 may be replaced with another module that performs its function, and is not limited thereto.

As shown in fig. 5, the second resistor module 13 includes a plurality of second resistors, and first ends of the second resistors are electrically connected to the first signal conversion module 14, and when the second display screen 40 is driven, second ends of the second resistors are electrically connected to a plurality of output ends in the main board 20 in a one-to-one correspondence manner. Wherein the first resistor module 11 is disconnected from the main board 20. The resistors RD1 to RD9 in fig. 5 are all second resistors, and the first end and the second end of the second resistor may be any one of the two ends of the second resistor.

Specifically, the first ends of the second resistors are electrically connected to the first signal conversion module 14, and when the second display screen 40 is driven, the second ends of the second resistors are electrically connected to the 71 st-79 th pins of the motherboard 20 in a one-to-one correspondence manner, and are used for receiving the second driving signals output by the motherboard 20 and transmitting the second driving signals to the first signal conversion module 14. The application realizes the purpose of driving the second display screen 40 by selecting the V-by-One interface 15 through a plurality of second resistors.

The second resistor is illustratively a jumper resistor having a value of 0.

The number of the second resistors is illustratively determined according to the chip type of the motherboard 20, and is 9 in this embodiment.

The second resistor module 13 may be replaced by another module that performs its function, and is not limited thereto.

As shown in fig. 6 and 7, the first signal conversion module 14 includes a first signal conversion chip electrically connected to the second resistor module 13 and the V-by-One interface 15, respectively. The circuit structure of the V-by-One interface 15 is shown in FIG. 9. The first signal conversion chip is an EP9179 chip, and the circuit structure of the EP9179 chip is shown in fig. 6 and 7. As shown in FIG. 6, UH1-A in the EP9179 chip is a power supply pin and a functional configuration pin. As shown in fig. 7, the UH1-B in the EP9179 chip is used to convert the second driving signal (i.e., HDMI signal) into a V-by-One signal and transmit the V-by-One signal to the V-by-One interface 15. Other pins such as I2C (i.e. pins 39-40) are communication pins, RSTB is a reset pin, and hot plug (i.e. pin 93) checks whether a signal is connected (default low signal, signal insertion is high signal) through high-low level change.

Specifically, the 98 th pin to the 110 th pin and the 93 th pin of the first signal conversion chip are electrically connected with the first ends of the plurality of second resistors in the second resistor module 13 in a One-to-One correspondence manner, and the 53 th pin, the 54 th pin, the 57 th pin, the 58 th pin, the 61 th pin, the 62 th pin, the 65 th pin, the 66 th pin, the 72 nd pin, the 73 rd pin, the 76 th pin, the 77 th pin, the 80 th pin, the 81 st pin, the 84 th pin, the 85 th pin are electrically connected with the 2 nd pin, the 3 rd pin, the 5 th pin, the 6 th pin, the 8 th pin, the 9 th pin, the 11 th pin, the 12 th pin, the 14 th pin, the 15 th pin, the 17 th pin, the 18 th pin, the 20 th pin, the 21 st pin, the 23 nd pin and the 24 th pin in a One-to-One correspondence manner.

The first signal conversion chip is used for converting the second driving signal (i.e., HDMI signal) into a V-by-One signal and transmitting the V-by-One signal to the V-by-One interface 15.

As shown in fig. 7, the first signal conversion module 14 further includes a plurality of first capacitors, the anodes of which are electrically connected to the plurality of output terminals in the first signal conversion chip in a One-to-One correspondence manner, and the cathodes of which are electrically connected to the plurality of input terminals in the V-by-One interface 15 in a One-to-One correspondence manner. The capacitors C30-C45 in fig. 7 are all the first capacitors.

Specifically, the first ends of the first capacitors are electrically connected with the 53 rd, 54 th, 57 th, 58 th, 61 th, 62 th, 65 th, 66 th, 72 th, 73 rd, 76 th, 77 th, 80 th, 81 st, 84 th and 85 th pins of the first signal conversion chip in a One-to-One correspondence manner, and the second ends of the first capacitors are electrically connected with the 2 nd, 3 rd, 5 th, 6 th, 8 th, 9 th, 11 th, 12 th, 14 th, 15 th, 17 th, 18 th, 20 th, 21 st, 23 rd and 24 th pins of the V-by-One interface 15 in a One-to-One correspondence manner.

The first capacitor is used for performing AC coupling (DC blocking) on the V-by-One signal, and transmitting the processed V-by-One signal to the V-by-One interface 15.

It should be noted that the first signal conversion module 14 may be replaced by another module that performs its function, and is not limited thereto.

As can be seen from the above, the signal compatible circuit 10 provided in the embodiment of the application realizes the compatibility of two different signals by adopting a manual mode, so that the circuit cost is reduced, but the problem of inconvenient operation exists in practical application.

In response to the above-described problems, the present application provides a switch module 16 to achieve automatic compatibility with two different signals. As shown in fig. 3, the signal compatible circuit 10 further includes a switch module 16, a control end of the switch module 16 is electrically connected to the motherboard 20, a first output end of the switch module 16 is electrically connected to the first resistor module 11, and a first output end of the switch module 16 is electrically connected to the second resistor module 13.

Specifically, the switch module 16 is configured to connect the first resistor module 11 to the main board 20 in a conductive manner when the first display 30 is driven, and connect the second resistor module 13 to the main board 20 in a conductive manner when the second display 40 is driven.

As shown in fig. 10, the switch module 16 includes A multi-way switch chip, wherein A plurality of first connection terminals A0, A1, … …, an of the multi-way switch chip are electrically connected to A plurality of output terminals in the main board 20 in A one-to-one correspondence manner, A plurality of second connection terminals B0, B1, … …, bn of the multi-way switch chip are electrically connected to the first resistor module 11, and A plurality of third connection terminals C0, C1, … …, cn of the multi-way switch chip are electrically connected to the second resistor module 13. The value of n is determined according to the chip type of the motherboard 20, and in this embodiment, the value of n is 9.

Specifically, as can be seen from fig. 4 and 5, the first connection ends A0, A1, … …, an of the multiple-way switch chip are electrically connected to the 71 st-79 th pins of the motherboard 20 in A one-to-one correspondence manner, the second connection ends B0, B1, … …, bn of the multiple-way switch chip are electrically connected to the second ends of the first resistors in A one-to-one correspondence manner, and the third connection ends C0, C1, … …, cn of the multiple-way switch chip are electrically connected to the second ends of the second resistors in A one-to-one correspondence manner. The multi-way switch chip is used for conducting and connecting the first resistors with the main board 20 when the first display screen 30 is driven, and conducting and connecting the second resistors with the main board 20 when the second display screen 40 is driven.

For example, when the first display 30 is driven, the multiple-way switch chip turns on the first connection terminals A0, A1, … …, an of the multiple-way switch chip and the second connection terminals B0, B1, … …, bn of the multiple-way switch chip according to the received first control signal, and further turns on the first resistors and the main board 20, and when the second display 40 is driven, the multiple-way switch chip turns on the first connection terminals A0, A1, … …, an of the multiple-way switch chip and the third connection terminals C0, C1, … …, cn of the multiple-way switch chip according to the received second control signal, and further turns on the second resistors and the main board 20. The first control signal and the second control signal received by the multiway switch chip may be provided by the main board 20 or may be provided by an external circuit.

Note that the switch module 16 may be replaced by another module that performs its function, and is not limited thereto.

In the above embodiment, the driving signal output by the main board 20 is an HDMI signal, and when the driving signal output by the main board 20 is not an HDMI signal, the eDP interface cannot be compatible, and the second signal conversion module 17 is provided to solve the above problem.

As shown in fig. 3, the signal compatible circuit 10 provided in the embodiment of the present application further includes a second signal conversion module 17, where the second signal conversion module 17 is electrically connected to the first resistor module 11 and the eDP interface 12, respectively.

Specifically, the second signal conversion module 17 is configured to convert the first driving signal output by the motherboard 20 into an eDP signal, and transmit the eDP signal to the eDP interface 12.

The embodiment of the present application further provides a signal compatible system, as shown in fig. 11, where the signal compatible system 50 includes a main board 20 and the signal compatible circuit 10 described above, an eDP interface in the signal compatible circuit 10 is used for electrically connecting with the first display screen 30, a V-by-One interface in the signal compatible circuit 10 is used for electrically connecting with the second display screen 40, when the first display screen 30 is driven, the main board 20 is electrically connected with a first resistor module in the signal compatible circuit 10, and when the second display screen 40 is driven, the main board 20 is disconnected from the first resistor module and is electrically connected with a second resistor module in the signal compatible circuit 10.

The application selects different interfaces through the signal compatible circuit 10, so that the mainboard can support not only eDP interfaces but also V-by-One interfaces. Therefore, the signal compatible system 50 provided by the embodiment of the application can support both the eDP interface and the V-by-One interface.

The embodiment of the application also provides electronic equipment which comprises a display screen and the signal compatible system, wherein the signal compatible system is electrically connected with the display screen. The electronic device compatible eDP interface and V-by-One interface provided in the embodiment of the present application may select different interfaces according to the type of the display screen, and the specific working principle is referred to the description of the working principle of the signal compatible system, which is not repeated here.

By way of example, the electronic device may be a display, a television, a conference kiosk, and other devices that use a display screen.

The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims (10)

1. The signal compatible circuit is characterized by comprising a first resistor module, a second resistor module, a first signal conversion module, an eDP interface and a V-by-One interface, wherein the first resistor module is electrically connected with the eDP interface, the first signal conversion module is respectively electrically connected with the second resistor module and the V-by-One interface, the eDP interface is used for being electrically connected with a first display screen, the V-by-One interface is used for being electrically connected with a second display screen, and when the first display screen is driven, the first resistor module is used for being electrically connected with a main board; when the second display screen is driven, the first resistor module is disconnected with the main board, and the second resistor module is used for being electrically connected with the main board.

2. The signal compatibility circuit of claim 1 wherein said first resistor module comprises a plurality of first resistors having first ends electrically connected in a one-to-one correspondence with a plurality of inputs in said eDP interface and second ends electrically connected in a one-to-one correspondence with a plurality of outputs in said motherboard when said first display screen is driven.

3. The signal compatible circuit of claim 1, wherein the second resistor module comprises a plurality of second resistors, first ends of the second resistors are electrically connected to the first signal conversion module, and when the second display screen is driven, second ends of the second resistors are electrically connected to the plurality of output ends in the main board in a one-to-one correspondence.

4. The signal compatible circuit of claim 1, wherein the first signal conversion module comprises a first signal conversion chip electrically connected to the second resistor module and the V-by-One interface, respectively.

5. The signal compatible circuit of claim 4, wherein the first signal conversion module further comprises a plurality of first capacitors, anodes of the plurality of first capacitors are electrically connected to a plurality of output terminals in the first signal conversion chip in a One-to-One correspondence manner, and cathodes of the plurality of first capacitors are electrically connected to a plurality of input terminals in the V-by-One interface in a One-to-One correspondence manner.

6. The signal compatible circuit of any of claims 1-5, further comprising a switch module, a control terminal of the switch module being configured to be electrically connected to the motherboard, a first output terminal of the switch module being electrically connected to the first resistor module, and a second output terminal of the switch module being electrically connected to the second resistor module.

7. The signal compatible circuit of claim 6, wherein the switch module comprises a multi-way switch chip, wherein a plurality of first connection terminals of the multi-way switch chip are electrically connected with a plurality of output terminals in the main board in a one-to-one correspondence manner, wherein a plurality of second connection terminals of the multi-way switch chip are electrically connected with the first resistor module, and wherein a plurality of third connection terminals of the multi-way switch chip are electrically connected with the second resistor module.

8. The signal compatible circuit of any of claims 1-5, further comprising a second signal conversion module electrically coupled to the first resistor module and the eDP interface, respectively.

9. A signal compatible system comprising a motherboard and the signal compatible circuit of any One of claims 1-8, wherein an eDP interface in the signal compatible circuit is configured to be electrically connected to a first display screen, a V-by-One interface in the signal compatible circuit is configured to be electrically connected to a second display screen, the motherboard is electrically connected to a first resistor module in the signal compatible circuit when the first display screen is driven, and the motherboard is disconnected from the first resistor module and is electrically connected to a second resistor module in the signal compatible circuit when the second display screen is driven.

10. An electronic device comprising the signal compatibility system of claim 9.