CN212063592U

CN212063592U - Intelligent quick-charging circuit framework

Info

Publication number: CN212063592U
Application number: CN202020936415.0U
Authority: CN
Inventors: 马克俊
Original assignee: Shenzhen Hehuiyuan Electronic Technology Co ltd
Current assignee: Shenzhen Hehuiyuan Electronic Technology Co ltd
Priority date: 2020-05-28
Filing date: 2020-05-28
Publication date: 2020-12-01
Anticipated expiration: 2030-05-28

Abstract

The invention provides an intelligent quick charging circuit architecture which comprises an alternating current input circuit, an EMC circuit, a rectifying and filtering circuit, a power conversion control circuit, an isolation voltage reduction circuit, a synchronous rectifying and filtering and PWM (pulse width modulation) backflow prevention circuit, a charging data comprehensive management circuit and a direct current output circuit which are electrically connected in sequence, wherein the connection mode of the direct current output circuit and a charged device comprises any combination of I2C, I2S, SPI, UART and CAN charging protocols, and is compatible with Type-C, DFP, PD2.0/3.0, PPS, QC3.0/2.0, FCP, SC, PMTK +1.1/2.0/Apple 24A, Samsung 2A and other quick charging protocols. The intelligent quick charging circuit framework can actively adapt to various digital interface protocols, actively completes data learning between the charging equipment and the charged equipment by exchanging data with the charged equipment, and intelligently provides data such as charging voltage, current, charging time, temperature, fault protection and the like required by the charged equipment.

Description

Intelligent quick-charging circuit framework

Technical Field

The invention relates to a charging circuit, in particular to an intelligent quick-charging circuit architecture.

Background

The consumption and the demand of the electric quantity caused by the intelligent electronic equipment are suddenly increased, the analog quick charging circuit is better and more expensive, and the problem of slow charging is solved. However, due to the fact that the types and the models of intelligent electronic products are various and complicated, a plurality of new problems occur in the compatibility of the charger, and the traditional quick charging circuit adopts analog feedback, and has the problems of large error, slow response, poor precision, high energy consumption, serious heating and the like.

Chinese patent application No. 2019203332064 proposes an automatic recognition fast-charging wall plug-in charger, but the fast-charging charger circuit design is complicated to can't realize digital control mode and analog control mode, the agreement that supports is limited, and the in-service use is limited more, can not adapt to current intelligent fast-charging market demand.

In view of this, there is a need to develop a digital fast charging circuit which has a reasonable circuit design and a simple structure, automatically adapts to various digital interface protocols, can realize fast charging and accurate fast charging of different intelligent terminal devices, saves time and power, effectively reduces heat in the working process of the circuit, and improves the safety and reliability of the system.

Disclosure of Invention

The invention aims to provide an intelligent quick charging circuit architecture, and the technical scheme of the invention is as follows:

the utility model provides an intelligence quick charging circuit framework, including electric connection's AC input circuit in proper order, the EMC circuit, rectification filter circuit, still include electric connection's power conversion control circuit in proper order, power conversion control circuit outputs high frequency AC voltage to isolation step-down circuit, isolation step-down circuit converts high frequency AC voltage into high frequency low voltage and then outputs to synchronous rectification filter and PWM anti-backflow circuit, further output DC voltage and electric current to charging data integrated management circuit and DC output circuit after the processing, wherein charging data integrated management circuit electric connection is between power conversion control circuit and synchronous rectification filter and PWM anti-backflow circuit, this charging data integrated management circuit adjusts the charging voltage, charging current and the length of time of charging with being charged equipment matching.

Furthermore, the connection mode of the direct current output circuit and the charged device comprises any combination of I2C, I2S, SPI, UART and CAN charging protocols.

Furthermore, the charging data integrated management circuit further comprises an MCU subunit, an ENCODER subunit and an ERROM subunit.

Further, the MCU subunit stores Type-C, DFP, PD2.0/3.0, PPS, QC3.0/2.0, FCP, SCP, PMTK +1.1/2.0/Apple 2.4A, and Samsung 2A digital interface protocol arbitrary combination.

The intelligent quick charging circuit framework can actively adapt to various digital interface protocols, actively completes data learning between the charging equipment and the charged equipment by exchanging data with the charged equipment, intelligently provides charging voltage, current, charging time, temperature, fault protection and other data required by the charged equipment, stores and memorizes the charging data of the charged equipment, can realize quick charging of different intelligent terminal equipment, can realize accurate quick charging, saves time and electric power, and improves the safety degree and reliability of the system.

Drawings

FIG. 1: the intelligent quick charging circuit structure of the invention forms a module diagram.

Detailed Description

The present invention will be described in further detail with reference to examples and drawings, but the present invention is not limited to these examples.

Referring to fig. 1, the intelligent fast charging circuit structure of the present invention is a block diagram, which mainly comprises an ac input circuit 101, an EMC circuit 102, a rectifying filter circuit 103, a power conversion control circuit 104, an isolation step-down circuit 105, a synchronous rectifying filter and PWM anti-backflow circuit 106, a charging data comprehensive management circuit 107 and a dc output circuit 108, which are electrically connected in sequence, wherein the charging data comprehensive management circuit 107 is electrically connected between the power conversion control circuit 104 and the synchronous rectifying filter and PWM anti-backflow circuit 106, and the connection mode between the dc output circuit 108 and the charged device includes any combination of I2C, I2S, SPI, UART, and CAN charging protocols.

The intelligent quick charging circuit framework of the invention has the following working process:

an external alternating current commercial power supply enters an alternating current input circuit 101, enters an intelligent quick charging circuit, is corrected by an EMC circuit 102, flows into a rectifying and filtering circuit 103 to become a DC-like voltage, further flows into a power conversion control circuit 104 to process and output a high-frequency alternating current voltage to an isolation voltage-reducing circuit 105, the isolation voltage-reducing circuit 105 converts the high-frequency alternating current voltage into a safe high-frequency low voltage and then further inputs the safe high-frequency low voltage to a synchronous rectifying, filtering and PWM (pulse width modulation) anti-backflow circuit 106 to output a DC voltage and a current meeting design requirements, meanwhile, the synchronous rectifying, filtering and PWM anti-backflow circuit 106 regulates a charging voltage, a charging current and a charging duration matched with a charged device according to a charging data comprehensive management circuit 107 and prevents the current from flowing backwards to damage the charged device, the charging data comprehensive management circuit 107 has the capability of being controlled by data communication of a later-stage circuit, an MCU (MCU, micro Control Unit) subunit, ENCODER subunit, FLASH subunit and ERROM subunit form a charging data integrated management system, the MCU subunit stores the current common digital interface protocols of Type-C, DFP, PD2.0/3.0, PPS, QC3.0/2.0, FCP, SC, PMTK +1.1/2.0/Apple 24A, Samsung 2A and the like, the digital interface protocols are automatically initialized and reset under the voltage of a supply power, the voltage and the current of the supply power are detected, the data communication is carried out with the supply power and the connected charged equipment, the collection and the detection of the data flow are ensured to be real and effective, the data signals are programmed and communicated and further stored in the ERROM subunit, the charging data integrated management circuit 107 can display the collected charging data on a terminal display device, the charging protocol Type of the charged equipment can be displayed through a USB or TYPE-C interface, and finally, the charging data conforming to the safety can be output through a DC output circuit 108, And a direct current power supply required by quick charging.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and all the modifications, variations and equivalent structural changes that can be made by a person skilled in the art in a limited number of experiments or according to the technical spirit of the present invention are within the protection scope of the present invention.

Claims

1. An intelligent quick charging circuit architecture comprises an alternating current input circuit (101), an EMC circuit (102) and a rectifying and filtering circuit (103) which are electrically connected in sequence, and is characterized by further comprising a power conversion control circuit (104) which is electrically connected in sequence, wherein the power conversion control circuit (104) outputs high-frequency alternating current voltage to an isolation voltage reduction circuit (105), the isolation voltage reduction circuit (105) converts the high-frequency alternating current voltage into high-frequency low voltage and outputs the high-frequency low voltage to a synchronous rectification filtering and PWM anti-backflow circuit (106), and further outputs direct current voltage and current to a charging data comprehensive management circuit (107) and a direct current output circuit (108) after processing, wherein the charging data comprehensive management circuit (107) is electrically connected between the power conversion control circuit (104) and the synchronous rectification filtering and PWM anti-backflow circuit (106), and the charging data comprehensive management circuit (107) adjusts charging voltage matched with charged equipment, Charging current and charging duration.

2. The intelligent fast charging circuit architecture as claimed in claim 1, wherein the connection mode of the direct current output circuit (108) and the charged device comprises I²C、I²And any combination of S, SPI, UART and CAN charging protocols.

3. The intelligent fast charging circuit architecture as claimed in claim 1, wherein the charging data integrated management circuit (107) further comprises an MCU subunit, an ENCODER subunit and an errm subunit.