CN211785939U

CN211785939U - Chip testing device

Info

Publication number: CN211785939U
Application number: CN202020175626.7U
Authority: CN
Inventors: 冯海洋
Original assignee: Xiamen Runji Integrated Circuit Technology Co ltd
Current assignee: Xiamen Runji Integrated Circuit Technology Co ltd
Priority date: 2020-02-17
Filing date: 2020-02-17
Publication date: 2020-10-27
Anticipated expiration: 2030-02-17

Abstract

The utility model discloses a testing arrangement of chip, include: testing the module board; the chip testing seat is used for placing a chip to be tested; the packaging conversion plate is detachably clamped between the test module plate and the chip test seat and is respectively and electrically connected with the test module plate and the chip test seat; the chip to be tested can be electrically connected to the chip test seat and the test module board through the packaging conversion board so as to realize the detection of the chip to be tested. The utility model discloses can change the encapsulation change-over board according to the chip that awaits measuring of different encapsulation, and need not make different volume production to the different chip that awaits measuring of the basic unanimous encapsulation of function and survey the test panel, greatly reduced the test cost.

Description

Chip testing device

Technical Field

The utility model relates to an electronic product test technical field especially relates to a testing arrangement of chip.

Background

Semiconductor chips are the cornerstone of the information age and the highest point of manufacture in the modern times. Chip fabrication has entered the era of mass production of 10 nm to 7 nm devices. Chip production requires hundreds of processes, and errors in any one step can result in device failure. Therefore, the chip detection link is of great importance, and the adoption of good chip testing equipment and method is one of the keys for improving the chip manufacturing level.

At present, only a general mass production test board and a specific mass production test board are available in the market. The universal mass production test board is manufactured by a tester or a manufacturer of manufacturing test boards according to the current market demand, can be used for testing A-type packaging chips designed by different chip designers, and has basically consistent functions; the specific test board for mass production is a test board specially manufactured by a chip designer for a B-type packaged chip designed by the chip designer, and the test board can only be used for testing the B-type packaged chip designed by the designer. These mass production testing methods are all for the a1 type packaged chips and the a2 type packaged chips with basically the same functions, and the chip design manufacturers need to purchase or design two mass production testing boards, which results in increasing the testing cost.

SUMMERY OF THE UTILITY MODEL

To the above problem, an object of the utility model is to provide a testing arrangement of chip can change the encapsulation change-over board according to the chip that awaits measuring of different encapsulation, and need not make different volume production survey test panels to the different chips that await measuring of the basic unanimous encapsulation of function, has greatly reduced test cost.

The embodiment of the utility model provides a testing arrangement of chip, include:

testing the module board;

the chip testing seat is used for placing a chip to be tested;

the packaging conversion plate is detachably clamped between the test module plate and the chip test seat and is respectively and electrically connected with the test module plate and the chip test seat;

the chip to be tested can be electrically connected to the chip test seat and the test module board through the packaging conversion board so as to realize the detection of the chip to be tested.

Preferably, the chip to be tested is provided with a chip pin; the test module board is provided with a transition port used for electrically connecting the packaging conversion board and a connection port which is electrically connected with the transition port and exposed; the chip pins can be electrically connected to the transition ports through the package conversion board.

Preferably, the chip test socket is provided with a test pin electrically connected to the package conversion board, and a test port electrically connected to the chip pin of the chip to be tested and the test pin respectively.

Preferably, the test needle penetrates the chip test socket up and down.

Preferably, the package conversion board is provided with a substrate upper port for electrically connecting the test pin of the chip test socket, and a substrate lower port for electrically connecting the transition port.

In the above embodiment, the present invention configures a package conversion board detachably clamped between the test module board and the chip test socket, so that the following chips with the same functions but different packages are more and more, and the package conversion board only needs to be replaced according to the chips to be tested packaged with different packages, and different mass production test boards do not need to be manufactured for the chips to be tested with the basically same functions and different packages, thereby greatly reducing the test cost; on the other hand, the chips to be tested are separated from the previous mass production test board, so that the influence on the previously developed mass production test board can be minimized.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings required for the embodiments will be briefly described below, and obviously, the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic diagram of a testing apparatus for a chip according to an embodiment of the present invention.

Fig. 2 is a schematic structural diagram between the testing apparatus for a chip and the testing control device and the power module according to the embodiment of the present invention.

Fig. 3 is a schematic flowchart of a chip testing method according to an embodiment of the present invention.

Detailed Description

For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.

It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.

The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the embodiments of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination" or "in response to a detection", depending on the context. Similarly, the phrases "if determined" or "if detected (a stated condition or event)" may be interpreted as "when determined" or "in response to a determination" or "when detected (a stated condition or event)" or "in response to a detection (a stated condition or event)", depending on the context.

In the embodiments, the references to "first \ second" are merely to distinguish similar objects and do not represent a specific ordering for the objects, and it is to be understood that "first \ second" may be interchanged with a specific order or sequence, where permitted. It should be understood that "first \ second" distinct objects may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced in sequences other than those illustrated or described herein.

Referring to fig. 1, a first embodiment of the present invention provides a chip testing apparatus, including:

testing the module board 3;

the chip testing seat 1 is used for placing a chip 4 to be tested;

the packaging conversion plate 2 is detachably clamped between the test module plate 3 and the chip test seat 1 and is respectively and electrically connected with the test module plate 3 and the chip test seat 1;

the chip 4 to be tested can be electrically connected to the chip test socket 1 and the test module board 3 through the package conversion board 2, so as to realize the detection of the chip 4 to be tested.

In this embodiment, the test module board 3 is provided with a transition port 31 for electrically connecting the package conversion board 2, and a connection port 32 electrically connecting the transition port 31 and exposed; the chip 4 to be tested is provided with a chip pin A; the chip pin a can be electrically connected to the transition port 31 through the package conversion board 2. It can be understood that the connection port 32 can be connected with a signal for providing a correct signal for the chip pin a of the led chip 4 to be tested during chip testing, and can also be connected with an external power supply for supplying power to the test module board 3. Specifically, as shown in fig. 2, the test control device outputs a control signal to the test module board 3, and then the test signal passes through the test module board 3 outputs the test device, it can be understood that the test control device and the test device may be the same device, here, the utility model discloses no longer describe repeatedly.

In this embodiment, the chip test socket 1 is provided with a test pin 5 of the package adapter, and a test port 11 electrically connecting the chip pin a and the test pin, respectively. Wherein, the test needle 5 vertically penetrates the chip test seat 1.

In the present embodiment, the package adaptor 2 is provided with a substrate upper port 21 for electrically connecting the testing pins 5 of the chip testing socket 1, and a substrate lower port 22 for electrically connecting the transition port 31.

To sum up, the utility model discloses a configuration detachably presss from both sides the encapsulation converter plate between test module board and chip test seat, makes follow-up more and more multi-functional the same but encapsulates different chips, only needs to change the encapsulation converter plate according to the chip that awaits measuring of different encapsulation, and need not make different volume production test panels to the chip that awaits measuring that the function is unanimous basically to encapsulate different, has greatly reduced the test cost; on the other hand, the chips to be tested are separated from the previous mass production test board, so that the influence on the previously developed mass production test board can be minimized.

The utility model discloses the second embodiment:

referring to fig. 3, a second embodiment of the present invention further provides a chip testing method, including:

s1, placing a chip to be tested into a chip test seat, and electrically connecting a chip pin of the chip to be tested with the chip test seat;

s2, mounting the chip test socket on the package conversion plate to electrically connect the chip test socket and the package conversion plate;

s3, the packaging conversion plate is installed on the testing module plate, so that the packaging conversion plate is electrically connected with the testing module plate, the chip to be tested can be electrically connected with the chip testing seat, and the chip to be tested is electrically connected with the testing module plate through the packaging conversion plate, and the detection of the chip to be tested is realized.

In the above embodiment, in a preferred embodiment of the present invention, the step S3 specifically includes:

s31, mounting the package conversion board on a test module board, and electrically connecting the package conversion board and the test module board, so that the chip pins of the chip to be tested are guided to the exposed connection ports of the test module;

s32, setting signals needed by chip testing for the guided chip pins;

and S33, testing the chip pin of the chip to be tested.

In the above embodiment, a preferred embodiment of the present invention further includes:

and S4, when the test of the current chip to be tested is finished, replacing the packaging conversion plate according to the next chip to be tested with different packaging, and then replacing the chip to be tested for testing.

In summary, when the function of a chip to be tested is basically consistent with that of the previous chip to be tested, but the package specifications are different, the current package conversion plate is replaced by the package conversion plate matched with the next chip to be tested, then the connection is completed, and then the test is started.

It should be noted that the above-described device embodiments are merely illustrative, where the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. In addition, in the drawings of the embodiment of the apparatus provided by the present invention, the connection relationship between the modules indicates that there is communication connection between them, and specifically, the connection relationship can be implemented as one or more communication buses or signal lines. One of ordinary skill in the art can understand and implement it without inventive effort.

The foregoing is a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations are also considered as the protection scope of the present invention.

Claims

1. An apparatus for testing a chip, comprising:

testing the module board;

the chip testing seat is used for placing a chip to be tested;

2. The device for testing the chip according to claim 1, wherein the chip to be tested is provided with chip pins; the test module board is provided with a transition port used for electrically connecting the packaging conversion board and a connection port which is electrically connected with the transition port and exposed; the chip pins can be electrically connected to the transition ports through the package conversion board.

3. The apparatus for testing chips of claim 2, wherein the chip testing socket is provided with testing pins electrically connected to the package adapter board, and testing ports electrically connected to the chip pins and the testing pins of the chip to be tested, respectively.

4. The apparatus for testing a chip of claim 3, wherein the testing pins extend up and down through the chip testing socket.

5. The device for testing chips of claim 3, wherein the package adaptor is provided with an upper substrate port for electrically connecting the test pins of the chip test socket and a lower substrate port for electrically connecting the transition port.