CN204203420U - A kind of measurement jig of test b GA packaged chip high-speed bus - Google Patents
A kind of measurement jig of test b GA packaged chip high-speed bus Download PDFInfo
- Publication number
- CN204203420U CN204203420U CN201420655497.6U CN201420655497U CN204203420U CN 204203420 U CN204203420 U CN 204203420U CN 201420655497 U CN201420655497 U CN 201420655497U CN 204203420 U CN204203420 U CN 204203420U
- Authority
- CN
- China
- Prior art keywords
- pcb board
- sma connector
- high speed
- measurement jig
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000005259 measurement Methods 0.000 title claims abstract description 30
- 238000012360 testing method Methods 0.000 title claims abstract description 29
- 229910000679 solder Inorganic materials 0.000 claims abstract description 26
- 239000003990 capacitor Substances 0.000 claims abstract description 18
- 230000002093 peripheral effect Effects 0.000 claims abstract description 5
- 239000000463 material Substances 0.000 claims description 3
- 238000013461 design Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 5
- 230000004044 response Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000006855 networking Effects 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
Abstract
The utility model discloses a kind of measurement jig of test b GA packaged chip high-speed bus, belong to measurement jig, the utility model tool will solve the problem that chip bga is connected with network analyzer without high speed test interface.Technical scheme is: this measurement jig comprises pcb board, SMA connector, filter capacitor, pad, pcb board front is provided with SMA connector, filter capacitor, the pcb board back side is provided with pad, SMA connector is arranged on the peripheral part in pcb board front, filter capacitor is arranged on pcb board front central part, pad is provided with high speed signal solder joint, high speed signal solder joint is connected to SMA connector by the internal wiring of pcb board, high speed signal solder joint and SMA connector one_to_one corresponding.
Description
Technical field
The utility model relates to a kind of measurement jig, specifically a kind of measurement jig of test b GA packaged chip high-speed bus.
Background technology
Integrated circuit adopts semiconductor fabrication process, and the monocrystalline silicon piece of a piece less makes many transistors and the components and parts such as resistor, capacitor, and according to the method for multilayer wiring or tunnel wiring, components and parts are combined into complete electronic circuit.The full name of BGA is the PCB of Ball Grid Array(ball grid array structure), it is a kind of package method that integrated circuit adopts organic support plate, spherical salient point is produced in order to replace pin by presentation at the back side of printed base plate, at the front of printed base plate assembling LSI chip, then seal with mold pressing resin or encapsulating method.BGA has: 1., package area is few; 2., function strengthen, number of pins increases; 3., pcb board molten weldering time can oneself placed in the middle, Yi Shangxi; 4., reliability is high; 5., good electrical property, the features such as holistic cost is low.
At present, the transfer rate of signal is more and more higher, and from strength to strength, pin multi-density is high for chip functions.Chip and design on board level are debugged, test is more and more important, and high speed signal test becomes design difficulty.In chip design and design on board level, grasp the true loss situation of chip interconnect passage, rebalancing method debugging is added to chip, and grasp chip and design on board level main points are necessary.Testing based on actual plate level interconnecting channels is obtain real channel loss, and utilizes high speed test interface to carry out chip debugging, is the best approach of test for high speed signal debugging.But for chip bga Networking Design, pin is numerous, be difficult on PCB, leave high speed test interface.So just need to find a kind of accuracy both having ensured to test, again eaily measurement jig (measurement jig belongs to a classification below tool, special a kind of tool that the function, the calibration of power, life-span, performance etc. of product are tested, tested), use measurement jig to assist chip bga to debug, test.
Summary of the invention
Technical assignment of the present utility model is for above weak point, provides one to facilitate test b GA packaged chip, can the measurement jig of accurate a kind of test b GA packaged chip high-speed bus of the interconnected performance of test board level.
The utility model solves the technical scheme that its technical matters adopts:
A kind of measurement jig of test b GA packaged chip high-speed bus, this measurement jig comprises pcb board, SMA connector, filter capacitor, pad, pcb board front is provided with SMA connector, filter capacitor, the pcb board back side is provided with pad, SMA connector is arranged on the peripheral part in pcb board front, filter capacitor is arranged on pcb board front central part, pad is provided with high speed signal solder joint, high speed signal solder joint is connected to SMA connector by the internal wiring of pcb board, high speed signal solder joint and SMA connector one_to_one corresponding.
Pcb board is the pcb board of 4 layers.
Pcb board adopts the pcb board of low-loss high speed sheet material.
SMA connector is provided with 2 ~ 64, and the number of high speed signal solder joint is consistent with the number of SMA connector, and high speed signal solder joint and SMA connector are connected one to one by the internal wiring of pcb board.
Compared to the prior art the measurement jig of a kind of test b GA packaged chip high-speed bus of the present utility model, has the following advantages:
When 1, using, the solder joint of the high speed signal path of tested chip bga is soldered to the high speed signal solder joint of this measurement jig, the SMA connector of this measurement jig is connected to network analyzer, chip bga is tested, solve the problem that chip bga is connected with network analyzer without high speed test interface, facilitate test b GA packaged chip;
2, the design of filter capacitor, can strengthen the test accuracy of measurement jig;
3, measurement jig front mark word, the tested port information of accurate response.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the utility model is further illustrated.
Accompanying drawing 1 is a kind of front view of measurement jig of test b GA packaged chip high-speed bus;
Accompanying drawing 2 is the upward view of Fig. 1.
In figure: 1, pcb board, 2, SMA connector, 3, filter capacitor, 4, pad, 5, high speed signal solder joint.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Embodiment 1:
The measurement jig of a kind of test b GA packaged chip high-speed bus of the present utility model, its structure comprises pcb board 1, SMA connector 2, filter capacitor 3, pad 4, pcb board 1 front is provided with SMA connector 2, filter capacitor 3, pcb board 1 back side is provided with pad 4, SMA connector 2 is arranged on the peripheral part in pcb board 1 front, filter capacitor 3 is arranged on pcb board 1 front central part, pad 4 is provided with high speed signal solder joint, high speed signal solder joint 5 is connected to SMA connector 2 by the internal wiring of pcb board 1, high speed signal solder joint 5 and SMA connector 2 one_to_one corresponding.
During use, the solder joint of the high speed signal path of tested chip bga is soldered to the high speed signal solder joint 5 of this measurement jig, the SMA connector 2 of this measurement jig is connected to network analyzer or oscillograph, chip bga is tested.
Embodiment 2:
The measurement jig of a kind of test b GA packaged chip high-speed bus of the present utility model, its structure comprises pcb board 1, SMA connector 2, filter capacitor 3, pad 4, pcb board 1 front is provided with SMA connector 2, filter capacitor 3, pcb board 1 back side is provided with pad 4, SMA connector 2 is arranged on the peripheral part in pcb board 1 front, filter capacitor 3 is arranged on pcb board 1 front central part, pad 4 is provided with high speed signal solder joint, high speed signal solder joint 5 is connected to SMA connector 2 by the internal wiring of pcb board 1, high speed signal solder joint 5 and SMA connector 2 one_to_one corresponding.
Pcb board 1 is the pcb board 1 of 4 layers.
Pcb board 1 adopts the pcb board 1 of low-loss high speed sheet material.Should be noted and reduce cabling layer-exchange hole-through as far as possible, reduce path, avoid the loss of measurement jig test path and reflect excessive, affecting measuring accuracy.
Measurement jig front mark word, the tested port information of accurate response.
SMA connector 2 is provided with 40, and high speed signal solder joint 5 has 32, and high speed signal solder joint 5 and SMA connector 2 are connected one to one by the internal wiring of pcb board 1.
By embodiment above, described those skilled in the art can be easy to realize the utility model.But should be appreciated that the utility model is not limited to 2 kinds of above-mentioned embodiments.On the basis of disclosed embodiment, described those skilled in the art can the different technical characteristic of combination in any, thus realizes different technical schemes.
Claims (4)
1. the measurement jig of a test b GA packaged chip high-speed bus, it is characterized in that this measurement jig comprises pcb board, SMA connector, filter capacitor, pad, pcb board front is provided with SMA connector, filter capacitor, the pcb board back side is provided with pad, SMA connector is arranged on the peripheral part in pcb board front, filter capacitor is arranged on pcb board front central part, pad is provided with high speed signal solder joint, high speed signal solder joint is connected to SMA connector by the internal wiring of pcb board, high speed signal solder joint and SMA connector one_to_one corresponding.
2. the measurement jig of a kind of test b GA packaged chip high-speed bus according to claim 1, is characterized in that pcb board is the pcb board of 4 layers.
3. the measurement jig of a kind of test b GA packaged chip high-speed bus according to claim 1, is characterized in that pcb board adopts the pcb board of low-loss high speed sheet material.
4. the measurement jig of a kind of test b GA packaged chip high-speed bus according to claim 1, it is characterized in that SMA connector is provided with 2 ~ 64, the number of high speed signal solder joint is consistent with the number of SMA connector, and high speed signal solder joint and SMA connector are connected one to one by the internal wiring of pcb board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420655497.6U CN204203420U (en) | 2014-11-05 | 2014-11-05 | A kind of measurement jig of test b GA packaged chip high-speed bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420655497.6U CN204203420U (en) | 2014-11-05 | 2014-11-05 | A kind of measurement jig of test b GA packaged chip high-speed bus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204203420U true CN204203420U (en) | 2015-03-11 |
Family
ID=52661365
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420655497.6U Expired - Fee Related CN204203420U (en) | 2014-11-05 | 2014-11-05 | A kind of measurement jig of test b GA packaged chip high-speed bus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204203420U (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105067846A (en) * | 2015-08-10 | 2015-11-18 | 深圳市共进电子股份有限公司 | BGA package chip test clamp |
| CN105391603A (en) * | 2015-12-17 | 2016-03-09 | 迈普通信技术股份有限公司 | A system and method for testing 10-gigabit electrical signals |
| CN106771405A (en) * | 2017-01-06 | 2017-05-31 | 中国船舶重工集团公司第七0九研究所 | A kind of spherical grid array integrated circuit interface adapter |
| CN108829550A (en) * | 2018-06-01 | 2018-11-16 | 曙光信息产业(北京)有限公司 | The test fixture of AMD platform |
| CN111384609A (en) * | 2018-12-28 | 2020-07-07 | 中兴通讯股份有限公司 | Interconnection device for chip and backplane connector |
| CN114078566A (en) * | 2020-08-14 | 2022-02-22 | 长鑫存储技术有限公司 | Test fixture |
-
2014
- 2014-11-05 CN CN201420655497.6U patent/CN204203420U/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105067846A (en) * | 2015-08-10 | 2015-11-18 | 深圳市共进电子股份有限公司 | BGA package chip test clamp |
| CN105391603A (en) * | 2015-12-17 | 2016-03-09 | 迈普通信技术股份有限公司 | A system and method for testing 10-gigabit electrical signals |
| CN105391603B (en) * | 2015-12-17 | 2019-06-21 | 迈普通信技术股份有限公司 | A kind of system and method for testing 10,000,000,000 electric signals |
| CN106771405A (en) * | 2017-01-06 | 2017-05-31 | 中国船舶重工集团公司第七0九研究所 | A kind of spherical grid array integrated circuit interface adapter |
| CN108829550A (en) * | 2018-06-01 | 2018-11-16 | 曙光信息产业(北京)有限公司 | The test fixture of AMD platform |
| CN111384609A (en) * | 2018-12-28 | 2020-07-07 | 中兴通讯股份有限公司 | Interconnection device for chip and backplane connector |
| CN114078566A (en) * | 2020-08-14 | 2022-02-22 | 长鑫存储技术有限公司 | Test fixture |
| US11933815B2 (en) | 2020-08-14 | 2024-03-19 | Changxin Memory Technologies, Inc. | Test fixture |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN204203420U (en) | A kind of measurement jig of test b GA packaged chip high-speed bus | |
| CN102095946B (en) | General electrical testing device for packaging structures | |
| CN106771987A (en) | A kind of IC chip ageing tester and method of testing based on mother baby plate | |
| CN103487744B (en) | A kind of dynamically EMMI system and its implementation and methods for using them | |
| CN104316859A (en) | Chip testing equipment with high universality | |
| CN105067846A (en) | BGA package chip test clamp | |
| CN215833546U (en) | Semiconductor power module switching test structure | |
| CN101750578A (en) | Automatic test system for integrated circuit board electrodes | |
| Tsai et al. | An experimental technique for full package inductance matrix characterization | |
| CN206274329U (en) | Test accessory part and test accessory plate | |
| CN103760388A (en) | Four-wire test fixture and test method thereof | |
| CN105977180A (en) | Semiconductor packaging component with test structure and test method of semiconductor packaging component | |
| CN112462178B (en) | Test structure and test method for S parameters of chip socket | |
| CN203688599U (en) | Four-wire test fixture | |
| CN105575836A (en) | Test device | |
| CN105301516A (en) | Jig and method convenient for testing BGA chip power supply | |
| CN202929164U (en) | Testing arrangement and probe structure thereof | |
| CN205067680U (en) | Bga chip testing system | |
| CN105974622B (en) | Liquid crystal display die set and its manufacturing method, electronic device | |
| Smirnov et al. | Methods to ensure reliable contact of super-large integrated circuit with test equipment | |
| CN205093035U (en) | Short circuit resistance packaging structure who is used for measuring among PCB | |
| CN109425810A (en) | Semiconductor test apparatus, semiconductor test system and semiconductor test method | |
| CN107908912A (en) | A kind of automatic method for checking line power and being connected to ground | |
| CN103455400A (en) | Method for testing SMI2 (intel scalable memory interface 2) signals of internal memory | |
| CN207571257U (en) | Multichannel transistor array testing auxiliary device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150311 Termination date: 20151105 |
|
| EXPY | Termination of patent right or utility model |