CN211606501U - Matching network for ultra-wideband chip - Google Patents
Matching network for ultra-wideband chip Download PDFInfo
- Publication number
- CN211606501U CN211606501U CN202020438475.XU CN202020438475U CN211606501U CN 211606501 U CN211606501 U CN 211606501U CN 202020438475 U CN202020438475 U CN 202020438475U CN 211606501 U CN211606501 U CN 211606501U
- Authority
- CN
- China
- Prior art keywords
- inductor
- electrically connected
- ultra
- chip
- branch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
The application discloses a matching network for an ultra-wideband chip. The matching network has a first end and a second end, the first end is electrically connected to the first end a of the impedance matching unit, and the second end b of the impedance matching unit is electrically connected to the second end. One end of the first capacitor is electrically connected to the first end and the first end a of the impedance matching unit, and the other end of the first capacitor d is electrically grounded. One end of the resistor is electrically connected with the second end and the second end b of the impedance matching unit, and the other end of the resistor is electrically grounded. The impedance matching unit comprises a first inductor, a second inductor and a second capacitor, wherein a first branch I1 where the second inductor and the second capacitor are electrically connected in series is electrically connected in parallel with a second branch I2 where the first inductor is located. The LC matching network designed in this way can be applied to occasions with high requirements on the bandwidth and linearity application of an electric chip.
Description
Technical Field
The application relates to the technical field of chips, in particular to a matching network for an ultra-wideband chip.
Background
As chip technology advances, its bandwidth gradually increases, and operating a high-speed electrical chip means that a high bandwidth and a broadband impedance matched to the high bandwidth are required. The input/output matching circuit of the matching network of the existing low-bandwidth chip of broadband impedance matched with the chip at present is relatively simple as shown in fig. 1, and for a low-frequency circuit (the bandwidth is usually less than 10GHz), the conventional structure of the low-frequency circuit mostly adopts a simple resistor R, an inductor L or a capacitor C; the inductor is usually composed of a transmission line or an inductor; the function of the impedance matching circuit is to improve the impedance consistency of different frequencies through LC matching. Because the development of the ultra-wideband and multi-modulation modes of optical communication gradually puts forward higher requirements on the bandwidth and the linearity of an electric chip, the existing matching circuit cannot meet the requirement of the ultra-wideband chip on operation.
Therefore, there is a need for an improvement over existing matching networks.
SUMMERY OF THE UTILITY MODEL
To overcome the above-mentioned drawbacks, the present application aims to: a (LC) matching network for an ultra-wideband chip is provided, which can be applied to the situation that the broadband is more than 10GHz, and has good impedance continuity.
In order to solve the technical problem, the following technical scheme is adopted in the application:
a matching network for an ultra-wideband chip, having:
a first end and a second end, wherein,
the first end is electrically connected with the first end a of the impedance matching unit, and the second end b of the impedance matching unit is electrically connected with the second end;
one end of the first capacitor is electrically connected with the first end and the first end a of the impedance matching unit,
the other end of the first capacitor is electrically grounded;
one end of the resistor is electrically connected with the second end and the second end b of the impedance matching unit, the other end of the resistor is electrically grounded,
the impedance matching unit includes: a first branch I1 and a second branch I2,
the first branch I1 includes a second inductor Lp and a second capacitor Cp electrically connected in series,
the second branch I2 includes a first inductor L1, and the first branch I1 and the second branch I2 are electrically connected in parallel. By the design, the LC matching network can be applied to the occasions with the bandwidth exceeding 10GHz (for example, the occasions with the bandwidth exceeding 40 GHz).
Preferably, the second branch I2 includes at least one first inductor L1.
Preferably, the inductance of the first inductor L1 is between 50pH and 500 pH.
Preferably, the first branch I1 includes at least one second inductor Lp and at least one second capacitor Cp.
Preferably, the inductance value of the second inductor Lp is between 30pH and 500 pH.
Preferably, the second capacitor Cp has a capacitance value of 20pF to 300 pF.
Preferably, the first inductor L1, the second inductor Lp and the second capacitor Cp are integrated on a chip.
Preferably, the first capacitor is integrated in a chip.
Advantageous effects
For the scheme among the prior art, the beneficial effect of this application:
the matching network for the ultra-wideband chip has a simple topological structure, and can be applied to occasions with the bandwidth exceeding 10GHz (such as occasions with the bandwidth exceeding 40 GHz) to have better impedance matching.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:
FIG. 1 is a prior art I/O matching circuit topology for a low bandwidth chip;
fig. 2 and fig. 3 are schematic diagrams of input/output matching circuit topologies of a high/ultra-wideband chip according to an embodiment of the present application.
Detailed Description
The above-described scheme is further illustrated below with reference to specific examples. It should be understood that these examples are for illustrative purposes and are not intended to limit the scope of the present application. The conditions used in the examples may be further adjusted according to the conditions of the particular manufacturer, and the conditions not specified are generally the conditions in routine experiments. In the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details.
In some instances, methods, means, elements and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present disclosure. The drawings include schematic drawings, and the scale and the aspect ratio of each component may be different from those of the actual components.
The matching network for the ultra-wideband chip, also called as an LC matching network, has a simple topological structure. Preferably, the impedance matching circuit can be used for an ultra-wideband chip (such as the situation that the bandwidth exceeds 10GHz, even the bandwidth exceeds 40 GHz) to have better impedance matching. Although it can be used in existing low frequency applications.
The matching network for the ultra-wideband chip proposed in the present application is described in detail below with reference to the accompanying drawings.
Fig. 2 is a diagram illustrating a matching network for an ultra-wideband chip proposed by the present application.
The matching network has a first end and a second end,
the first terminal (input terminal) is electrically connected to the first terminal a of the impedance matching unit, and the second terminal b of the impedance matching unit is electrically connected to the second terminal (output terminal).
One end of the first capacitor C _ pad is electrically connected to the first end and the first end a of the impedance matching unit, and the other end of the first capacitor C _ pad is electrically grounded. One end of the resistor R _ rf is electrically connected with the second end and the second end b of the impedance matching unit, and the other end of the resistor R _ rf is electrically grounded.
The impedance matching unit comprises a first inductor L1, a second inductor Lp, and a second capacitor Cp, wherein,
the first branch I1, in which the second inductor Lp is electrically connected in series with the second capacitor Cp, is electrically connected in parallel with the second branch I2, in which the first inductor L1 is located. Therefore, the first branch I1 and the second branch I2 are electrically connected in parallel, so that the impedance flatness is good in high-frequency occasions. Preferably, the inductance of the first inductor L1 is between 50pH and 500 pH. The inductance value of the second inductor Lp is between 30 and 500 pH. The capacitance value of the second capacitor Cp is between 20pF and 300 pF. Therefore, the LC matching network can be applied to occasions with high requirements on the bandwidth and linearity application of an electric chip.
In one embodiment, as shown in fig. 3, the difference between the embodiment of fig. 2 and the first branch I1 is that the second inductor Lp and the second capacitor Cp are in different order, and this design improves the impedance flatness of the LC matching network in some high frequency applications.
In one embodiment, the first branch I1 and the second branch I2 are connected in parallel, the first branch I1 includes a second inductor Lp and a second capacitor Cp, and the second branch I2 includes a first inductor L1. The first inductor L1, the second inductor Lp, and the second capacitor Cp may be equivalent, and in a specific embodiment, may be represented by equivalent components.
In one embodiment, the impedance matching unit includes a first inductor L1, a second inductor Lp, and a second capacitor Cp integrated into a chip, thereby reducing the package size.
In one embodiment, the impedance matching unit and the first capacitor are integrated into a chip, which reduces the package size.
In one embodiment, the impedance matching unit, the first capacitor and the resistor are integrated into a chip, which reduces the package size.
It should be noted that, in the present application, the terms "upper", "lower", "inner", "middle", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation.
The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
The above embodiments are merely illustrative of the technical concepts and features of the present application, and the purpose of the embodiments is to enable those skilled in the art to understand the content of the present application and implement the present application, and not to limit the protection scope of the present application. All equivalent changes and modifications made according to the spirit of the present application are intended to be covered by the scope of the present application.
Claims (8)
1. A matching network for an ultra-wideband chip, having:
a first end and a second end, wherein,
the first end is electrically connected with the first end a of the impedance matching unit, and the second end b of the impedance matching unit is electrically connected with the second end;
one end of the first capacitor is electrically connected with the first end and the first end a of the impedance matching unit,
the other end of the first capacitor is electrically grounded;
one end of the resistor is electrically connected with the second end and the second end b of the impedance matching unit, the other end of the resistor is electrically grounded,
the impedance matching unit includes: a first branch I1 and a second branch I2,
the first branch I1 includes a second inductor Lp and a second capacitor Cp electrically connected in series,
the second branch I2 comprises a first inductance L1,
the first branch I1 and the second branch I2 are electrically connected in parallel.
2. The matching network for an ultra-wideband chip as claimed in claim 1, wherein said second branch I2 contains at least one of said first inductances L1.
3. The matching network for an ultra-wideband chip as recited in claim 2, wherein the inductance value of said first inductor L1 is between 50pH and 500 pH.
4. The matching network for an ultra-wideband chip as claimed in claim 1, wherein said first branch I1 comprises at least one of said second inductance Lp and at least one of said second capacitance Cp.
5. The matching network for an ultra-wideband chip as claimed in claim 1, wherein said second inductance Lp has an inductance value between 30pH and 500 pH.
6. The matching network for an ultra-wideband chip as claimed in claim 1, wherein said second capacitance Cp has a capacitance value in the range of 20pF to 300 pF.
7. The matching network for an ultra-wideband chip as claimed in claim 1, wherein said first inductor L1, said second inductor Lp, and said second capacitor Cp are integrated in the chip.
8. The matching network for an ultra-wideband chip of claim 1, wherein said first capacitance is integrated in the chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020438475.XU CN211606501U (en) | 2020-03-30 | 2020-03-30 | Matching network for ultra-wideband chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020438475.XU CN211606501U (en) | 2020-03-30 | 2020-03-30 | Matching network for ultra-wideband chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211606501U true CN211606501U (en) | 2020-09-29 |
Family
ID=72583092
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020438475.XU Active CN211606501U (en) | 2020-03-30 | 2020-03-30 | Matching network for ultra-wideband chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211606501U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114244308A (en) * | 2021-12-27 | 2022-03-25 | 苏州芈图光电技术有限公司 | kHz-100 GHz on-chip integrated capacitor DC coupling circuit |
-
2020
- 2020-03-30 CN CN202020438475.XU patent/CN211606501U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114244308A (en) * | 2021-12-27 | 2022-03-25 | 苏州芈图光电技术有限公司 | kHz-100 GHz on-chip integrated capacitor DC coupling circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110808716A (en) | Doherty radio frequency power amplifier and output matching network structure thereof | |
| JPH11274369A (en) | Semiconductor device | |
| CN211606501U (en) | Matching network for ultra-wideband chip | |
| CN110061333B (en) | Microwave electrically tunable band-stop filter with high suppression degree and wide tuning range | |
| CN106992696B (en) | High-efficiency rectifying circuit based on complex impedance compression technology | |
| CN111884615A (en) | High-order broadband input impedance matching network and application thereof | |
| CN211455723U (en) | Chip integrated with DC coupling capacitor | |
| CN217789977U (en) | Radio frequency interface circuit | |
| CN206272580U (en) | Directive overrurrent relay coupler and RF front-end module | |
| CN114826173A (en) | Radio frequency power device and electronic equipment | |
| CN111313856A (en) | Chip integrated with DC coupling capacitor | |
| CN210489791U (en) | Gallium arsenide low-pass filter | |
| CN209232784U (en) | A kind of GaN microwave power device comprising π type matching network | |
| CN115118242A (en) | Amplitude limiter | |
| CN112787605A (en) | Power device based on integrated internal matching circuit and processing method thereof | |
| CN211457097U (en) | Chip integrated with DC coupling capacitor | |
| CN111565031A (en) | Absorption type amplitude limiter | |
| CN110830084B (en) | Phase coupling driving circuit of power line carrier communication system | |
| CN216414267U (en) | Multiband filter based on PIN diode characteristic | |
| CN2424577Y (en) | Super-broadbard GaAs one-chip digital simulation phase shifter | |
| CN216488426U (en) | Miniaturized high-performance duplexer | |
| CN212343741U (en) | Absorption type amplitude limiter | |
| CN112332785B (en) | Balanced and stable matching circuit of ultra wide band microwave amplifier | |
| CN219659721U (en) | Bidirectional receiving and transmitting serial port module | |
| CN218242254U (en) | Electronic device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |