CN211555895U

CN211555895U - Thyristor

Info

Publication number: CN211555895U
Application number: CN201922327709.3U
Authority: CN
Inventors: 周继峰; 何磊; 张环
Original assignee: Littelfuse Semiconductor (Wuxi) Co Ltd
Current assignee: Littelfuse Semiconductor (Wuxi) Co Ltd
Priority date: 2019-12-20
Filing date: 2019-12-20
Publication date: 2020-09-22
Anticipated expiration: 2029-12-20

Abstract

The embodiment of the utility model discloses thyristor, this thyristor includes: the N-type substrate is provided with a first surface and a second surface opposite to the first surface; in the direction departing from the second surface, a P-type first doping region and a P-type second doping region are sequentially arranged on the first surface side, and the doping concentration of the P-type second doping region is greater than that of the P-type first doping region; in the direction departing from the first surface, a P-type third doping region and a P-type fourth doping region are sequentially arranged on the second surface side, and the doping concentration of the P-type fourth doping region is greater than that of the P-type third doping region. The embodiment of the utility model provides a technical scheme has improved the forward withstand voltage and reverse withstand voltage of thyristor.

Description

Thyristor

Technical Field

The embodiment of the utility model provides a relate to the semiconductor technology field, especially, relate to a thyristor.

Background

The thyristor is a power semiconductor device used in large-capacity power electronic devices, can work under the conditions of high voltage and large current, can control the working process, and is widely applied to electronic circuits such as controllable rectification, alternating current voltage regulation, contactless electronic switches, inversion, frequency conversion and the like.

The withstand voltage value of the thyristor in the prior art is about 600V-1000V, and a thyristor with higher withstand voltage performance is needed urgently at present.

SUMMERY OF THE UTILITY MODEL

In view of this, the embodiment of the utility model provides a thyristor has solved the not high technical problem of the withstand voltage numerical value of thyristor among the prior art.

An embodiment of the utility model provides a thyristor, include:

an N-type substrate having a first surface and a second surface opposite the first surface;

in the direction departing from the second surface, a P-type first doped region and a P-type second doped region are sequentially arranged on the first surface side, and the doping concentration of the P-type second doped region is greater than that of the P-type first doped region;

in the direction departing from the first surface, a P-type third doped region and a P-type fourth doped region are sequentially arranged on the second surface side, and the doping concentration of the P-type fourth doped region is greater than that of the P-type third doped region.

Optionally, the doping concentration of the P-type fourth doping region is equal to the doping concentration of the P-type second doping region; and/or the presence of a gas in the gas,

the doping concentration of the P-type third doping area is equal to that of the P-type first doping area.

Optionally, in a direction away from the second surface, a cathode and a gate are arranged above the P-type second doped region at an interval; and/or the presence of a gas in the gas,

and an anode is arranged on the P-type fourth doped region in the direction departing from the first surface.

Optionally, the device further includes an N-type first doped region located between the P-type second doped region and the cathode.

Optionally, the organic light emitting diode further includes an N-type second doped region located between the P-type second doped region and a portion of the cathode, between the P-type second doped region and the gate, and between the P-type second doped region and a portion of the anode.

Optionally, a passivation layer is further included to cover the spacing portion between the gate and the cathode.

Optionally, the thyristor comprises any one of a single mesa, a double mesa, and a planar type.

Optionally, the thickness of the P-type first doped region is greater than or equal to 20 micrometers and less than or equal to 60 micrometers; and/or the thickness of the P-type third doped region is greater than or equal to 20 micrometers and less than or equal to 60 micrometers.

Optionally, the thickness of the P-type second doped region is greater than or equal to 10 micrometers and less than or equal to 25 micrometers; and/or the presence of a gas in the gas,

the thickness of the P-type fourth doped region is greater than or equal to 10 micrometers and less than or equal to 25 micrometers.

Optionally, the doping concentration of the P-type first doping region is greater than or equal to 1 x 10¹⁴/cm³And less than or equal to 1 x 10¹⁶/cm³(ii) a And/or the doping of the P-type third doped region is greater than or equal to 1 x 10¹⁴/cm³And less than or equal to 1 x 10¹⁶/cm³。

Optionally, the doping concentration of the element of the P-type second doped region is greater than or equal to 1 x 10¹⁶/cm³And less than or equal to 1 x 10¹⁸/cm³(ii) a And/or the presence of a gas in the gas,

the doping concentration of the P-type fourth doping region is greater than or equal to 1 x 10¹⁶/cm³And less than or equal to 1 x 10¹⁸/cm³。

Optionally, the P-type first doped region includes elemental gallium and aluminum and/or boron, and the P-type second doped region includes elemental gallium and aluminum and/or boron;

the P-type third doped region comprises gallium and aluminum and/or boron, and the P-type fourth doped region comprises gallium and aluminum and/or boron.

In the technical solution provided by this embodiment, the first surface side and the second surface side of the N-type substrate are both provided with a P-type doped region having a concentration gradient, and the P-type first doped region and the P-type third doped region can increase the resistivity of the device, and the forward withstand voltage and the reverse withstand voltage; the doping concentration of the P-type second doping region is greater than that of the P-type first doping region, the doping concentration of the P-type fourth doping region is greater than that of the P-type third doping region, and the P-type second doping region, the P-type fourth doping region and the metal electrode can form good ohmic contact when the metal electrode is formed in the subsequent P-type doping region.

Drawings

Fig. 1 is a schematic structural diagram of a thyristor according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of a thyristor according to the prior art;

fig. 3 is a schematic structural diagram of another thyristor according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of another thyristor according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of another thyristor according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of another thyristor according to an embodiment of the present invention;

fig. 7 is a schematic structural diagram of another thyristor according to an embodiment of the present invention;

fig. 8 is a schematic structural diagram of a method for manufacturing a thyristor according to an embodiment of the present invention;

fig. 9 is a schematic structural diagram of another method for manufacturing a thyristor according to an embodiment of the present invention;

fig. 10 is a schematic structural diagram of a method for manufacturing a thyristor according to an embodiment of the present invention;

fig. 11 to fig. 12 are schematic cross-sectional structural diagrams corresponding to steps of a method for manufacturing a thyristor according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be described in detail through the following embodiments with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some embodiments of the present invention, not all embodiments, and all other embodiments obtained by those skilled in the art without creative efforts based on the embodiments of the present invention all fall into the protection scope of the present invention.

The embodiment of the utility model provides a structural schematic diagram of thyristor, see fig. 1, this thyristor includes: an N-type substrate 10, the N-type substrate 10 having a first surface 100 and a second surface 101 opposite to the first surface 100; in the direction departing from the second surface 101, a P-type first doped region 11 and a P-type second doped region 12 are sequentially arranged on the first surface 100 side, and the doping concentration of the P-type second doped region 12 is greater than that of the P-type first doped region 11; in the direction away from the first surface 100, a P-type third doped region 13 and a P-type fourth doped region 14 are sequentially disposed on the second surface 101 side, and the doping concentration of the P-type fourth doped region 14 is greater than that of the P-type third doped region 13.

In this embodiment, in a direction away from the second surface 101, the first surface 100 side is sequentially provided with a P-type first doped region 11 and a P-type second doped region 12, and a doping concentration of the P-type second doped region 12 is greater than a doping concentration of the P-type first doped region 11, where the P-type first doped region 11 can increase a resistivity and a voltage withstanding property of the device; when a metal electrode is formed on the side of the P-type first doped region 11, the P-type second doped region 12 can form a good ohmic contact with the metal electrode. The voltage withstanding range which can be endured by the single direction of the thyristor provided by the embodiment is obviously improved and is about 1200V-1600V.

Correspondingly, in the direction away from the first surface 100, a P-type third doped region 13 and a P-type fourth doped region 14 are sequentially disposed on the second surface 101 side, and the doping concentration of the P-type fourth doped region 14 is greater than that of the P-type third doped region 13. The P-type third doped region 13 can increase the resistivity of the device and the withstand voltage characteristic; the doping concentration of the P-type fourth doping region 14 is greater than that of the P-type third doping region 13, and when a metal electrode is formed on the side of the P-type fourth doping region 14 subsequently, the P-type fourth doping region 14 can form good ohmic contact with the metal electrode. The voltage-resistant range that the thyristor provided by the embodiment can bear in a single direction is obviously improved, and is about 1200V-1600V.

In this embodiment, the first surface 100 side and the second surface 101 side of the N-type substrate 10 are both provided with a P-type doped region having a concentration gradient, and the P-type first doped region 11 and the P-type third doped region 13 can increase the resistivity of the device, and the forward withstand voltage and the reverse withstand voltage; the doping concentration of the P-type second doping region 12 is greater than that of the P-type first doping region 11, the doping concentration of the P-type fourth doping region 14 is greater than that of the P-type third doping region 13, and good ohmic contact can be formed between the P-type fourth doping region and a metal electrode when the metal electrode is formed in the subsequent P-type doping region. The forward and reverse voltage withstanding range of the thyristor provided by the embodiment is obviously improved, and is about 1200V-1600V.

A prior art thyristor, see fig. 2, comprises: an N-type substrate 10, the N-type substrate 10 having a first surface 100 and a second surface 101 opposite to the first surface 100; in the direction departing from the second surface 102, the first surface 100 is provided with a P-type fifth doped region 15; in a direction away from the first surface 100, the second surface 101 side is provided with a P-type sixth doped region 16. In the thyristor in the prior art, the P-type fifth doping region 15 and the P-type sixth doping region 16 on the first surface 100 and the second surface 101 of the N-type substrate 10 do not have a concentration gradient of doping elements, so that when a metal electrode is formed subsequently, a good ohmic contact can be formed with the metal electrode, the concentrations of the doping elements of the P-type fifth doping region 15 and the P-type sixth doping region 16 to be doped are high, but when the concentrations of the doping elements of the P-type fifth doping region 15 and the P-type sixth doping region 16 are high, the resistivity is low, the voltage resistance of the whole thyristor is poor, and the withstand voltage range that the thyristor in the prior art can withstand is about 600V-1000V.

In the technical solution provided in this embodiment, the first surface 100 side and the second surface 101 side of the N-type substrate 10 are both provided with a P-type doped region having a concentration gradient, and the P-type first doped region 11 and the P-type third doped region 13 can increase the resistivity of the device, and the forward withstand voltage and the reverse withstand voltage; the doping concentration of the P-type second doping region 12 is greater than that of the P-type first doping region 11, the doping concentration of the P-type fourth doping region 14 is greater than that of the P-type third doping region 13, and when a metal electrode is formed in the subsequent P-type doping region, the P-type second doping region 12 and the P-type fourth doping region 14 form good ohmic contact with the metal electrode.

It should be noted that, by adjusting the parameters of the open-tube gallium-spreading process, the P-type first doping region 11 and the P-type second doping region 12 are completed by one open-tube gallium-spreading process, and correspondingly, the P-type third doping region 13 and the P-type fourth doping region 14 are completed by one open-tube gallium-spreading process, so that the preparation time is saved and the production cost is reduced.

Optionally, on the basis of the above technical solution, the doping concentration of the P-type fourth doping region 14 is equal to the doping concentration of the P-type second doping region 12; and/or the doping concentration of the P-type third doping region 13 is equal to the doping concentration of the P-type first doping region 11. In this embodiment, the first surface 100 side and the second surface 101 side of the N-type substrate 10 are both provided with a P-type doped region having a concentration gradient, and the P-type first doped region 11 and the P-type third doped region 13 can increase the resistivity of the device, and the forward withstand voltage and the reverse withstand voltage; the doping concentration of the P-type second doping region 12 is greater than that of the P-type first doping region 11, the doping concentration of the P-type fourth doping region 14 is greater than that of the P-type third doping region 13, and good ohmic contact can be formed between the P-type fourth doping region and a metal electrode when the metal electrode is formed in the subsequent P-type doping region. The doping concentration of the P-type fourth doping region 14 is equal to that of the P-type second doping region 12; and/or, the doping concentration of the P-type third doping region 13 is equal to that of the P-type first doping region 11, so that the forward direction and the reverse direction of the thyristor provided by the embodiment can bear the same voltage withstanding range.

Optionally, on the basis of the above technical solution, referring to fig. 3, in a direction away from the second surface 101, the cathode 17 and the gate 18 are disposed at an interval above the P-type second doped region 12; and/or an anode 19 is arranged above the P-type fourth doped region in a direction away from the first surface.

Optionally, on the basis of the above technical solution, referring to fig. 3, the device further includes an N-type first doped region 20 located between the P-type second doped region 12 and the cathode 17. In the present embodiment, the N-type first doped region 20 is located between the P-type second doped region 12 and the cathode 17, forming a unidirectional thyristor.

Optionally, on the basis of the above technical solution, referring to fig. 4, the device further includes an N-type second doped region 21 located between the P-type second doped region 12 and a portion of the cathode 17, between the P-type second doped region 12 and the gate 18, and between the P-type second doped region 12 and a portion of the anode 19. According to the technical scheme of the embodiment, the unidirectional thyristor is formed.

Optionally, on the basis of the above technical solution, referring to fig. 3 and 4, a passivation layer 22 is further included to cover the interval portion between the gate electrode 18 and the cathode electrode 17.

Optionally, on the basis of the above technical solution, the thyristor shown in fig. 4 is taken as an example for description, and the thyristor includes any one of a single-mesa thyristor, a double-mesa thyristor, and a planar thyristor. Fig. 5 shows a single mesa thyristor, which further includes an insulating layer isolation structure 23. Fig. 6 shows a double-mesa thyristor, fig. 7 shows a planar thyristor, and further comprises an insulating layer isolation structure 23.

Optionally, on the basis of the above technical solution, the thickness of the P-type first doped region 11 is greater than or equal to 20 micrometers and less than or equal to 60 micrometers; and/or the thickness of the P-type third doped region 13 is greater than or equal to 20 micrometers and less than or equal to 60 micrometers. The thicknesses of the P-type first doped region 11 and the P-type third doped region 13 are the same, so that the forward direction and the reverse direction of the thyristor provided by the present embodiment can bear the same withstand voltage range. Wherein the thickness is more than 60 microns, which causes too low resistivity and too small withstand voltage, and the thickness is less than 20 microns, which causes too high resistivity and influences the electrical performance of the device.

Optionally, on the basis of the above technical solution, the thickness of the P-type second doped region 12 is greater than or equal to 10 micrometers and less than or equal to 25 micrometers; and/or the thickness of the P-type fourth doped region 14 is greater than or equal to 10 micrometers and less than or equal to 25 micrometers. The thicknesses of the P-type second doped region 12 and the P-type fourth doped region 14 are the same, so that the forward direction and the reverse direction of the thyristor provided by the present embodiment can bear the same withstand voltage range. Wherein the thickness is more than 25 micrometers, which results in too low resistivity and too small withstand voltage, and the thickness is less than 10 micrometers, which results in too high resistivity and affects the electrical performance of the device.

Optionally, on the basis of the above technical solution, the doping concentration of the P-type first doping region 11 is greater than or equal to 1 × 10¹⁴/cm³And less than or equal to 1 x 10¹⁶/cm³(ii) a And/or the doping concentration of the P-type third doping region 13 is greater than or equal to 1 x 10¹⁴/cm³And less than or equal to 1 x 10¹⁶/cm³. The doping concentrations of the P-type first doping region 11 and the P-type third doping region 13 are the same, so that the forward direction and the reverse direction of the thyristor provided by the present embodiment can bear the same withstand voltage range. Wherein the doping thickness is more than 1 x 10¹⁶/cm³Resulting in too low resistivity, low withstand voltage and doping concentration of less than 1 x 10¹⁴/cm³Resulting in too high a resistivity that affects the electrical performance of the device.

Optionally, on the basis of the above technical solution, the doping concentration of the P-type second doping region 12 is greater than or equal to 1 × 10¹⁶/cm³And less than or equal to 1 x 10¹⁸/cm³(ii) a And/or the doping concentration of the P-type fourth doped region 14 is greater than or equal to 1 x 10¹⁶/cm³And less than or equal to 1 x 10¹⁸/cm³. The doping concentrations of the P-type second doping region 12 and the P-type fourth doping region 14 are the same, so that the forward direction and the reverse direction of the thyristor provided by the present embodiment can bear the same withstand voltage range. Wherein the doping thickness is more than 1 x 10¹⁸/cm³Resulting in too low resistivity, low withstand voltage and doping concentration of less than 1 x 10¹⁶/cm³Guide, leadThe resistivity is too high, which affects the electrical performance of the device.

Optionally, on the basis of the above technical solution, the P-type first doped region 11 includes element gallium and aluminum and/or boron, and the P-type second doped region 12 includes element gallium and aluminum and/or boron; the P-type third doped region 13 comprises elemental gallium and aluminum and/or boron and the P-type fourth doped region 14 comprises elemental gallium and aluminum and/or boron. The doping of gallium can be completed by a one-time open-tube gallium diffusion process to prepare the P-type first doping region 11, the P-type second doping region 12, the P-type third doping region 13 and the P-type fourth doping region 14. The doping concentrations of the P-type first doping region 11 and the P-type third doping region 13 are the same, and the doping concentrations of the P-type second doping region 12 and the P-type fourth doping region 14 are the same, so that the forward direction and the reverse direction of the thyristor provided by the embodiment can bear the same voltage withstanding range. The P-type first doped region 11 includes gallium and aluminum and/or boron, and the P-type second doped region 12 includes gallium and aluminum and/or boron; the P-type third doped region 13 comprises gallium, aluminum and/or boron, the P-type fourth doped region 14 comprises gallium, aluminum and/or boron, and the doping of gallium can be completed by the preparation of the P-type first doped region 11, the P-type second doped region 12, the P-type third doped region 13 and the P-type fourth doped region 14 through a one-time open-tube gallium diffusion process, so that the preparation time is saved, and the preparation cost is reduced.

Based on the same concept, the embodiment of the present invention further provides a method for manufacturing a thyristor, which is described by taking fig. 1 as an example, and referring to fig. 8, the method includes the following steps:

step 110, an N-type substrate is provided, wherein the N-type substrate has a first surface and a second surface opposite to the first surface.

Referring to fig. 11, an N-type substrate 10 is provided, the N-type substrate 10 having a first surface 100 and a second surface 101 opposite to the first surface 100.

And 120, forming a P-type first doping region and a P-type second doping region on the side of the first surface by adopting a primary open-tube gallium diffusion process in the direction departing from the second surface, wherein the doping concentration of the P-type second doping region is greater than that of the P-type first doping region.

Referring to fig. 12, in a direction away from the second surface 101, a P-type first doped region 11 and a P-type second doped region 12 are formed on the first surface 100 side by using a single open-tube gallium diffusion process, and a doping concentration of the P-type second doped region 12 is greater than a doping concentration of the P-type first doped region 11.

And step 130, forming a P-type third doping region and a P-type fourth doping region on the second surface side by adopting a primary open-tube gallium diffusion process in the direction departing from the first surface, wherein the doping concentration of the P-type fourth doping region is greater than that of the P-type third doping region.

Referring to fig. 1, in a direction away from the first surface 100, a P-type third doped region 13 and a P-type fourth doped region 14 are formed on the second surface 101 side by using a single open-tube gallium diffusion process, and the doping concentration of the P-type fourth doped region 14 is greater than that of the P-type third doped region 13.

It should be noted that, the sequence of step 120 and step 130 is not limited in the embodiment of the present invention. Step 120 and step 130 can be performed generally simultaneously, thereby providing a cost advantage.

In the technical solution provided in this embodiment, the first surface 100 side and the second surface 101 side of the N-type substrate 10 are both provided with a P-type doped region having a concentration gradient, and the P-type first doped region 11 and the P-type third doped region 13 can increase the resistivity of the device, and the forward withstand voltage and the reverse withstand voltage; the doping concentration of the P-type second doping region 12 is greater than that of the P-type first doping region 11, the doping concentration of the P-type fourth doping region 14 is greater than that of the P-type third doping region 13, and when a metal electrode is formed in the subsequent P-type doping region, the P-type second doping region 12 and the P-type fourth doping region 14 form good ohmic contact with the metal electrode. By adjusting the parameters of the open-tube gallium-spreading process, the P-type first doping region 11 and the P-type second doping region 12 are completed by the one-time open-tube gallium-spreading process, and correspondingly, the P-type third doping region 13 and the P-type fourth doping region 14 are completed by the one-time open-tube gallium-spreading process, so that the preparation time is saved and the production cost is reduced.

It should be noted that the P-type first doped region 11 includes the element gallium and aluminum and/or boron, and the P-type second doped region 12 includes the element gallium and aluminum and/or boron; the P-type third doped region 13 comprises elemental gallium and aluminum and/or boron and the P-type fourth doped region 14 comprises elemental gallium and aluminum and/or boron.

The P-type first doping region 11 includes gallium, the P-type second doping region 12 includes gallium, the P-type third doping region 13 includes gallium, and the P-type fourth doping region 14 includes gallium, and the doping can be completed in the process of one open-tube gallium diffusion process.

Optionally, on the basis of the foregoing technical solution, referring to fig. 9, in step 120, in a direction away from the second surface, a P-type first doped region and a P-type second doped region are formed on the first surface side by using a single open-tube gallium diffusion process, where a doping concentration of the P-type second doped region is greater than a doping concentration of the P-type first doped region, and the forming includes:

and 1201, performing first-stage treatment on the side of the first surface by adopting an open-tube gallium diffusion process on the basis of the first preset hydrogen concentration in the direction departing from the second surface.

In this embodiment, the first surface side is doped with P-type impurities.

And 1202, performing second stage treatment on the side of the first surface by adopting an open-tube gallium expanding process based on a second preset hydrogen concentration, wherein the second preset hydrogen concentration is zero.

In the present embodiment, the second preset hydrogen concentration is zero, that is, the first surface side is not doped with P-type impurities any more, but the P-type impurities doped in step 1201 are merely diffused. The concentration of the P-type impurities is higher and higher in the direction away from the second surface.

And 1203, performing third-stage treatment on the side of the first surface by using an open-tube gallium expansion process based on a third preset hydrogen concentration.

In the present embodiment, the doping of the P-type impurity is continued on the first surface side, so that the P-type first doping region 11 and the P-type second doping region 12 having the concentration gradient are formed, and the doping concentration of the P-type second doping region 12 is greater than that of the P-type first doping region 11.

Optionally, on the basis of the foregoing technical solution, referring to fig. 10, in step 130, in a direction away from the first surface, a P-type third doped region and a P-type fourth doped region are formed on the second surface side by using a single open-tube gallium diffusion process, where a doping concentration of the P-type fourth doped region is greater than a doping concentration of the P-type third doped region and includes:

and 1301, performing first-stage treatment on the side of the second surface by adopting an open-tube gallium expanding process on the basis of a first preset hydrogen concentration in the direction departing from the first surface.

In this embodiment, the second surface side is doped with P-type impurities.

And 1302, performing second stage treatment on the side of the second surface by adopting an open-tube gallium expanding process based on a second preset hydrogen concentration, wherein the second preset hydrogen concentration is zero.

In this embodiment, the second preset hydrogen concentration is zero, i.e. the second surface side is not doped with P-type impurities any more, but only the P-type impurities doped in step 1301 are diffused. The concentration of the P-type impurities is higher and higher in the direction away from the first surface.

And 1303, performing third-stage treatment on the side of the second surface by adopting an open-tube gallium expanding process based on a third preset hydrogen concentration.

In the present embodiment, the doping of the P-type impurity is continued on the second surface side, so that the third doped region 13 having the concentration gradient and the P-type and the fourth doped region 14 having the P-type are formed, and the doping concentration of the fourth doped region 14 having the P-type is greater than that of the third doped region 13 having the P-type.

It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.

Claims

1. A thyristor, comprising:

2. The thyristor according to claim 1, wherein the doping concentration of the P-type fourth doped region is equal to the doping concentration of the P-type second doped region; and/or the presence of a gas in the gas,

3. The thyristor according to claim 1, wherein a cathode and a gate are arranged above the P-type second doped region at intervals in a direction away from the second surface; and/or the presence of a gas in the gas,

4. The thyristor according to claim 3, further comprising an N-type first doped region between the P-type second doped region and the cathode.

5. The thyristor according to claim 3, further comprising an N-type second doped region between the P-type second doped region and a portion of the cathode, between the P-type second doped region and the gate, and between the P-type second doped region and a portion of the anode.

6. The thyristor according to claim 3, further comprising a passivation layer covering a spacing portion between the gate and the cathode.

7. The thyristor according to any one of claims 1-6, wherein the thyristor comprises any one of a single mesa, a double mesa and a planar.

8. The thyristor according to any one of claims 1-6, wherein the thickness of the P-type first doped region is greater than or equal to 20 microns and less than or equal to 60 microns; and/or the thickness of the P-type third doped region is greater than or equal to 20 micrometers and less than or equal to 60 micrometers.

9. The thyristor according to any one of claims 1-6, wherein the thickness of the P-type second doped region is greater than or equal to 10 microns and less than or equal to 25 microns; and/or the presence of a gas in the gas,

10. The thyristor according to any one of claims 1-6, wherein the P-type first doped region comprises elemental gallium and aluminum and/or boron, and the P-type second doped region comprises elemental gallium and aluminum and/or boron;