CN211529146U - Standard test platform architecture for updating computer mainboard firmware - Google Patents

Abstract

The utility model provides a standard test platform framework that modularization, compatibility are high, be convenient for upgrade and upgrade cost of upgrade extremely low computer motherboard firmware update. The platform framework comprises an upper computer (1), a core board (2), an electric control board (3), a horizontal detection board (4) and at least one test channel (6), wherein the test channel comprises a signal adapter board (7), a computer firmware updating communication board (8), a test point adapter board (9) and a power supply, the signal adapter board is connected with the core board, the computer firmware updating communication board is respectively connected with the upper computer and the signal adapter board, the test point adapter board is connected with the signal adapter board, a computer mainboard to be tested is respectively connected with the computer firmware updating communication board and the test point adapter board through probes, and the power supply is connected with the signal adapter board. The utility model is used for mainboard test field.

Description

Standard test platform architecture for updating computer mainboard firmware

Technical Field

The utility model relates to a mainboard test field especially relates to a standard test platform framework that computer motherboard firmware updates.

Background

With the development of science and technology, computers have become a necessity in the work and life of people. When computers are produced in batches, it is very important to ensure the quality of each computer. However, with the development of current technologies, the integration of computer motherboards is higher and more complex, and the upgrading of computers is faster and faster, so that the upgrading of test equipment for computer motherboards is faster and faster. If the computer mainboard test equipment is synchronously upgraded according to the upgrading and updating of the computer mainboard, and the previous generation equipment cannot be reused, computer manufacturers need to invest more and more manpower and material resources to meet the test requirements. This greatly increases the cost of testing, which many computer manufacturers cannot afford. In addition, the existing computer motherboard firmware updating test is generally designed according to a certain type or a plurality of types of similar computer motherboards, the compatibility is poor, the repeatable utilization rate is low when the computer motherboards are updated, the updating cost is high, the updating period is long, and the debugging period is long.

In view of the above, it is necessary to design a computer motherboard testing apparatus with high compatibility, easy upgrade, low upgrade cost, and modular design.

SUMMERY OF THE UTILITY MODEL

The utility model aims to solve the technical problem that overcome prior art not enough, provide a modularization, compatible high, be convenient for upgrade and upgrade standard test platform framework that becomes the update of extremely low computer motherboard firmware.

The utility model adopts the technical proposal that: the utility model discloses a host computer, with host computer internet access's nuclear core plate, with the host computer is connected automatically controlled board, with automatically controlled board that the board is connected is in horizontal pick-up board and setting that automatically controlled board is connected are in at least a test channel between nuclear core plate and the computer mainboard that awaits measuring, the test channel includes signal keysets, computer firmware update communication board, test point keysets and power, the signal keysets with nuclear core plate is connected, computer firmware update communication board respectively with the host computer reaches the signal keysets is connected, the test point keysets with the signal keysets is connected, the computer mainboard that awaits measuring pass through the probe respectively with computer firmware update communication board reaches the test point keysets is connected, the power with the signal keysets is connected.

According to the scheme, the upper computer is connected with the core board through a network, the upper computer sends a control instruction to the core board, a test channel formed by a signal adapter board, a computer firmware updating communication board, a test point adapter board and a power supply is established, the test point adapter board is used for realizing the connection between the computer mainboard to be tested and the signal adapter board, so that the connection between the computer mainboard to be tested and the signal adapter board can be realized by mainly replacing the appropriate test point adapter board according to the pin position of the computer mainboard to be tested aiming at computer mainboards with different models or different connecting pin positions, all devices are not required to be replaced, the firmware updating test cost and the test platform updating time are greatly saved, the firmware updating period of the computer mainboard is short, and the updating cost is greatly reduced; all computer mainboards can be compatibly tested after simple upgrading such as replacing a test point adapter plate, the compatibility of the platform is greatly improved, the upgrading speed is high, and the upgrading cost is extremely low; in addition, each board is subjected to modular design, the connection among the boards is simplified, the functional modularization is also realized, and in the process of carrying out the updating test on the computer mainboard, modular test boards can be added or reduced according to specific requirements, so that the updating test process flow is greatly simplified, and the updating cost and the updating time are greatly reduced.

Further, it still includes the scanning rifle, the scanning rifle is connected with nuclear core plate. Therefore, through the arrangement of the scanning gun, the information of the computer mainboard to be tested can be confirmed before the updating test is started, and safety accidents are avoided.

Still further, it still includes nuclear core plate bottom plate, be provided with at least one confession on the nuclear core plate bottom plate the port of nuclear core plate grafting. Therefore, the core board base plate can provide a plurality of ports for the core board to be connected, the updating test function of the whole platform is greatly expanded, the core boards can be arranged simultaneously through the core board base plate, the computer main boards to be tested are updated and tested, and the updating test efficiency is further improved.

Still further, the signal adapter plate includes a power module plate, the power module plate supplies power for the whole platform, the power supply includes a switching power supply, and the switching power supply is connected with the power module plate. Therefore, the switch power supply supplies power to the whole platform, the overvoltage and overcurrent protection module is arranged in the switch power supply, the computer mainboard to be tested or each test board can be protected through the overvoltage and overcurrent protection module, and the damage of large voltage or large current to the platform or the computer mainboard to be tested is avoided.

Still further, the power supply further comprises an analog battery, and the analog battery is connected with the power module board. Therefore, the simulated battery is added to prevent direct physical power-on contact from detecting the computer mainboard to damage the computer mainboard with the updated firmware after the computer mainboard to be tested is updated and upgraded.

In addition, the signal adapter board further comprises a debugging module board. Therefore, through the setting of the debugging module board, voltage calibration, current calibration or other debugging ports can be provided for the computer mainboard to be tested, convenience is provided for subsequent other tests, and the compatibility and the convenience of the platform are indirectly improved.

Further, automatically controlled board still is connected with the indicator lamp board, automatically controlled board still is connected with the sensor, switch, button, the cooling fan of whole platform. Therefore, the independent electric control board is arranged to control the sensors, the switches, the keys, the fans and the like of the whole platform, the modular design is realized while the electric control board is separated from the main test system, the functions are not interfered with each other, and the smoothness and the reliability of the platform are improved.

Four ports for the core board to be plugged are arranged on the core board base plate. Therefore, the arrangement of the core board bottom plate can greatly expand the firmware updating test function of the platform, and the work efficiency is greatly improved.

Drawings

FIG. 1 is a block diagram of the principle structure of the present invention;

FIG. 2 is a block diagram of the core board;

FIG. 3 is a schematic diagram of the USB physical layer interface chip circuit 23;

FIG. 4 is a schematic diagram of the Ethernet physical layer interface chip circuitry 24;

FIG. 5 is a schematic diagram of the USB to serial chip circuit 25;

FIG. 6 is a schematic diagram of double rate synchronous dynamic random access memory circuit 26;

FIG. 7 is a functional block diagram of the electronic control board;

FIG. 8 is a schematic circuit diagram of the horizontal sensing plate;

FIG. 9 is a functional block diagram of the signal patch panel;

FIG. 10 is a simplified structural diagram of the core board substrate;

fig. 11 is a simple structural block diagram of the power module board;

FIG. 12 is a functional block diagram of the debug module board;

FIG. 13 is a schematic block diagram of the computer firmware update communication board.

Detailed Description

As shown in fig. 1, the utility model discloses an host computer 1, with host computer 1 internet access's nuclear core plate 2, with the automatically controlled board 3 that host computer 1 is connected, with the horizontal detection board 4 that automatically controlled board 3 is connected and setting are in at least a test channel 6 between nuclear core plate 2 and the computer mainboard 5 that awaits measuring, test channel 6 includes signal keysets 7, computer firmware update communication board 8, test point keysets 9 and power, signal keysets 7 with nuclear core plate 2 is connected, computer firmware update communication board 8 respectively with host computer 1 reaches signal keysets 7 is connected, test point keysets 9 with signal keysets 7 is connected, the computer mainboard 5 that awaits measuring pass through the probe respectively with computer firmware update communication board 8 reaches test point keysets 9 is connected. In this embodiment, a high frequency probe 17 is used for connecting the computer firmware update communication board 8, and a normal probe 18 is used for connecting the test point adapter board 9. The power supply is connected with the signal transfer board 7.

It still includes scanning rifle 10 and nuclear core plate bottom plate 11, scanning rifle 10 with nuclear core plate 2 is connected. The core board bottom plate 11 is provided with at least one port for the core board 2 to be plugged. The signal transfer board 7 comprises a power module board 12, the power module board 12 supplies power for the whole platform, the power supply comprises a switch power supply 13, and the switch power supply 13 is connected with the power module board 12. The power supply also includes an analog battery 14, the analog battery 14 being connected to the power module board 12. The signal patch board 7 further comprises a debug module board 15. Automatically controlled board 3 still is connected with indicator lamp plate 16, automatically controlled board 3 still is connected with the sensor, switch, button, the cooling fan of whole platform. Four ports for the core board 2 to be plugged are arranged on the core board base plate 11.

The test process of updating the computer mainboard firmware by using the standard test platform for updating the computer mainboard firmware comprises the following steps:

a. after the computer mainboard 5 to be tested is placed at the test position, the horizontal detection plate 4 detects whether the computer mainboard 5 to be tested is placed in place through the photoelectric sensor, if not, the horizontal detection plate 4 sends out an error prompt until the computer mainboard 5 to be tested is placed in place at the test position.

b. The electric control board 3 drives the computer mainboard 5 to be tested to be respectively connected with the computer firmware updating communication board 8 and the test point adapter board 9 through probes.

c. The upper computer 1 controls the core board 2 to connect with the scanning gun 10 through Ethernet and scans the computer mainboard 5 to be tested connected with the test channel 6, confirms the test information of the computer mainboard 5 to be tested and transmits the code scanning result to the upper computer 1.

d. And after the code scanning is successful, the core board 2 controls the power supply to electrify the computer mainboard 5 to be tested.

e. After the power-on is successful, the upper computer 1 controls the core board 2 to detect whether the voltage and the current of the test point set on the computer mainboard 5 to be tested are normal, and after all the voltage and current parameters are normal, the core board 2 controls the signal adapter board 7 and the test point adapter board 9 to control the computer mainboard 5 to be tested, so that the computer mainboard 5 to be tested enters a central processing unit firmware updating mode.

f. When the computer mainboard 5 to be tested enters the central processor firmware updating mode, the upper computer 1 communicates with the computer mainboard 5 to be tested through the computer firmware updating communication board 8 and updates the firmware into the computer mainboard 5 to be tested, and when the firmware updating is completed, the computer mainboard 5 to be tested is powered off.

g. The core board 2 is connected with the analog battery 14 through the power module board 12 to electrify the computer mainboard 5 to be tested, synchronously verifies whether the burning of the central processor firmware of the computer mainboard 5 to be tested is successful, measures whether the voltage and the current of the set test point on the computer mainboard 5 to be tested are normal through the core board 2, and finishes the firmware updating test process of the computer mainboard 5 to be tested when the voltage and the current of the set test point are detected to be normal.

And finally, after the firmware updating test of the computer mainboard 5 to be tested is completed, the core board 2 uploads all test data to the upper computer 1 for storage and display.

The following is a description of a specific structure of the present invention.

As shown in fig. 2 to 6, the core board 2 is composed of a ZYNQ-7010 chip 21, an FPGA, an analog-to-digital conversion module 22, and peripheral circuits thereof, and has the main functions of communicating with an upper computer through ethernet communication, controlling related circuits to work according to instructions sent from the upper computer, and performing functions of communication control and voltage and current measurement with a product to be measured. The peripheral circuits include a USB physical layer interface chip circuit 23, an ethernet physical layer interface chip circuit 24, a USB to serial port chip circuit 25, a double-rate synchronous dynamic random access memory circuit 26, a flash memory chip circuit 27, and a memory chip circuit 28. In this embodiment, the core board 2 supplies power to four power chips of which the models are TLV62130, the FPGA chip adopts XC7Z010 series, the flash memory chip circuit 27 adopts a 128b flash memory, and the memory storage chip circuit 28 adopts a 4GEMMC memory.

As shown in fig. 7, the electronic control board 3 is composed of a single chip microcomputer 31 and peripheral circuits thereof, and in this embodiment, the model of the single chip microcomputer 31 is STM32F 103. The electric control board 3 is connected with an indicator lamp board 16. The single chip 31 is connected with a 24-channel sensor access circuit 32, a 12-channel electromagnetic valve control circuit 33, a 12-channel fan control circuit 34, a 12-channel temperature measuring circuit 35, an indicator lamp control circuit 36, a key input circuit 37, an Ethernet communication circuit 38 and the like. The electric control board is communicated with an upper computer through Ethernet, uploads monitored information of sensors, keys, fans, temperature measurement and the like to the upper computer, controls the electromagnetic valve according to instructions of the upper computer to complete action control of the whole test equipment, and controls the indicator lamp according to the state of the test equipment to prompt an operator. In the present embodiment, the temperature measuring sensor employs a chip of model number tpm 423.

As shown in fig. 8, the level detecting plate 4 is composed of a photosensor 41, a voltage comparator 42, and a voltage follower 43. When the computer motherboard 5 to be tested is present, the light emitted from the transmitting end of the photoelectric sensor 41 will be reflected back to the receiving end of the photoelectric sensor 41 through the computer motherboard 5 to be tested, and when the computer motherboard to be tested is not placed in place, the energy of the light reflected back to the receiving end of the photoelectric sensor 41 will be different, and the resistance value of the receiving end of the photoelectric sensor 41 will also change with the different energy of the light. R (x) represents the resistance of the receiving end of the photosensor, and the voltages V1 and V2 at the input end of the voltage comparator are:

；

。

here R2= R3, R4 is an adjustable resistor for calibrating the photosensor receiving end. When the materials of the computer mainboard to be tested are different, the reflection characteristics of the computer mainboard are different, and the horizontal detection plate can be corrected by adjusting R4. When the voltage of V1 is greater than V2, the voltage of V3 is equal to VCC, V3= V4= VCC; and when the voltage of V1 is less than V2, the voltage of V3 is equal to 0V, V3= V4= 0V. According to the above description, the value of V4 can be changed according to the placement level of the computer motherboard to be tested, so that the placement level of the computer motherboard to be tested can be quickly obtained through the electronic control board.

As shown in fig. 9, the signal adapter board 7 mainly connects some communication signals of the computer motherboard 5 to be tested to the core board, and these control signals are controlled through I2C on the core board. The signal adapter board 7 is connected between the core board 2 and the test point adapter board 9, and specifically, one end of the core board is directly connected to the core board bottom board 11. As shown in fig. 10, the main function of the core board 11 is to transfer signals to the core board and extend 4 channels of USB communication, ethernet communication interface and other signals including but not limited to UART, I2C, SWD, USB and control of the computer motherboard to be tested for the core board. A nuclear core board bottom plate can connect 4 signal keysets at most, namely can measure 4 computer motherboards that await measuring simultaneously with a nuclear core board, with saving equipment cost like this. Here, the test point adapter board 9 mainly adapters the test points on the computer motherboard to be tested to the signal adapter board. The test point adapter board is used for conveniently upgrading and maintaining, when the computer mainboard to be tested is different, the coordinate position of the test point can be changed, and the whole test system can be upgraded only by replacing the test point adapter board.

The power module board 12 and the debugging module board 15 are both arranged on the signal adapter board 7. The power module board supplies power to the whole system; the debugging module board is used for switching out some debugging signals on the computer mainboard to be tested, and can be externally connected with debugging equipment to carry out fault analysis on the product to be tested. The power module board 12 is externally connected with a switching power supply 13 and an analog battery 14. The switching power supply 13 provides 20V and the analog battery 12V. The power module board provides power supplies of 1.8V, 3.3V, 5V, 12V, 24V, -12V and the like for the core board bottom board 11, and provides main power supply voltage of 12V or battery power supply voltage for the computer mainboard to be tested. As shown in fig. 11, 20V supplied by the switching power supply 13 and 12V supplied by the analog battery 14 are both connected to the computer motherboard to be tested through the overvoltage/overcurrent protection circuit 121 and the voltage/current measurement circuit 122, so that the power supply condition of the computer motherboard to be tested can be monitored in real time. In addition, other power supplies of the whole platform pass through the overvoltage and overcurrent protection circuit, and the whole platform can be protected when the power supply of the platform is abnormal. When the computer motherboard to be tested is powered off, the discharging circuit 123 discharges the capacitor electric quantity on the computer motherboard to be tested in order to discharge the capacitor electric quantity as soon as possible. After passing through the over-voltage and over-current protection circuit 121, the switching power supply can provide voltages of 1.8V, 3.3V, 5V, 12V, 24V, -12V, and the like to the core board bottom board 11 by using the DC/DC circuit 124. The power module board is in communication connection with the core board through I2C. As shown in fig. 12, the debugging module board 15 is also connected to the core board backplane through I2C communication, and receives the debugging signal sent back by the computer motherboard 5 to be tested. The debugging module board mainly comprises a USB2.0 debugging port 151, a USB3.0 debugging port 152, a power supply timing sequence measuring circuit 153, a voltage calibration circuit 154, a current calibration circuit 155 and other debugging ports 156. The signal transfer board 7 is further provided with an IO port expansion circuit 71 and an analog switch circuit 72. The IO port expansion circuit 71 is in communication connection with a core board backplane through I2C, and provides 96 IO ports for the analog switch circuit 72. The analog switch circuit 72 can receive various signals from the computer motherboard under test, including but not limited to a UART signal, an I2C signal, an SWD signal, a USB2.0 signal, and a computer motherboard control signal under test, and can also transmit corresponding signals to the core board backplane 11. The voltage and current test points set on the computer mainboard to be tested are provided with special test channels to the core board bottom board.

As shown in fig. 13, the computer firmware update communication board 8 is respectively connected to the host computer 1, the core board 2 and the computer motherboard 5 to be tested. The main function of the computer firmware updating communication board is to increase the quality of high-speed signals on the USB2.0 and USB3.0 interfaces through the USB2.0 relay chip and the USB3.0 relay chip so as to ensure the reliability of data transmission. And two USB signals (USB 2.0 and USB 3.0) are controlled by two control signals to communicate with a computer. Specifically, the computer firmware update communication board 8 includes a USB2.0 relay chip 81, a USB3.0 relay chip 82, and a high-speed switch 83. One end of the USB2.0 relay chip 81 is connected with the high-speed switch 83, the other end of the relay chip is connected with the upper computer 1, the other end of the high-speed switch is connected with the computer mainboard 9 to be tested, and the high-speed switch 83 is connected with the signal adapter plate. The USB3.0 relay chip 82 is respectively connected with the upper computer 1, the computer mainboard 5 to be tested and the signal adapter board. The USB2.0 relay chip 81 and the USB3.0 relay chip 82 are connected to the signal adapter board 7 by control signal lines.

Compared with the prior art, the utility model discloses a modular design has promoted the compatibility of platform widely, has also reduced the cost of firmware upgrading, and the upgrading cycle is short, and the integrated level of each board is high, and the function is perfect. When the computer mainboards of different types are used for updating the firmware and the upgraded computer mainboards are used for updating the firmware, the computer mainboards can be put into production test immediately after the standard test platform for updating the firmware of the computer mainboards is not changed or the standard test platform for updating the firmware of the computer mainboards is rarely changed. Therefore, the research and development period of the test equipment is shortened, and the cost investment of manufacturers is reduced.

Claims (8)

1. A standard test platform architecture for updating computer mainboard firmware is characterized in that: it includes host computer (1), with host computer (1) internet access's nuclear core plate (2), with automatically controlled board (3) that host computer (1) is connected, with horizontal pick-up board (4) that automatically controlled board (3) are connected and setting are in at least one test channel (6) between nuclear core plate (2) and computer mainboard (5) that awaits measuring, test channel (6) are including signal keysets (7), computer firmware update communication board (8), test point keysets (9) and power, signal keysets (7) with nuclear core plate (2) are connected, computer firmware update communication board (8) respectively with host computer (1) and signal keysets (7) are connected, test point keysets (9) with signal keysets (7) are connected, computer mainboard (5) that await measuring through the probe respectively with computer firmware update communication board (8) and test point keysets (9) And the power supply is connected with the signal transfer board (7).

2. The standard test platform architecture for updating firmware of a computer motherboard according to claim 1, wherein: it still includes scanning rifle (10), scanning rifle (10) with core plate (2) are connected.

3. The standard test platform architecture for updating firmware of a computer motherboard according to claim 2, wherein: it still includes nuclear core plate bottom plate (11), be provided with at least one confession on nuclear core plate bottom plate (11) the port that nuclear core plate (2) was pegged graft.

4. The standard test platform architecture for updating firmware of a computer motherboard according to claim 3, wherein: the signal transfer board (7) comprises a power module board (12), the power module board (12) supplies power for the whole platform, the power supply comprises a switching power supply (13), and the switching power supply (13) is connected with the power module board (12).

5. The standard test platform architecture for updating firmware of a computer motherboard according to claim 4, wherein: the power supply further comprises an analog battery (14), and the analog battery (14) is connected with the power module board (12).

6. The standard test platform architecture for updating firmware of a computer motherboard according to claim 4, wherein: the signal adapter plate (7) further comprises a debugging module plate (15).

7. The standard test platform architecture for updating firmware of a computer motherboard according to claim 1, wherein: the electronic control board (3) is further connected with an indicator lamp panel (16), and the electronic control board (3) is further connected with a sensor, a switch, a key and a cooling fan of the whole platform.

8. The standard test platform architecture for updating firmware of a computer motherboard according to claim 3, wherein: the core board base plate (11) is provided with four ports for the core board (2) to be plugged.

Images