CN211426702U - Testing device for server board card power supply overcurrent and short circuit protection - Google Patents
Testing device for server board card power supply overcurrent and short circuit protection Download PDFInfo
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- CN211426702U CN211426702U CN201921975785.9U CN201921975785U CN211426702U CN 211426702 U CN211426702 U CN 211426702U CN 201921975785 U CN201921975785 U CN 201921975785U CN 211426702 U CN211426702 U CN 211426702U
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Abstract
The embodiment of the utility model discloses a testing arrangement for server integrated circuit board power overcurrent short-circuit protection, including main control unit, overcurrent control unit, short circuit control unit and current sampling unit, main control unit is used for controlling overcurrent control unit and switches on, main control unit is used for controlling short circuit control unit and switches on, main control unit is used for receiving current sampling unit's test current data, overcurrent control unit is used for exporting test current, short circuit control unit is used for testing current short circuit, current sampling unit is used for gathering test current, and test current is the output Vout of whole device. The embodiment of the utility model provides a device, OCP and SCP's test is realized to application automatic control's mode to test environment builds inconvenience and the high problem of operating safety factor among the solution prior art.
Description
Technical Field
The utility model relates to a server integrated circuit board power technical field, concretely relates to a testing arrangement for server integrated circuit board power overcurrent short-circuit protection.
Background
The integrated circuit is a novel semiconductor device developed from the later 50 s to the 60 s in the 20 th century, the integrated circuit is rapidly developed in the next decades, the core voltage of the chip is continuously reduced from 0.35um, 0.18um, 0.13um to the current 40nm or even 28nm due to the continuous improvement of the chip process, and the chip is more and more sensitive to the fluctuation of a power supply from 3.3V, 1.8V, 1.5V to 0.9V of the device of 40 nm. Maintaining the integrity of the power supply means maintaining a stable supply of power to the power supply.
There are 2 important indexes in the power integrity test specification, namely OCP and SCP (over current protection and short circuit protection), and the protection function is to ensure that when the VR chip is overloaded slowly or is overloaded instantaneously, the output is closed quickly, so that the VR chip is protected, and the back end circuit is prevented from being out of order.
In the process of verifying the power integrity of the server board card, the load current required by the core voltage of the CPU is very large, and if the configured CPU has a special test fixture, the test fixture can be used for carrying to test the OCP; if no special jig is available, the test can be carried out only through the electronic load; when the SCP is tested, because the current is large, the instantaneous power of an electronic load cannot meet the requirement, and the SCP function is realized by using a mode of short circuit of a knife switch.
When the electronic load is used for testing the OCP, the maximum load current of the electronic load of a single channel can reach 240A. For a 12V system, when the current required by the kernel exceeds 240A, a plurality of electronic loads are required to be connected in parallel, and the carrying of a test platform is inconvenient; for 54V systems, too, a large overcurrent protection current requires multiple loads in parallel. When a knife switch is used for testing SCP, when the testing voltage is larger, electric arcs can be generated at the moment of short circuit, and the danger coefficient is higher.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides an in provide a testing arrangement for server integrated circuit board power overcurrent short-circuit protection, application automatic control's mode realizes the test of OCP and SCP to test environment builds the problem inconvenient and that operating safety factor is high among the solution prior art.
The embodiment of the utility model discloses following technical scheme:
the utility model provides a testing arrangement for server board card power supply overcurrent short-circuit protection, including main control unit, overcurrent control unit, short circuit control unit and current sampling unit, main control unit connects overcurrent control unit, short circuit control unit and current sampling unit, overcurrent control unit connects short circuit control unit and current sampling unit;
the main control unit is used for controlling the conduction of the overcurrent control unit, the main control unit is used for controlling the conduction of the short-circuit control unit, the main control unit is used for receiving test current data of the current sampling unit, the overcurrent control unit is used for outputting test current, the short-circuit control unit is used for short-circuiting the test current, the current sampling unit is used for collecting the test current, and the test current is output Vout of the whole device.
Furthermore, the overcurrent control unit comprises a transistor array chip U5, a power resistor, a protective tube and an NMOS tube, wherein the U5 is provided with n input ends and n output ends, and the number of the power resistor, the protective tube and the NMOS tube is n;
the input end of U5 is connected the main control unit, the G utmost point of NMOS pipe of the same kind is connected to every way output of U5, the S utmost point of every way NMOS pipe is connected the one end of power resistor of the same kind, the other end of every way power resistor is connected power P12V, the D utmost point of every way NMOS pipe is connected the one end of insurance pipe of the same kind, the other end of n way insurance pipe is connected the back and is connected the server integrated circuit board in parallel.
Further, the short circuit control unit includes relay K1 and contactor coil K2, and contactor coil K2 connects the main control unit, and contactor coil K2 is connected to relay K1's coil, and the one end of fuse FN1 is connected to relay K1's normally open contact, and the other end of fuse FN1 connects the server integrated circuit board.
Further, the current sampling unit comprises an operational amplifier U3 and a current sensor U4, a signal input end of the current sensor U4 is connected with an input end of the operational amplifier U3 and one end of a resistor R3, the other end of the resistor R3 is grounded, a power supply positive electrode +12V of the current sensor U4 is connected with a power supply P12V, a ground end GND and a power supply negative electrode-12V of the current sensor U4 are grounded, and an output end of the operational amplifier U3 is connected with the main control unit.
Further, the main control unit comprises a control chip U1, the U1 comprises a relay control port, a temperature acquisition port, a fan control port, a current acquisition port, a communication port and an overcurrent control port, the overcurrent control port of the U1 is multiple, the overcurrent control port of the U1 is connected with the input end of the transistor array chip U5 in a one-to-one correspondence manner, the relay control port of the U1 is connected with a contactor coil K2, the temperature acquisition port of the U1 is connected with the temperature acquisition unit, the fan control port of the U1 is connected with the fan control unit, the current acquisition port of the U1 is connected with the output end of the operational amplifier U3, and the communication port of the U1 is connected with a PC through an RS232 conversion chip U2.
Further, the device also comprises a temperature acquisition unit, wherein the temperature acquisition unit comprises a thermistor NTC, and the thermistor NTC is connected with a current acquisition port of the U1.
Further, the device also comprises a FAN control unit, the FAN control unit comprises a resistor R1, a resistor R2 and a resistor R4, one end of the resistor R1 is connected with the first FAN control port of the U1, the other end of the resistor R1 is connected with VCC through a resistor R4, the other end of the resistor R1 is connected with the PWM signal of the FAN FAN, one end of the resistor R2 is connected with the second FAN control port of the U1, the other end of the resistor R2 is connected with the Fault signal of the FAN FAN, the 12V signal of the FAN FAN is connected with the power supply P12V, and the GND signal of the FAN FAN is grounded.
The effects provided in the contents of the present invention are only the effects of the embodiments, not all the effects of the present invention, and one of the above technical solutions has the following advantages or advantageous effects:
1) the utility model provides a testing arrangement for server integrated circuit board power overcurrent short-circuit protection, the test current that the analytic server integrated circuit board of control chip U1 needs, the corresponding test current of overcurrent control port control NMOS pipe output, the overcurrent protection of VR chip on the trigger server integrated circuit board compares current test method, and this device has test environment and builds simply, and convenient operation safety's characteristics, improvement efficiency of software testing that can be very big.
2) The utility model provides a testing arrangement for server integrated circuit board power overcurrent short-circuit protection, control chip U1's relay control port control relay K1 is closed, with the output short circuit of VR chip on the server integrated circuit board, triggers the short-circuit protection of VR chip, compares current test method, and this device adopts relay control switch's mode, and the factor of safety of operation is higher more reliable.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a block diagram of the circuit structure of the present invention;
fig. 2 is a schematic diagram of an overcurrent control unit and a short-circuit control unit of the circuit according to the embodiment of the present invention;
fig. 3 is a schematic diagram of a current sampling unit and a fan control unit of the circuit according to the embodiment of the present invention.
Detailed Description
In order to clearly illustrate the technical features of the present invention, the present invention is explained in detail by the following embodiments in combination with the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. In order to simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted so as to not unnecessarily limit the invention.
The utility model provides a device, the mode of application automatic control realizes the test of OCP (OverCURRENTREPROCEMENT, overcurrent protection) and SCP (ShortCircuit protecting).
As shown in fig. 1, for the utility model discloses the structure block diagram of device, device include main control unit, overflow the control unit, short circuit control unit and current sampling unit, and main control unit connects overflow control unit, short circuit control unit and current sampling unit, overflows the control unit and connects short circuit control unit and current sampling unit.
The main control unit is used for controlling the conduction of the overcurrent control unit, the main control unit is used for controlling the conduction of the short-circuit control unit, the main control unit is used for receiving test current data of the current sampling unit, the overcurrent control unit is used for outputting test current, the short-circuit control unit is used for short-circuiting the test current, the current sampling unit is used for collecting the test current, and the test current is output Vout of the whole device.
The overcurrent control unit comprises a transistor array chip U5, n paths of power resistors, n paths of protective tubes and n paths of NMOS tubes, and the U5 is provided with n paths of input ends and n paths of output ends;
the input end of the U5 is connected with the main control unit;
the first output end of the U5 is connected with the G pole of an NMOS tube G1, the S pole of the NMOS tube G1 is connected with one end of a power resistor RR1, the other end of the power resistor RR1 is connected with a power supply P12V, and the D pole of the NMOS tube G1 is connected with one end of a fuse FL 1;
the second output end of the U5 is connected with the G pole of an NMOS tube G2, the S pole of the NMOS tube G2 is connected with one end of a power resistor RR2, the other end of the power resistor RR2 is connected with a power supply P12V, and the D pole of the NMOS tube G2 is connected with one end of a fuse FL 2;
…；
the nth output end of the U5 is connected with the G pole of an NMOS transistor Gn, the S pole of the NMOS transistor Gn is connected with one end of a power resistor RRn, the other end of the power resistor RRn is connected with a power supply P12V, and the D pole of the NMOS transistor Gn is connected with one end of a protective tube FLn;
the other ends of the protective tubes FL 1-FLn are connected in parallel and then connected with the server board card.
The transistor array chip U5 is of a type ULN2003, and the ULN2003 is a high-voltage-withstanding and high-current composite transistor array and consists of seven silicon NPN composite transistors. ULN2003 is a 7-way inverter circuit, with the ULN2003 output being low when the input is high and the ULN2003 output being high when the input is low. The ULN2003 is used for controlling the on and off of the high-power NMOS tube.
The utility model discloses the NMOS pipe model is the British flying Rabbit BSC011N03LS (12V system), and the Ic of every MOS pipe is 100A, and series-parallel connection through power resistor itself can satisfy various voltage class's OCP, SCP.
The short circuit control unit comprises a relay K1(G2R-1) and a contactor coil K2(ABBGAF460), wherein the contactor coil K2 is connected with the main control unit, the coil of the relay K1 is connected with a contactor coil K2, the normally open contact of the relay K1 is connected with one end of a fuse FN1, and the other end of the fuse FN1 is connected with a server board card.
The relay (G2R-1) is provided with an arc extinguishing cover and a fuse, can effectively prevent electric arcs with large current, and is safe and reliable.
The current sampling unit comprises an operational amplifier U3(TLC2274) and a current sensor U4(LF505-S), wherein the signal input end of the current sensor U4 is connected with the input end of the operational amplifier U3 and one end of a resistor R3, the other end of the resistor R3 is grounded, the positive +12V of a power supply of the current sensor U4 is connected with the power supply P12V, the ground end GND and the negative-12V of the power supply of the current sensor U4 are grounded, and the output end of the operational amplifier U3 is connected with the main control unit. The current sensor U4 is used to test the current value and transmit it to the master control unit.
The main control unit comprises a control chip U1, U1 comprises a relay control port, a temperature acquisition port, a fan control port, a current acquisition port, a communication port and an overcurrent control port, the overcurrent control port of U1 is multiple, the overcurrent control port of U1 is connected with the input end of a transistor array chip U5 in a one-to-one correspondence mode, the relay control port of U1 is connected with a contactor coil K2, the temperature acquisition port of U1 is connected with the temperature acquisition unit, the fan control port of U1 is connected with the fan control unit, the current acquisition port of U1 is connected with the output end of an operational amplifier U3, and the communication port of U1 is connected with a PC through an RS232 conversion chip U2.
The control chip U1 is STM32F446RC of ST, or TMS320F2808 of TI or R7F0C008 of Rysa.
The device also comprises a temperature acquisition unit, wherein the temperature acquisition unit comprises a thermistor NTC, and the thermistor NTC is connected with a current acquisition port of the U1.
The device also comprises a FAN control unit, wherein the FAN control unit comprises a resistor R1, a resistor R2 and a resistor R4, one end of the resistor R1 is connected with a first FAN control port of the U1, the other end of the resistor R1 is connected with VCC through a resistor R4, the other end of the resistor R1 is connected with a PWM signal of the FAN FAN, one end of the resistor R2 is connected with a second FAN control port of the U1, the other end of the resistor R2 is connected with a Fault signal of the FAN FAN, a 12V signal of the FAN FAN is connected with a power supply P12V, and a GND signal of the FAN FAN is grounded.
The NMOS tube is arranged on a customized radiator, the thermistor NTC on the radiator collects the temperature of the radiator, and the control chip U1 receives a temperature signal and controls the fan to radiate the radiator, so that the MOS tube is prevented from being damaged due to overheating.
The office computer that the tester used passes through the serial ports communication with the utility model discloses the device communication sends different test instruction.
When testing the OCP, a tester sends an OCP protection value to the control chip U1, the U1 controls a corresponding number of overcurrent protection ports to be opened according to the current value, and the overcurrent protection ports control the NMOS tube to be conducted and output a test current; when the output current of the VR chip on the server board card reaches an OCP value, protection is performed; after the OCP test is completed, the control chip U1 issues a current zero clearing instruction through the overcurrent protection port, and all NMOS tubes are closed.
When SCP is tested, a tester sends SCP information to the control chip U1, the relay control port of the U1 attracts the relay, and therefore the positive and negative electrode outputs of the VR are in short circuit, and SCP protection occurs.
The utility model discloses the current-carrying capacity of the load line of the OCP functional part of device needs to satisfy the OCP setting value, and the sectional area of the load line of SCP is as big as possible to satisfy great SCP value.
The above description is only a preferred embodiment of the present invention, and it will be apparent to those skilled in the art that a plurality of modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations are also considered as the protection scope of the present invention.
Claims (7)
1. A testing device for overcurrent and short-circuit protection of a server board card power supply is characterized by comprising a main control unit, an overcurrent control unit, a short-circuit control unit and a current sampling unit, wherein the main control unit is connected with the overcurrent control unit, the short-circuit control unit and the current sampling unit;
the main control unit is used for controlling the conduction of the overcurrent control unit, the main control unit is used for controlling the conduction of the short-circuit control unit, the main control unit is used for receiving test current data of the current sampling unit, the overcurrent control unit is used for outputting test current, the short-circuit control unit is used for short-circuiting the test current, the current sampling unit is used for collecting the test current, and the test current is output Vout of the whole device.
2. The test device for the server board power supply overcurrent and short-circuit protection as claimed in claim 1, wherein the overcurrent control unit includes a transistor array chip U5, a power resistor, a fuse and an NMOS transistor, U5 has n input terminals and n output terminals, and the number of the power resistor, the fuse and the NMOS transistor is n;
the input end of U5 is connected the main control unit, the G utmost point of NMOS pipe of the same kind is connected to every way output of U5, the S utmost point of every way NMOS pipe is connected the one end of power resistor of the same kind, the other end of every way power resistor is connected power P12V, the D utmost point of every way NMOS pipe is connected the one end of insurance pipe of the same kind, the other end of n way insurance pipe is connected the back and is connected the server integrated circuit board in parallel.
3. The testing device for the power supply overcurrent and short-circuit protection of the server board card as claimed in claim 1, wherein the short-circuit control unit comprises a relay K1 and a contactor coil K2, the contactor coil K2 is connected with the main control unit, a coil of the relay K1 is connected with the contactor coil K2, a normally open contact of a relay K1 is connected with one end of a fuse FN1, and the other end of the fuse FN1 is connected with the server board card.
4. The testing device for the server board power supply overcurrent short-circuit protection as claimed in claim 1, wherein the current sampling unit comprises an operational amplifier U3 and a current sensor U4, a signal input end of the current sensor U4 is connected with an input end of the operational amplifier U3 and one end of a resistor R3, the other end of the resistor R3 is grounded, a power supply positive electrode +12V of the current sensor U4 is connected with a power supply P12V, a ground end GND and a power supply negative electrode-12V of the current sensor U4 are grounded, and an output end of the operational amplifier U3 is connected with the main control unit.
5. The testing device for the server board power supply overcurrent short-circuit protection as claimed in claim 1, wherein the main control unit includes a control chip U1, the U1 includes a relay control port, a temperature acquisition port, a fan control port, a current acquisition port, a communication port and an overcurrent control port, the overcurrent control port of the U1 is plural, the overcurrent control port of the U1 is connected with the input end of the transistor array chip U5 in a one-to-one correspondence manner, the relay control port of the U1 is connected with the contactor coil K2, the temperature acquisition port of the U1 is connected with the temperature acquisition unit, the fan control port of the U1 is connected with the fan control unit, the current acquisition port of the U1 is connected with the output end of the operational amplifier U3, and the communication port of the U1 is connected with the PC through the RS232 conversion chip U2.
6. The testing device for the server board power supply overcurrent short-circuit protection as recited in claim 1, further comprising a temperature acquisition unit, the temperature acquisition unit comprising a thermistor NTC, the thermistor NTC being connected to the current acquisition port of U1.
7. The testing device for the server board power supply overcurrent and short-circuit protection, as set forth in claim 1, further comprising a FAN control unit, wherein the FAN control unit comprises a resistor R1, a resistor R2 and a resistor R4, one end of the resistor R1 is connected to the first FAN control port of U1, the other end of the resistor R1 is connected to VCC through a resistor R4, the other end of the resistor R1 is connected to the PWM signal of the FAN, one end of the resistor R2 is connected to the second FAN control port of U1, the other end of the resistor R2 is connected to the Fault signal of the FAN, the 12V signal of the FAN is connected to the power supply P12V, and the GND signal of the FAN is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921975785.9U CN211426702U (en) | 2019-11-15 | 2019-11-15 | Testing device for server board card power supply overcurrent and short circuit protection |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921975785.9U CN211426702U (en) | 2019-11-15 | 2019-11-15 | Testing device for server board card power supply overcurrent and short circuit protection |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112964952A (en) * | 2021-02-19 | 2021-06-15 | 山东英信计算机技术有限公司 | Server test system |
| CN115201611A (en) * | 2022-07-29 | 2022-10-18 | 苏州浪潮智能科技有限公司 | Method for testing VR power supply stability of CPU and related components |
| CN115808640A (en) * | 2023-02-09 | 2023-03-17 | 苏州浪潮智能科技有限公司 | Power failure detection circuit, method, system, electronic device, and storage medium |
-
2019
- 2019-11-15 CN CN201921975785.9U patent/CN211426702U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112964952A (en) * | 2021-02-19 | 2021-06-15 | 山东英信计算机技术有限公司 | Server test system |
| CN115201611A (en) * | 2022-07-29 | 2022-10-18 | 苏州浪潮智能科技有限公司 | Method for testing VR power supply stability of CPU and related components |
| CN115201611B (en) * | 2022-07-29 | 2024-01-19 | 苏州浪潮智能科技有限公司 | Method for testing VR power supply stability of CPU and related components |
| CN115808640A (en) * | 2023-02-09 | 2023-03-17 | 苏州浪潮智能科技有限公司 | Power failure detection circuit, method, system, electronic device, and storage medium |
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