CN211063589U - Switch control circuit - Google Patents

Switch control circuit Download PDF

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Publication number
CN211063589U
CN211063589U CN201921432436.2U CN201921432436U CN211063589U CN 211063589 U CN211063589 U CN 211063589U CN 201921432436 U CN201921432436 U CN 201921432436U CN 211063589 U CN211063589 U CN 211063589U
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switch
circuit
resistor
switch tube
capacitor
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CN201921432436.2U
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Inventor
姚金超
李永善
代萌
杜运峰
王莉
俞咪娜
杨舒音
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Shanghai Railway Communication Co Ltd
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Shanghai Railway Communication Co Ltd
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Abstract

The utility model relates to a switch control circuit, including reset switch, the pulse generating circuit, electronic switch circuit, first delay switch circuit and second delay switch circuit, electronic switch circuit includes first switch tube and bleeder circuit, bleeder circuit's partial pressure output is connected to the grid of first switch tube, the input is connected to the source electrode of power input end and first switch tube respectively, the output is through first delay switch circuit ground connection, first delay switch circuit's control signal input is connected to second delay switch circuit's output and the drain electrode of first switch tube respectively, and be connected to power input end through reset switch, the input of second delay switch circuit is connected to power input end through reset switch, the control signal input is connected to the drain electrode of first switch tube. Compared with the prior art, the utility model discloses a first time delay switch circuit and second time delay switch circuit, cooperation pulse generating circuit, reset switch can produce multiple signal combination.

Description

Switch control circuit
Technical Field
The present invention relates to a switch control circuit, and more particularly to a one-key multi-function switch control circuit for a portable electronic device.
Background
"one-key-multi-function" means a control operation in which one switch can implement a plurality of functions for an apparatus. Since the portable electronic device, especially the electronic device dedicated for railway, cannot be powered by the commercial power outdoors and has a long construction operation time, it may take a whole day to return to the construction site for supplementing the electric power, so that the portable electronic device is required to ensure the electric power supply for one day. However, in order to meet the requirement of portability, a portable device cannot be provided with an ultra-large-capacity battery, so that the device is often "knocked" due to the fact that the device is always in an elbow form in terms of electricity during actual use, and the current method can only be used with a spare battery.
The problem of 'electricity shortage' of portable equipment is solved, except that the battery that selects for use capacity density is high, still need carry out reasonable arrangement and management to the equipment power consumption. During field construction, the portable device is often required to be frequently used, but because the device is started for a long time and complicated operations such as initialization are required, a user generally does not want to save power by frequently switching the device on and off, so that the device can be used up quickly and cannot be used continuously, and therefore, the operation of power management of the portable device is easy and simple through an optimized design, which is particularly necessary. The utility model discloses a shift knob just can the opening of controlgear power with close and let the functional circuit that the part is not needed temporarily carry out the on-off control circuit of "dormancy" and "awaken up" through it to reach the mesh of saving electric energy extension portable equipment live time. The existing one-key multi-function realization is realized by software control, and the reliability or effect is not as good as that of a hardware circuit.
SUMMERY OF THE UTILITY MODEL
The present invention is directed to overcome the above-mentioned drawbacks of the prior art and to provide a one-key multi-function switch control circuit for a portable electronic device.
The purpose of the utility model can be realized through the following technical scheme:
a switch control circuit comprises a reset switch, a pulse generating circuit, an electronic switch circuit, a first delay switch circuit and a second delay switch circuit, wherein the electronic switch circuit comprises a first switch tube and a voltage division circuit, the voltage division output end of the voltage division circuit is connected to the grid electrode of the first switch tube, the input ends of the voltage division output end of the voltage division circuit are respectively connected to a power supply input end and the source electrode of the first switch tube, the output end of the voltage division circuit is grounded through the first delay switch circuit, the control signal input end of the first delay switch circuit is respectively connected to the output end of the second delay switch circuit and the drain electrode of the first switch tube and is connected to the power supply input end through the reset switch, the input end of the second delay switch circuit is connected to the power supply input end through the reset switch, the control signal input end of the voltage division circuit is connected to the drain electrode of, the input end of the pulse generating circuit is connected to the power supply input end, and the output end of the pulse generating circuit is connected to the controlled equipment.
The control circuit further comprises an L ED indicator light, one end of the L ED indicator light is connected to the drain electrode of the first switch tube, and the other end of the L ED indicator light is grounded.
An eleventh resistor is arranged between the L ED indicator light and the drain electrode of the first switching tube.
The first delay switch circuit comprises a second switch tube and a first capacitor, the drain electrode of the second switch tube is connected to the output end of the voltage division circuit, the source electrode of the second switch tube is grounded and is connected to the negative electrode of the first capacitor, and the grid electrode of the second switch tube is connected to the power supply input end through the reset switch and is respectively connected to the positive electrode of the first capacitor and the drain electrode of the first switch tube.
And the two ends of the first capacitor are connected with a third resistor in parallel, a tenth resistor is arranged between the grid electrode of the second switch tube and the drain electrode of the first switch tube, and a sixth diode and a ninth resistor are sequentially arranged between the reset switch and the grid electrode of the second switch tube.
The second delay switch circuit comprises a third switch tube, a fourth switch tube, a second capacitor and a third capacitor, wherein the drain electrode of the fourth switch tube is connected to the power input end through the reset switch, the source electrode of the fourth switch tube is connected to the grid electrode of the third switch tube, the grid electrode of the fourth switch tube is connected to the drain electrode of the first switch tube and is grounded through the third capacitor, the grid electrode of the third switch tube is grounded through the second capacitor, the source electrode of the third switch tube is grounded, and the drain electrode of the third switch tube is connected to the grid electrode of the second switch.
The two ends of the second capacitor are connected with a fifth resistor in parallel, a fourth resistor is arranged between the drain electrode of the third switch and the anode of the first capacitor, a fifth diode and a sixth resistor are arranged between the grid electrode of the fourth switch tube and the drain electrode of the first switch tube, the fifth diode and the sixth resistor are connected in parallel, and a seventh resistor is arranged between the drain electrode of the fourth switch tube and the reset switch.
The reset switch is also grounded through an eighth resistor.
The pulse generating circuit comprises a fourth capacitor, an eighth switch tube, a ninth switch tube, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a twelfth polar tube, wherein the grid electrode of the eighth switch tube is connected to the power supply input end through the reset switch and is grounded through the thirteenth resistor, the source electrode of the eighth switch tube is grounded, the drain electrode of the eighth switch tube is connected to the power supply input end through the fourteenth resistor and is connected to the anode of the fourth capacitor through the fifteenth resistor, the base electrode of the ninth switch tube is connected to the cathode of the fourth capacitor and the cathode of the twelfth polar tube, the emitter electrode of the ninth switch tube is extremely low, the collector electrode of the ninth switch tube is connected to controlled equipment, and is connected to a 5V power.
The voltage dividing circuit is formed by connecting a first resistor and a second resistor in series.
Compared with the prior art, the utility model discloses following beneficial effect has:
1) the first delay switch circuit and the second delay switch circuit can realize that one reset switch simultaneously controls the on and off of the first switch tube, and the reset switch can generate various signal combinations in cooperation with the pulse generating circuit.
2) Through having set up L ED pilot lamp, can be after first delay switch circuit acts on, the information that switches on of the first switch tube of feedback to in time loosen reset switch, avoid second delay switch circuit to be effective.
3) The first delay switch circuit is obtained through the second switch tube and the first capacitor, and the circuit is simple in structure.
4) The combination of the second delay switch circuit and the first delay circuit may avoid excessively fast switching states.
5) The output of the drain of the first switch tube can be used for keeping the first delay switch circuit continuously conducted and laying down the effect of the second delay switch circuit.
Drawings
Fig. 1 is a schematic structural diagram of an embodiment of the present invention;
FIG. 2 is a schematic structural view of the present invention;
wherein: 1. the device comprises a pulse generating circuit 2, an electronic switch circuit 3, a main control circuit 4, a display 5 and a reader-writer control panel.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. The embodiment is implemented on the premise of the technical solution of the present invention, and a detailed implementation manner and a specific operation process are given, but the scope of the present invention is not limited to the following embodiments.
A switch control circuit, as shown in FIG. 2, comprises a reset switch S1, a pulse generating circuit 1, an electronic switch circuit 2, a first delay switch circuit and a second delay switch circuit, wherein the first delay switch circuit and the second delay switch circuit form a main control circuit 3, the electronic switch circuit 2 comprises a first switch tube V1 and a voltage dividing circuit, the voltage dividing circuit is composed of a first resistor R1 and a second resistor R2 which are connected in series, the voltage dividing output end of the voltage dividing circuit is connected to the grid of the first switch tube V1, the input ends are respectively connected to the power supply input end and the source of the first switch tube V1, the output end is grounded through the first delay switch circuit, the control signal input end of the first delay switch circuit is respectively connected to the output end of the second delay switch circuit and the drain of the first switch tube V1 and is connected to the power supply input end through a reset switch S1, the input end of the second delay switch circuit is connected to the power supply input end through a reset switch S1, the control signal input end is connected to the drain of the first switch tube V1, the drain of the first switch tube V1 is connected to the controlled device, the input end of the pulse generating circuit 1 is connected to the power supply input end, and the output end is connected to the controlled device.
The first time delay switch circuit and the second time delay switch circuit can realize that one reset switch S1 controls the on and off of the first switch tube V1 at the same time, and the reset switch S1 can generate various signal combinations in cooperation with the pulse generating circuit 1.
The control circuit also comprises a L ED indicator light, one end of the L ED indicator light is connected to the drain electrode of the first switch tube V1, the other end of the L ED indicator light is grounded, and after the first delay switch circuit is started, the L ED indicator light can feed back the conduction information of the first switch tube V1, so that the reset switch S1 is released in time, and the second delay switch circuit is prevented from being effective.
The first delay switch circuit comprises a second switch tube V2 and a first capacitor C1, the drain of the second switch tube V2 is connected to the output end of the voltage division circuit, the source is grounded and is connected to the cathode of the first capacitor C1, the gate is connected to the power supply input end through a reset switch S1 and is respectively connected to the anode of the first capacitor C1 and the drain of the first switch tube V1.
A third resistor R3 is connected in parallel with two ends of the first capacitor C1, a tenth resistor R10 is arranged between the gate of the second switch tube V2 and the drain of the first switch tube V1, and a sixth diode V6 and a ninth resistor R9 are sequentially arranged between the reset switch S1 and the gate of the second switch tube V2.
The second delay switch circuit comprises a third switch tube V3, a fourth switch tube V4, a second capacitor C2 and a third capacitor C3, wherein the drain electrode of the fourth switch tube V4 is connected to the power supply input end through a reset switch S1, the source electrode is connected to the grid electrode of the third switch tube V3, the grid electrode is connected to the drain electrode of the first switch tube V1 and is grounded through the third capacitor C3, the grid electrode of the third switch is grounded through a second capacitor C2, the source electrode is grounded, and the drain electrode is connected to the grid electrode of the second switch tube V2.
The two ends of the second capacitor C2 are connected in parallel with a fifth resistor R5, a fourth resistor R4 is arranged between the drain of the third switch and the anode of the first capacitor C1, a fifth diode V5 and a sixth resistor R6 are arranged between the gate of the fourth switch tube V4 and the drain of the first switch tube V1, the fifth diode V5 and the sixth resistor R6 are arranged in parallel, and a seventh resistor R7 is arranged between the drain of the fourth switch tube V4 and the reset switch S1.
The reset switch S1 is also connected to ground through an eighth resistor R8.
The pulse generating circuit 1 comprises a fourth capacitor C4, an eighth switch tube V8, a ninth switch tube V9, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15 and a twelfth diode V10, wherein the gate of the eighth switch tube V8 is connected to the power supply input end through a reset switch S1 and is grounded through a thirteenth resistor R13, the source is grounded, the drain is connected to the power supply input end through the fourteenth resistor R14 and is connected to the positive pole of the fourth capacitor C4 through the fifteenth resistor R15, the base of the ninth switch tube V9 is connected to the negative pole of the fourth capacitor C4 and the negative pole of the twelfth diode V10, the emitter is extremely low, the collector is connected to a controlled device, and the 5V power supply is connected through the sixteenth resistor R16.
The above circuit structure can be applied to various occasions, and is described in detail below for a transponder message reader/writer as an example, as shown in fig. 1, the collector of the ninth switch tube V9 is connected to the display, and the drain of the first switch tube V1 is connected to the reader/writer control board.
The first switch tube V1 adopts a high-power P-channel MOS tube, the model can adopt MTD2955, the power supply adopts a 12V dc power supply, the drain of the V1 is connected to a subsequent circuit of the device as the output terminal of the power supply, the S pole and the G pole of the V1 are connected by a resistor R1 with a resistance of 10K, and the G pole is connected from the R2 with a resistance of 10K to the drain of the V2.
V4, V3 and V2 are 3N-channel MOS tubes with specification of 2N7002, V8 is an N-channel MOS tube, diodes V5, V6, V7 and V10 in the circuit are all 1N4148, MOS tube V8 is 2N7002, triode V9 is 2N5551, electrolytic capacitors C1, C2, C3 and C4 are all 10u, and resistors are all 0805 chip resistors.
The transponder message reader is a portable device, a battery is normally connected in the device, and the reset button S1 is a normally open contact. Therefore, the working principle of the 'one-key multi-energy' switch control circuit of the portable electronic equipment is described in several cases:
1) before starting up: since the reset switch S1 is in the off state, the battery positive electrode (+12V) cannot reach the G pole of V8 through R12, cannot reach the D pole of V4 through R7, and cannot reach the G pole of V2 through V6 and R9; however, the +12V can reach the G pole of the V8 through the R14, and can reach the ground through the bes of the R15, the C4 and the V9, so that a current loop is formed, the C4 is charged until the full charge is achieved, the base of the V9 is turned on by the current flowing in the charging process, the potential of the C pole is changed from high to low, after the C4 is full, the base current of the V9 is zero and is turned off, the potential of the C pole is restored to high potential, that is, the ctrl end outputs 1 negative pulse to the outside, and at this time, other circuits of the device are not powered yet, so the pulse is invalid; +12V can also reach the G pole of V1 through R1 and then reach the D pole of V2 through R2; therefore, the MOS transistors V8, V4, V3, and V2 are all in the off state due to no on condition, and the V2 is turned off, so that the V1 cannot be turned on due to the negative bias, and the subsequent circuits of the device are in the off state. Because the MOS tube is in a grid insulation layer structure and the interelectrode is high-resistance, the power consumption of the whole machine is very low when the whole machine is in standby, only a few uA currents exist, and the whole machine can be placed for a long time.
2) Starting up: an operator presses an S1 button (about 2 seconds), +12V gets a forward voltage of about 6V at a G pole of V8 through R12 and R13 to the ground, so that V8 is conducted, C4 starts discharging through R15 and V10 until discharging is finished, and V9 keeps cut off because the base of V9 is always in reverse bias in the discharging process; pressing the button S1, the +12V reaches the D pole of V4 through R7, the +12V also reaches the G pole of V2 through V6 and R9, charging C1, making the G pole voltage gradually rise from zero, making the D pole of V3 obtain the same voltage through R4, when the voltage exceeds the conducting voltage of V2, V2 is conducted, grounding one end of R2, making the G pole voltage of V1 reduce from +12V to about 6V, making V1 conducted due to obtaining bias voltage, the electronic switch is turned on to output +12V, the indicator lamp lights, and the subsequent circuit of the device starts to work. After the operator sees the indicator light on or the screen is started, the button S1 is released, the output +12V is connected to the G pole of V2 through R10, and the V1 conduction state is maintained. The +12V output will also charge the C3 through R6, so that the G voltage of V4 gradually rises to +12V, and exceeds the V4 conducting voltage, but the S1 button is released at this time, and the D electrode of V4 has no voltage, so that V4 cannot be conducted, and only a preparation condition is provided for the shutdown of the device. Releasing button S1 also turns V8 off due to loss of G voltage, +12V resumes charging C4 through R14, R15 until full, V9 outputs 1 negative pulse to the display circuit, which is inactive since the device is still in start mode.
3) Sleeping and awakening: after the equipment is started, when one test is finished and a certain time is needed for the next test, in order to save electricity, the display screen and part of circuits are required to be closed, namely to be dormant; the sleep operation of the device requires one button click (pressed and released) S1, and we only analyze the principle of the display control circuit since the switch control circuit takes a long time (about 2 seconds) to function. When the S1 button is clicked, the +12V is rapidly added to the G pole of V8 through R12 to enable the G pole to be conducted, C4 is rapidly discharged, and V9 is kept cut off; after the S1 button is quickly released, the V8 is switched from on to off, the C4 starts to charge and is gradually filled, the V9 is switched to off after being switched on, and 1 negative pulse is output to trigger circuits such as a display screen and the like to realize dormancy. When retesting is needed, the dormant circuit is awakened, the button S1 needs to be clicked once again, and similarly, the V9 outputs 1 negative pulse to complete the awakening operation of the equipment.
4) When the S1 button is released, C1 discharges residual voltage through R5, C2 discharges electricity through R5, C3 discharges electricity through V5, R11, and ED L, and the circuit returns to the previous state.

Claims (10)

1. A switch control circuit is characterized by comprising a reset switch, a pulse generation circuit, an electronic switch circuit, a first delay switch circuit and a second delay switch circuit, wherein the electronic switch circuit comprises a first switch tube and a voltage division circuit, the voltage division output end of the voltage division circuit is connected to the grid electrode of the first switch tube, the input ends of the voltage division output end of the voltage division circuit are respectively connected to a power supply input end and the source electrode of the first switch tube, the output end of the voltage division circuit is grounded through the first delay switch circuit, the control signal input end of the first delay switch circuit is respectively connected to the output end of the second delay switch circuit and the drain electrode of the first switch tube and is connected to the power supply input end through the reset switch, the input end of the second delay switch circuit is connected to the power supply input end through the reset switch, the control signal input end of the first switch tube is connected to the drain electrode of, the input end of the pulse generating circuit is connected to the power supply input end, and the output end of the pulse generating circuit is connected to the controlled equipment.
2. The switch control circuit of claim 1, further comprising an L ED indicator light, wherein the L ED indicator light is connected to the drain of the first switch tube at one end and to ground at the other end.
3. The switch control circuit according to claim 2, wherein an eleventh resistor is provided between the L ED indicator light and the drain of the first switch tube.
4. The switch control circuit according to claim 1, wherein the first delay switch circuit comprises a second switch tube and a first capacitor, a drain of the second switch tube is connected to the output terminal of the voltage divider circuit, a source of the second switch tube is grounded and connected to a cathode of the first capacitor, and a gate of the second switch tube is connected to the power input terminal through the reset switch and is respectively connected to an anode of the first capacitor and a drain of the first switch tube.
5. The switch control circuit according to claim 4, wherein a third resistor is connected in parallel to two ends of the first capacitor, a tenth resistor is arranged between the gate of the second switch tube and the drain of the first switch tube, and a sixth diode and a ninth resistor are sequentially arranged between the reset switch and the gate of the second switch tube.
6. The switch control circuit according to claim 4, wherein the second delay switch circuit comprises a third switch tube, a fourth switch tube, a second capacitor and a third capacitor, a drain of the fourth switch tube is connected to the power input end through the reset switch, a source is connected to a gate of the third switch tube, a gate is connected to the drain of the first switch tube and is grounded through the third capacitor, a gate of the third switch is grounded through the second capacitor, a source is grounded, and a drain is connected to a gate of the second switch tube.
7. The switch control circuit according to claim 6, wherein a fifth resistor is connected in parallel to two ends of the second capacitor, a fourth resistor is arranged between a drain of the third switch and the anode of the first capacitor, a fifth diode and a sixth resistor are arranged between a gate of the fourth switch tube and the drain of the first switch tube, the fifth diode and the sixth resistor are arranged in parallel, and a seventh resistor is arranged between the drain of the fourth switch tube and the reset switch.
8. A switch control circuit as claimed in claim 6, wherein said reset switch is further connected to ground through an eighth resistor.
9. The switch control circuit according to claim 1, wherein the pulse generating circuit comprises a fourth capacitor, an eighth switch, a ninth switch, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a twelfth diode, the gate of the eighth switch is connected to the power input end through the reset switch and is grounded through the thirteenth resistor, the source is grounded, the drain is connected to the power input end through the fourteenth resistor and is connected to the anode of the fourth capacitor through the fifteenth resistor, the base of the ninth switch is connected to the cathode of the fourth capacitor and the cathode of the twelfth diode, the emitter is extremely low, the collector is connected to the controlled device, and the sixteenth resistor is connected to the 5V power supply.
10. The switch control circuit of claim 1, wherein the voltage divider circuit comprises a first resistor and a second resistor connected in series.
CN201921432436.2U 2019-08-30 2019-08-30 Switch control circuit Active CN211063589U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201921432436.2U CN211063589U (en) 2019-08-30 2019-08-30 Switch control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201921432436.2U CN211063589U (en) 2019-08-30 2019-08-30 Switch control circuit

Publications (1)

Publication Number Publication Date
CN211063589U true CN211063589U (en) 2020-07-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201921432436.2U Active CN211063589U (en) 2019-08-30 2019-08-30 Switch control circuit

Country Status (1)

Country Link
CN (1) CN211063589U (en)

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