CN211019184U - Data line compatible circuit based on data interface - Google Patents

Data line compatible circuit based on data interface Download PDF

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Publication number
CN211019184U
CN211019184U CN202020293188.4U CN202020293188U CN211019184U CN 211019184 U CN211019184 U CN 211019184U CN 202020293188 U CN202020293188 U CN 202020293188U CN 211019184 U CN211019184 U CN 211019184U
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pin
interface
data
analog circuit
circuit switch
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王熹
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Shanghai Sunmi Technology Group Co Ltd
Shanghai Sunmi Technology Co Ltd
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Shanghai Sunmi Technology Group Co Ltd
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Abstract

The utility model discloses a data line compatible circuit based on data interface, ADC detection module one end is connected with data interface's ID pin and is connected supply voltage VDD1 through resistance R1, CPU processor module is connected to the other end, binary channels analog circuit switch one end is connected respectively with data interface's DM pin and DP pin, the other end is connected respectively with single channel analog circuit switch 2, AUDIO data channel interface's L pin, USB data channel interface's DM pin and DP pin, single channel analog circuit switch 2 other end is connected respectively with AUDIO data channel interface's R pin and MIC2 pin, single channel analog circuit switch 1 both ends are connected with data interface's VBUS pin respectively, be connected with supply voltage VDD2, AUDIO data channel interface's MIC1 pin.

Description

Data line compatible circuit based on data interface
Technical Field
The utility model relates to a data line compatible circuit field, concretely relates to data line compatible circuit based on data interface.
Background
3.5mm earphone interface occupation space is great, earphone equipment based on the Micro USB interface has appeared at present, according to different customer's different demands, earphone equipment of the Micro USB interface has the condition of using different quantity's earphone speaker and earphone microphone, divide into the monophonic from the functional requirement and do not have the MIC, the binaural does not have the MIC, the monophonic is single MIC, the binaural is single MIC, the two MIC of monophonic etc., but present circuit can't be compatible above-mentioned all functional requirements, therefore, need the compatible circuit of a Micro USB interface in order to satisfy the needs to the earphone equipment to the Micro USB interface needs the condition of using different quantity's earphone speaker and earphone microphone.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem that the existing circuit can not be compatible mono does not have MIC, the binaural does not have MIC, mono single MIC, the single MIC of binaural, the double MIC of binaural all function demands, the utility model provides a data line compatible circuit based on data interface can utilize the ID pin to realize the detection of different external devices, utilizes VBUS and MIC 1's switching control circuit, utilizes R and MIC 2's switching control circuit, realizes the function of compatible earphone and data line, under the prerequisite that does not influence original function, compatible multiple earphone equipment; the conventional earphone interfaces are effectively reduced, and the space utilization rate of the whole earphone is improved; the use scene is not single any more, and the availability ratio is increased, so that the defects caused by the prior art are overcome.
In order to solve the technical problem, the utility model provides a following technical scheme:
in a first aspect, a data line compatible circuit based on a data interface comprises an ADC detection module, a CPU processor module, an AUDIO data channel interface, a USB data channel interface, a double-channel analog circuit switch, a single-channel analog circuit switch 1 and a single-channel analog circuit switch 2;
one end of the ADC detection module is connected with an ID pin of the data interface and is connected with a power supply voltage VDD1 through a resistor R1, and the other end of the ADC detection module is connected with the CPU processor module;
one end of the double-channel analog circuit switch is connected with a DM pin and a DP pin of the data interface respectively, and the other end of the double-channel analog circuit switch is connected with the single-channel analog circuit switch 2, an L pin of the AUDIO data channel interface, and a DM pin and a DP pin of the USB data channel interface respectively;
the other end of the single-channel analog circuit switch 2 is respectively connected with an R pin and an MIC2 pin of the AUDIO data channel interface;
one end of the single-channel analog circuit switch 1 is connected with a VBUS pin of the data interface, and the other end of the single-channel analog circuit switch 1 is respectively connected with a power voltage VDD2 and an MIC1 pin of the AUDIO data channel interface;
the CPU processor module is respectively connected with the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 in a control mode.
In the data line compatible circuit based on the data interface, a power management module is connected between the single-channel analog circuit switch 1 and the power supply voltage VDD 2.
The data line compatible circuit based on the data interface is characterized in that the data interface is externally connected with an earphone device interface, a data line interface or an OTG line interface.
The MIC1 pin, the R/MIC2 pin, the L pin, the earphone type detection pin, and the GND pin of the earphone device interface are respectively connected to the VBUS pin, the DM pin, the DP pin, the ID pin, and the GND pin of the data interface, the GND pin of the earphone device interface is grounded, and the earphone type detection pin of the earphone device interface is connected to the resistor R2;
and the GND pin of the data interface is grounded.
The data line compatible circuit based on the data interface is characterized in that the earphone device interface is inserted into the data interface, an earphone type detection pin of the earphone device interface is connected with an ID pin of the data interface, and the resistor R1 and the resistor R2 divide the power supply voltage VDD 1;
the ADC detection module detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module, the CPU processor module is respectively connected with the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module respectively controls the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
For earphone equipment (USB external earphone equipment) with different demands and externally connected earphone loudspeaker and earphone microphone, the earphone equipment can be distinguished by a resistor R2 (pull-down resistor) connected with an earphone type detection pin of an earphone equipment interface, and corresponding operation is realized by an ADC check module, when the earphone equipment interface is inserted into a data interface, the earphone type detection pin is connected with an ID pin of the data interface, a built-in resistor R1 (pull-up resistor) 470K of the ID pin, a resistor R2 (pull-down resistor) of the type detection pin divides the power voltage VDD1, the ADC detection module at the rear end of the ID pin reads divided voltage data information and uploads the divided voltage data information to a CPU processor module, the CPU processor module judges that the earphone equipment is inserted and confirms the type of the earphone equipment, and the CPU processor module respectively controls a dual-channel analog circuit switch, a single-channel analog circuit switch 1, And the single-channel analog circuit switch 2 completes the detection and judgment operation of the earphone equipment with various specifications.
When detecting that the earphone device is inserted, the USB external earphone device type detection and corresponding control are as follows:
1. when a single-channel MIC-free earphone is inserted, the ADC detection module judges that the type of the earphone insertion equipment is the single-channel MIC-free earphone, the CPU processor module controls the single-channel analog circuit switch 1 to be disconnected, the DM pin of the data interface is connected to the single-channel analog circuit switch 2 through the double-channel analog circuit switch, the single-channel analog circuit switch 2 is disconnected, the DP pin of the data interface is connected to the L pin of the AUDIO data channel interface through the double-channel analog circuit switch, and the function of the single-channel MIC-free earphone is realized;
2. when a dual-channel MIC-free earphone is inserted, the ADC detection module judges that the type of the earphone insertion equipment is the dual-channel MIC-free earphone, the CPU processor module controls to switch off the single-channel analog circuit switch 1 and switch on the single-channel analog circuit switch 2, the DM pin of the data interface is connected to the single-channel analog circuit switch 2 through the dual-channel analog circuit switch and is connected to the R pin of the AUDIO data channel interface through the single-channel analog circuit switch 2, the DP pin of the data interface is connected to the L pin of the AUDIO data channel interface through the dual-channel analog circuit switch, and the function of the dual-channel MIC-free earphone is;
3. when a single-AUDIO-channel single-MIC earphone is inserted, the ADC detection module judges that the type of the earphone device is the single-AUDIO-channel single-MIC earphone, the CPU processor module controls to disconnect a single-channel analog circuit switch 1, a DM pin of a data interface is connected to a single-channel analog circuit switch 2 through a double-channel analog circuit switch and is connected to an MIC2 pin of an AUDIO data channel interface through the single-channel analog circuit switch 2, and a DP pin of the data interface is connected to a L pin of the AUDIO data channel interface through the double-channel analog circuit switch, so that the single-AUDIO-channel MIC;
4. when a dual-channel single-MIC earphone is inserted, the ADC detection module judges that the type of the earphone inserting equipment is the dual-channel single-MIC earphone, the CPU processor module controls to be connected with a single-channel analog circuit switch 1, a VBUS pin of a data interface is connected to an MIC1 pin of an AUDIO data channel interface through the single-channel analog circuit switch 1 and is connected with a single-channel analog circuit switch 2, a DM pin of the data interface is connected to the single-channel analog circuit switch 2 through a dual-channel analog circuit switch and is connected to an R pin of the AUDIO data channel interface through the single-channel analog circuit switch 2, a DP pin of the data interface is connected to a L pin of the AUDIO data channel interface through the dual-channel analog circuit switch, and the;
5. when inserting two MIC earphones of monaural, ADC detection module judges that to insert earphone equipment type is two MIC earphones of monaural, CPU processor module control switch-on single channel analog circuit switch 1, data interface's VBUS pin is connected to the MIC1 pin of AUDIO data channel interface through single channel analog circuit switch 1, switch-on single channel analog circuit switch 2, data interface's DM pin is connected to single channel analog circuit switch 2 through the double-channel analog circuit switch, and be connected to the MIC2 pin of AUDIO data channel interface through single channel analog circuit switch 2, data interface's DP pin is connected to the L pin of AUDIO data channel interface through the double-channel analog circuit switch, realize two MIC earphone functions of monaural.
In a second aspect, the data line compatible circuit based on the data interface is described above, wherein the VNUS pin, the first DP pin, the second DP pin, the ID/NC pin, and the GND pin of the data line interface are respectively connected to the VBUS pin, the DM pin, the DP pin, the ID pin, and the GND pin of the data interface, the GND pin of the data line interface is grounded, and the ID/NC pin of the data line interface is connected to the ground through the resistor R2;
and the GND pin of the data interface is grounded.
The data line compatible circuit based on the data interface is characterized in that the data line interface is inserted into the data interface, an ID/NC pin of the data line interface is connected with an ID pin of the data interface, and the resistor R1 and the resistor R2 divide the power supply voltage VDD 1;
the ADC detection module detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module, the CPU processor module is respectively connected with the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module respectively controls the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
When a data line interface of a USB data line is inserted into a data interface, an ID/NC pin of the data line interface is connected to an ID pin of the data interface, a resistor R1 (pull-up resistor) 470K is arranged in the ID pin of the data interface, a resistor R2 (pull-down resistor) of the ID/NC pin of the data line interface divides voltage of power supply voltage VDD1, an ADC detection module at the rear end of the ID pin of the data interface reads divided voltage data information and uploads a CPU module, and the CPU module judges that the USB data line (USB charging line) is inserted;
when detecting that the data line interface of the USB data line is inserted, the USB type detection and corresponding control are as follows:
when a data line interface of a USB data line is inserted into a data interface, the ADC detection module judges that the USB data line is inserted, the CPU processor module controls to be connected with a single-channel analog circuit switch 1, a VBUS pin of the data interface is connected to the power management module through the single-channel analog circuit switch 1, and a DP pin and a DM pin of the data interface are connected to a DP pin and a DM pin of a USB data channel interface through the double-channel analog circuit switch, so that the function of the USB data line is realized;
in a third aspect, the above-mentioned data line compatible circuit based on the data interface, wherein the VNUS pin, the first DP pin, the second DP pin, the ID/NC pin, and the GND pin of the OTG line interface are respectively connected to the VBUS pin, the DM pin, the DP pin, the ID pin, and the GND pin of the data interface, the GND pin of the OTG line interface is grounded, and the ID/NC pin of the data line interface is connected to the ground through the resistor R2;
and the GND pin of the data interface is grounded.
The data line compatible circuit based on the data interface is characterized in that the OTG line interface is inserted into the data interface, an ID/NC pin of the OTG line interface is connected to an ID pin of the data interface, and the resistor R1 and the resistor R2 divide the power supply voltage VDD 1;
the ADC detection module detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module, the CPU processor module is respectively connected with the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module respectively controls the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
When an OTG line interface of an OTG line is inserted into a data interface, an ID/NC pin of the OTG line interface is connected to an ID pin of the data interface, a resistor R1 (pull-up resistor) 470K is arranged in the ID pin of the data interface, a resistor R2 (pull-down resistor) of the ID/NC pin of the OTG line interface divides voltage of power supply voltage VDD1, an ADC detection module at the rear end of the ID pin of the data interface reads divided voltage data information and uploads a CPU processor module, and the CPU processor module judges that the OTG line is inserted;
when detecting that the OTG line interface of the OTG line is inserted, the type detection and corresponding control of the OTG line are as follows:
when an OTG line interface of the OTG line is inserted into a data interface, the ADC detection module judges that the inserted OTG line is the OTG line, the CPU processor module controls to be connected with a single-channel analog circuit switch 1, a VBUS pin of the data interface is connected to a power management module through the single-channel analog circuit switch 1, and a DP pin and a DM pin of the data interface are connected to a DP pin and a DM pin of the OTG line interface through the double-channel analog circuit switch, so that the function of the OTG line is realized;
the data line compatible circuit based on the data interface is characterized in that the data interface is a Micro USB interface or a TYPE-C interface.
According to the above the utility model relates to a technical scheme that compatible circuit of data line provides based on data interface has following technological effect:
the detection of different external devices is realized by using the ID pin, the functions of compatible earphones and data lines are realized by using the switching control circuit of VBUS and MIC1 and the switching control circuit of R and MIC2, and various earphone devices are compatible on the premise of not influencing the original functions;
the conventional earphone interfaces are effectively reduced, and the space utilization rate of the whole earphone is improved;
the use scene is not single any more, and the availability is increased.
Drawings
Fig. 1 is a schematic structural diagram of a data line compatible circuit based on a data interface according to the present invention;
fig. 2 is a schematic structural diagram of the data line compatible circuit based on the data interface according to the present invention, connected to the earphone device interface;
fig. 3 is a schematic structural diagram of the data line compatible circuit based on the data interface according to the present invention;
fig. 4 is the utility model relates to a data line compatible circuit and OTG line interface connection's structural schematic based on data interface.
Wherein the reference numbers are as follows:
the device comprises an ADC detection module 101, a CPU processor module 102, an AUDIO data channel interface 103, a USB data channel interface 104, a dual-channel analog circuit switch 105, a data interface 106, a power management module 107, an earphone device interface 201, an earphone type detection pin 202, a data line interface 301 and an OTG line interface 401.
Detailed Description
In order to make the technical means, the inventive features, the objectives and the functions of the present invention easy to understand, the present invention will be further described with reference to the following specific drawings.
The first embodiment of the utility model provides a data line compatible circuit based on data interface, the purpose utilizes the ID pin to realize the detection of different external devices, utilizes VBUS and MIC 1's switching control circuit, utilizes R and MIC 2's switching control circuit, realizes the function of compatible earphone and data line, under the prerequisite that does not influence original function, compatible multiple earphone equipment; the conventional earphone interfaces are effectively reduced, and the space utilization rate of the whole earphone is improved; the use scene is not single any more, and the availability is increased.
As shown in fig. 1, in a first aspect, a data line compatible circuit based on a data interface 106 includes an ADC detection module 101, a CPU processor module 102, an AUDIO data channel interface 103, a USB data channel interface 104, a dual-channel analog circuit switch 105, a single-channel analog circuit switch 1, and a single-channel analog circuit switch 2;
one end of the ADC detection module 101 is connected with an ID pin of the data interface 106 and is connected with a power supply voltage VDD1 through a resistor R1, and the other end of the ADC detection module 101 is connected with the CPU processor module 102;
one end of the dual-channel analog circuit switch 105 is connected with a DM pin and a DP pin of the data interface 106 respectively, and the other end of the dual-channel analog circuit switch 105 is connected with a single-channel analog circuit switch 2, an L pin of the AUDIO data channel interface 103, and a DM pin and a DP pin of the USB data channel interface 104 respectively;
the other end of the single-channel analog circuit switch 2 is respectively connected with an R pin and an MIC2 pin of an AUDIO data channel interface 103;
one end of the single-channel analog circuit switch 1 is connected with a VBUS pin of the data interface 106, and the other end of the single-channel analog circuit switch 1 is respectively connected with a power voltage VDD2 and an MIC1 pin of an AUDIO data channel interface 103;
the CPU processor module 102 is respectively connected with the double-channel analog circuit switch 105, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 in a control mode.
The power management module 107 is connected between the single-channel analog circuit switch 1 and the power voltage VDD 2.
The data interface 106 is externally connected with the earphone device interface 201, the data line interface 301 or the OTG line interface 401.
As shown in fig. 2, wherein MIC1 pin, R/MIC2 pin, L pin, headphone type detection pin 202, and GND pin of the headphone device interface 201 are respectively connected to VBUS pin, DM pin, DP pin, ID pin, and GND pin of the data interface 106, the GND pin of the headphone device interface 201 is grounded, and the headphone type detection pin 202 of the headphone device interface 201 is connected to resistor R2;
the GND pin of the data interface 106 is connected to ground.
The earphone device interface 201 is inserted into the data interface 106, the earphone type detection pin 202 of the earphone device interface 201 is connected with the ID pin of the data interface 106, and the resistor R1 and the resistor R2 divide the power supply voltage VDD 1;
the ADC detection module 101 detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module 102, the CPU processor module 102 is respectively connected with the double-channel analog circuit switch 105, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module 102 respectively controls the double-channel analog circuit switch 105, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
To the earphone device (USB external earphone device) with different requirements, the earphone device can be distinguished by the resistor R2 (pull-down resistor) connected to the earphone type detection pin 202 of the earphone device interface 201, and the corresponding operation is realized by the ADC check module, see table 1: when the earphone device interface 201 is inserted into the data interface 106, the earphone type detection pin 202 of the truth table of the ADC detection module 101 is connected to the ID pin of the data interface 106, the built-in resistor R1 (pull-up resistor) 470K of the ID pin, and the resistor R2 (pull-down resistor) of the type detection pin divides the power supply voltage VDD1, the ADC detection module 101 at the rear end of the ID pin reads the divided data information and uploads the divided data information to the CPU processor module 102, the CPU processor module 102 determines that the earphone device is inserted and determines the type of the earphone device, and the CPU processor module 102 controls the dual-channel analog circuit switch 105, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 respectively to complete the detection and determination operations of the earphone devices with various specifications.
Table 1:
Figure DEST_PATH_IMAGE002
when detecting that the earphone device is inserted, the USB external earphone device type detection and corresponding control are as follows:
1. when a single-channel Microphone (MIC) -free earphone is inserted, the ADC detection module 101 judges that the type of the earphone insertion device is the single-channel microphone (MIC-free earphone), the CPU processor module 102 controls to disconnect the single-channel analog circuit switch 1, the DM pin of the data interface 106 is connected to the single-channel analog circuit switch 2 through the dual-channel analog circuit switch 105, the single-channel analog circuit switch 2 is disconnected, and the DP pin of the data interface 106 is connected to the L pin of the AUDIO data channel interface 103 through the dual-channel analog circuit switch 105, so that the function of the single-channel microphone-;
2. when a dual-channel microphone-free earphone is inserted, the ADC detection module 101 judges that the type of the earphone insertion device is the dual-channel microphone-free earphone, the CPU processor module 102 controls to switch off the single-channel analog circuit switch 1 and switch on the single-channel analog circuit switch 2, the DM pin of the data interface 106 is connected to the single-channel analog circuit switch 2 through the dual-channel analog circuit switch 105 and is connected to the R pin of the AUDIO data channel interface 103 through the single-channel analog circuit switch 2, and the DP pin of the data interface 106 is connected to the L pin of the AUDIO data channel interface 103 through the dual-channel analog circuit switch 105, so that the function of the dual-channel microphone-free earphone is;
3. when a single-channel single-MIC earphone is inserted, the ADC detection module 101 judges that the type of the earphone device is the single-channel single-MIC earphone, the CPU processor module 102 controls to disconnect the single-channel analog circuit switch 1, the DM pin of the data interface 106 is connected to the single-channel analog circuit switch 2 through the dual-channel analog circuit switch 105 and is connected to the MIC2 pin of the AUDIO data channel interface 103 through the single-channel analog circuit switch 2, and the DP pin of the data interface 106 is connected to the L pin of the AUDIO data channel interface 103 through the dual-channel analog circuit switch 105, so that the single-channel single-MIC function is realized;
4. when a dual-channel single-MIC earphone is inserted, the ADC detection module 101 judges that the type of the earphone device is the dual-channel single-MIC earphone, the CPU processor module 102 controls to switch on a single-channel analog circuit switch 1, a VBUS pin of the data interface 106 is connected to an MIC1 pin of an AUDIO data channel interface 103 through the single-channel analog circuit switch 1 and switches on a single-channel analog circuit switch 2, a DM pin of the data interface 106 is connected to the single-channel analog circuit switch 2 through a dual-channel analog circuit switch 105 and is connected to an R pin of the AUDIO data channel interface 103 through the single-channel analog circuit switch 2, a DP pin of the data interface 106 is connected to a L pin of the AUDIO data channel interface 103 through the dual-channel analog circuit switch 105, and the dual;
5. when a single-channel double-MIC earphone is inserted, the ADC detection module 101 judges that the type of the earphone device is the single-channel double-MIC earphone, the CPU processor module 102 controls to be connected with a single-channel analog circuit switch 1, a VBUS pin of the data interface 106 is connected to an MIC1 pin of an AUDIO data channel interface 103 through the single-channel analog circuit switch 1 and is connected with a single-channel analog circuit switch 2, a DM pin of the data interface 106 is connected to the single-channel analog circuit switch 2 through a double-channel analog circuit switch 105 and is connected to an MIC2 pin of the AUDIO data channel interface 103 through the single-channel analog circuit switch 2, a DP pin of the data interface 106 is connected to a L pin of the AUDIO data channel interface 103 through the double-channel analog circuit;
the data interface 106 is a Micro USB interface or a TYPE-C interface.
As shown in fig. 3, the second aspect, the second embodiment: the VNUS pin, the first DP pin, the second DP pin, the ID/NC pin (ID/VC/SBU pin), and the GND pin of the data line interface 301 are respectively connected to the VBUS pin, the DM pin, the DP pin, the ID pin, and the GND pin of the data interface 106, the GND pin of the data line interface 301 is grounded, and the ID/NC pin of the data line interface 301 is connected to the resistor R2;
the GND pin of the data interface 106 is connected to ground.
The data line interface 301 is inserted into the data interface 106, the ID/NC pin of the data line interface 301 is connected to the ID pin of the data interface 106, and the resistor R1 and the resistor R2 divide the power supply voltage VDD 1;
the ADC detection module 101 detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module 102, the CPU processor module 102 is respectively connected with the double-channel analog circuit switch 105, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module 102 respectively controls the double-channel analog circuit switch 105, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
When the data line interface 301 of the USB data line is inserted into the data interface 106, the ID/NC pin of the data line interface 301 is connected to the ID pin of the data interface 106, and the ID pin of the data interface 106 is provided with a built-in resistor R1 (pull-up resistor) 470K, as shown in table 2: after a resistor R2 (pull-down resistor) of an ID/NC pin of the data line interface 301 divides a power supply voltage VDD1, the ADC detection module 101 at the rear end of the ID pin of the data interface 106 reads divided data information and uploads the divided data information to the CPU processor module 102, and the CPU processor module 102 judges that a USB data line (USB charging wire) is inserted;
table 2:
Figure DEST_PATH_IMAGE004
when detecting the insertion of the data line interface 301 of the USB data line, the USB type detection and corresponding control are as follows:
when a data line interface 301 of a USB data line is inserted into a data interface 106, the ADC detection module 101 judges that the inserted data line is the USB data line, the CPU processor module 102 controls to be connected with a single-channel analog circuit switch 1, a VBUS pin of the data interface 106 is connected to the power management module 107 through the single-channel analog circuit switch 1, and a DP pin and a DM pin of the data interface 106 are connected to a DP pin and a DM pin of a USB data channel interface 104 through a double-channel analog circuit switch 105, so that the function of the USB data line is realized;
the data interface 106 is a Micro USB interface or a TYPE-C interface.
As shown in fig. 4, the third aspect, the third embodiment: the VNUS pin, the first DP pin, the second DP pin, the ID/NC pin (ID/VC/SBU pin), and the GND pin of the OTG line interface 401 are respectively connected to the VBUS pin, the DM pin, the DP pin, the ID pin, and the GND pin of the data interface 106, the GND pin of the OTG line interface 401 is grounded, and the ID/NC pin connection resistor R2 of the data line interface 301 is grounded;
the GND pin of the data interface 106 is connected to ground.
The OTG line interface 401 is inserted into the data interface 106, an ID/NC pin of the OTG line interface 401 is connected with an ID pin of the data interface 106, and the resistor R1 and the resistor R2 divide the power voltage VDD 1;
the ADC detection module 101 detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module 102, the CPU processor module 102 is respectively connected with the double-channel analog circuit switch 105, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module 102 respectively controls the double-channel analog circuit switch 105, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
When the OTG line interface 401 of the OTG line is inserted into the data interface 106, the ID/NC pin of the OTG line interface 401 is connected to the ID pin of the data interface 106, a resistor R1 (pull-up resistor) 470K is built in the ID pin of the data interface 106, after the resistor R2 (pull-down resistor) of the ID/NC pin of the OTG line interface 401 divides the power voltage VDD1, the ADC detection module 101 at the rear end of the ID pin of the data interface 106 reads the divided data information and uploads the CPU processor module 102, and the CPU processor module 102 determines that the OTG line is inserted;
when detecting that the OTG line interface 401 of the OTG line is plugged, the type detection and corresponding control of the OTG line are as follows:
when an OTG line interface 401 of an OTG line is inserted into the data interface 106, the ADC detection module 101 determines that the inserted OTG line is the OTG line, the CPU processor module 102 controls to switch on the single-channel analog circuit switch 1, the VBUS pin of the data interface 106 is connected to the power management module 107 through the single-channel analog circuit switch 1, and the DP pin and the DM pin of the data interface 106 are connected to the DP pin and the DM pin of the OTG line interface 401 through the dual-channel analog circuit switch 105, thereby implementing the OTG line function;
the data interface 106 is a Micro USB interface or a TYPE-C interface.
Technical term interpretation:
USB, USB universal serial bus, external bus standard, used to standardize the connection and communication between computer and external equipment. Is an interface technology applied in the PC field;
OTG, On-The-Go data exchange technology, The OTG technology is to realize The data transmission between The devices under The condition without Host;
AUDIO, AUDIO auditory processing;
MIC, microphone, academic name microphone, also called microphone, microphone translated from english microphone. The microphone is an energy conversion device that converts a sound signal into an electrical signal;
an ADC, an analog-to-digital converter (a/D converter), that converts an input voltage signal to an output digital signal;
CPU, central processing unit, operation and control core of computer system, which is the final execution unit for information processing and program operation;
DM, data negative signal, cooperate with the data positive signal to finish the transmission of the differential signal;
DP, data positive signal, cooperate with the data negative signal to finish the transmission of the differential signal;
l, R, headphone speakers, left and right channels, speakers are a transducer device that converts electrical signals into acoustic signals.
To sum up, the utility model discloses a data line compatible circuit based on data interface can utilize the ID pin to realize the detection of different external devices, utilizes the switching control circuit of VBUS and MIC1, utilizes the switching control circuit of R and MIC2, realizes the function of compatible earphone and data line, under the prerequisite that does not influence original function, compatible multiple earphone equipment; the conventional earphone interfaces are effectively reduced, and the space utilization rate of the whole earphone is improved; the use scene is not single any more, and the availability is increased.
The above description has been made of specific embodiments of the present invention. It is to be understood that the invention is not limited to the particular embodiments described above, and that devices and structures not described in detail are understood to be implemented in a manner common in the art; various changes or modifications may be made by those skilled in the art within the scope of the appended claims without departing from the spirit of the invention.

Claims (10)

1. A data line compatible circuit based on a data interface is characterized by comprising an ADC detection module, a CPU processor module, an AUDIO data channel interface, a USB data channel interface, a double-channel analog circuit switch, a single-channel analog circuit switch 1 and a single-channel analog circuit switch 2;
one end of the ADC detection module is connected with an ID pin of the data interface and is connected with a power supply voltage VDD1 through a resistor R1, and the other end of the ADC detection module is connected with the CPU processor module;
one end of the double-channel analog circuit switch is connected with a DM pin and a DP pin of the data interface respectively, and the other end of the double-channel analog circuit switch is connected with the single-channel analog circuit switch 2, an L pin of the AUDIO data channel interface, and a DM pin and a DP pin of the USB data channel interface respectively;
the other end of the single-channel analog circuit switch 2 is respectively connected with an R pin and an MIC2 pin of the AUDIO data channel interface;
one end of the single-channel analog circuit switch 1 is connected with a VBUS pin of the data interface, and the other end of the single-channel analog circuit switch 1 is respectively connected with a power voltage VDD2 and an MIC1 pin of the AUDIO data channel interface;
the CPU processor module is respectively connected with the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 in a control mode.
2. A data line compatible circuit based on data interface as claimed in claim 1, characterized in that a power management module is connected between the single-channel analog circuit switch 1 and the power supply voltage VDD 2.
3. A data line compatible circuit based on data interface as claimed in claim 2, wherein the data interface is externally connected with an earphone device interface or a data line interface or an OTG line interface.
4. The data line compatible circuit based on the data interface as claimed in claim 3, wherein the MIC1 pin, the R/MIC2 pin, the L pin, the earphone type detection pin, and the GND pin of the earphone device interface are respectively connected to the VBUS pin, the DM pin, the DP pin, the ID pin, and the GND pin of the data interface, the GND pin of the earphone device interface is connected to the ground, and the earphone type detection pin of the earphone device interface is connected to the resistor R2;
and the GND pin of the data interface is grounded.
5. The data line compatible circuit based on data interface as claimed in claim 4, wherein the earphone device interface is inserted into the data interface, the earphone type detection pin of the earphone device interface is connected with the ID pin of the data interface, the resistor R1 and the resistor R2 divide the power voltage VDD 1;
the ADC detection module detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module, the CPU processor module is respectively connected with the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module respectively controls the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
6. A data line compatible circuit based on data interface as claimed in claim 3, wherein the VNUS pin, the first DP pin, the second DP pin, the ID/NC pin, and the GND pin of the data line interface are respectively connected to the VBUS pin, the DM pin, the DP pin, the ID pin, and the GND pin of the data line interface, the GND pin of the data line interface is grounded, and the ID/NC pin connection resistor R2 of the data line interface is grounded;
and the GND pin of the data interface is grounded.
7. The data line compatible circuit based on data interface as claimed in claim 6, wherein the data line interface is inserted into the data interface, the ID/NC pin of the data line interface is connected with the ID pin of the data interface, the resistor R1 and the resistor R2 divide the power supply voltage VDD 1;
the ADC detection module detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module, the CPU processor module is respectively connected with the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module respectively controls the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
8. A data line compatible circuit based on data interface as claimed in claim 3, wherein VNUS pin, first DP pin, second DP pin, ID/NC pin, GND pin of the OTG line interface are connected with VBUS pin, DM pin, DP pin, ID pin, GND pin of the data interface, respectively, GND pin of the OTG line interface is connected to ground, ID/NC pin connecting resistance R2 of the data line interface is connected to ground;
and the GND pin of the data interface is grounded.
9. The data line compatible circuit based on data interface of claim 8, wherein the OTG line interface is inserted into the data interface, the ID/NC pin of the OTG line interface is connected with the ID pin of the data interface, the resistor R1 and the resistor R2 divide the power voltage VDD 1;
the ADC detection module detects and reads partial pressure data and transmits the partial pressure data to the CPU processor module, the CPU processor module is respectively connected with the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2, and the CPU processor module respectively controls the double-channel analog circuit switch, the single-channel analog circuit switch 1 and the single-channel analog circuit switch 2 according to the partial pressure data.
10. A data line compatible circuit based on a data interface as claimed in any one of claims 1 to 9, characterized in that said data interface is a Micro USB interface or a TYPE-C interface.
CN202020293188.4U 2020-03-11 2020-03-11 Data line compatible circuit based on data interface Active CN211019184U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202020293188.4U CN211019184U (en) 2020-03-11 2020-03-11 Data line compatible circuit based on data interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202020293188.4U CN211019184U (en) 2020-03-11 2020-03-11 Data line compatible circuit based on data interface

Publications (1)

Publication Number Publication Date
CN211019184U true CN211019184U (en) 2020-07-14

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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