CN109062846B - Universal serial bus device and operation method thereof - Google Patents

Universal serial bus device and operation method thereof Download PDF

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Publication number
CN109062846B
CN109062846B CN201810840649.2A CN201810840649A CN109062846B CN 109062846 B CN109062846 B CN 109062846B CN 201810840649 A CN201810840649 A CN 201810840649A CN 109062846 B CN109062846 B CN 109062846B
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connection port
data connection
power
downlink data
external device
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CN109062846A (en
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王泽祥
高启元
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Weifeng Electronics Co ltd
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Weifeng Electronics Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

Abstract

The invention provides a universal serial bus device and an operation method thereof. The universal serial bus device comprises a plurality of downstream data connection ports and a control circuit. When the first external device is connected to the first downstream data connection port and the second downstream data connection port is not connected to any external device, the control circuit holds the first downstream data connection port as one of the power supply connection port and the electric reception connection port and the second downstream data connection port as the other of the power supply connection port and the electric reception connection port in accordance with the first external device, regardless of whether the second external device is connected to the second downstream data connection port later, until the first external device is removed from the first downstream data connection port.

Description

Universal serial bus device and operation method thereof
Technical Field
The present invention relates to an electronic device, and more particularly, to a universal serial bus device and an operating method thereof.
Background
In order to reduce the size of the electronic device, the number of connectors of the electronic device is as small as possible. For example, some smart phones are configured with only one Type C Universal Serial bus (USB Type-C, also known as USB-C) connector. More and more smart phones only employ 1 USB-C connector, while removing the traditional 3.5mm audio jack. This USB-C connector on the smartphone can be considered as a Downstream-Facing Port (DFP). When the charger is connected to the USB-C connector, the charger can charge the smart phone. When the earphone is connected to the USB-C connector, the user can listen to the music played by the smart phone through the earphone. In any event, when the headset is connected to the USB-C connector, the user cannot use the charger to charge the smartphone. And vice versa. Because the number of downstream data connection ports of the electronic device is relatively small, the use of the downstream data connection ports of the electronic device is limited.
Disclosure of Invention
The invention provides a Universal Serial Bus (USB) device and an operation method thereof, which are used for removing the use limitation of a Downstream-Facing Port (DFP) of a host.
The embodiment of the invention provides a universal serial bus device. The universal serial bus device comprises a plurality of downstream data connection ports, a plurality of Physical layer (Physical layer) circuits and a control circuit. The physical layer circuits are coupled to configuration channel pins (CC pins) of the downstream data connection ports in a one-to-one manner. The control circuit is coupled to the physical layer circuits. The control circuit dynamically defines the downstream data connection ports by controlling the physical layer circuits. When a first external device is connected to one of the downstream data connection ports and one of the downstream data connection ports is not connected to any external device, the control circuit maintains the first downstream data connection port as one of a power source connection port and a power sink connection port according to the first external device and maintains the second downstream data connection port as the other of the power source connection port and the power sink connection port regardless of whether the second external device is connected to the second downstream data connection port later until the first external device is removed from the first downstream data connection port.
The embodiment of the invention provides an operation method of a universal serial bus device. The operation method comprises the following steps: when the first external device is connected to one of the plurality of downstream data connection ports and one of the plurality of downstream data connection ports is not connected to any external device, the control circuit maintains the first downstream data connection port as one of the power supply connection port and the power reception connection port and the second downstream data connection port as the other of the power supply connection port and the power reception connection port in accordance with the first external device until the first external device is removed from the first downstream data connection port regardless of whether the second downstream data connection port is connected to the second external device later.
In view of the above, the usb device and the operating method thereof according to the embodiments of the present invention provide two downlink data connection ports that can dynamically serve as either a power connection port or a power reception connection port. When the external device is connected to the first downlink data connection port and the second downlink data connection port is not connected with any external device, the first downlink data connection port is dynamically set as one of the power connection port and the electric receiving connection port according to the first external device, and the second downlink data connection port is dynamically set as the other one of the power connection port and the electric receiving connection port. In the case where the external device is still connected to the first downstream data connection port, the role setting of the second downstream data connection port is not changed until the first external device is removed from the first downstream data connection port regardless of whether any external device is connected to the second downstream data connection port later. When the universal serial bus device is connected to the downstream data connection port of the host, the universal serial bus device can remove the use limitation of the downstream data connection port of the host.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a circuit block diagram of a Universal Serial Bus (USB) device according to an embodiment of the invention.
Fig. 2 is a block diagram of a USB device according to another embodiment of the present invention.
Fig. 3 is a circuit block diagram illustrating a physical layer circuit shown in fig. 1 or fig. 2 according to an embodiment of the invention.
Detailed Description
The term "coupled" as used throughout this specification, including the claims, may refer to any direct or indirect connection. For example, if a first device couples (or connects) to a second device, it should be construed that the first device may be directly connected to the second device or the first device may be indirectly connected to the second device through other devices or some means of connection. Further, wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts. Components/parts/steps in different embodiments using the same reference numerals or using the same terms may be referred to one another in relation to the description.
In some application scenarios, the number of Universal Serial Bus (USB) connectors of an electronic device (hereinafter referred to as a host) may not be used. For example, some smart phones (hosts) are configured with only one Type C universal serial bus (USB Type-C, also known as USB-C) connector. Since the number of USB connectors of the host is quite small, the use of the USB connectors of the host suffers from limitations. In order to release the use restriction of the USB connector of the host, a USB HUB (USB HUB) is generally used to expand the number of USB connectors of the host. In any event, conventional USB hubs require a large amount of circuit area to provide full functionality at each USB connector. That is, the conventional USB hub is relatively bulky and is not suitable for being used in a portable manner. Furthermore, in order to provide complete functionality at each USB connector, it is expected that the power consumption of conventional USB hubs is also significant.
The following embodiments will provide a USB device that can release the use restriction of the USB connector of the host. The USB device can switch the data transmission path by using a simple switch circuit without a complex circuit like a hub, so that the USB device can save circuit area and save power.
Fig. 1 is a circuit block diagram of a Universal Serial Bus (USB) device 100 according to an embodiment of the invention. The USB device 100 includes a plurality of USB connectors, such as an Upstream Facing Port (UFP) 110, a Downstream Facing Port (DFP) 120, and a downstream facing port 130 shown in fig. 1. Upstream data connection port 110 may be connected to a USB connector of host 10 (e.g., downstream data connection port 11 shown in fig. 1). Depending on the practical application, the host 10 may be a Portable Multimedia Player (PMP), a Personal Digital Assistant (PDA), a mobile phone, a tablet computer, a notebook computer or other electronic devices with USB connectors.
The USB device 100 further includes a plurality of physical layer circuits coupled to Configuration Channel (CC) pins of the USB connectors of the USB device 100 in a one-to-one manner. For example, the physical layer circuit 140 is coupled to the CC pin of the uplink data connection port 110, the physical layer circuit 150 is coupled to the CC pin of the downlink data connection port 120, and the physical layer circuit 160 is coupled to the CC pin of the downlink data connection port 130. The control circuit 170 is coupled to the phy layer circuits 140, 150, and 160. The control circuit 170 is coupled to the upphy circuit 140. Control circuit 170 communicates configuration information with host 10 via upphy circuit 140 and the CC pins of upbound data connection port 110. The control circuit 170 dynamically defines the roles of the downstream data connection port 120 and the downstream data connection port 130 by controlling the physical layer circuits 150 and 160.
The downstream data connection port 120 and/or the downstream data connection port 130 can be connected to any external device (e.g., the external device 20 and the external device 30 shown in fig. 1) according to practical requirements. Depending on the actual application, the external device 20 and/or the external device 30 may be a USB audio device (e.g., an earphone), a USB video camera, a personal disk, a USB hard disk, a charger (power adapter), or other USB devices. For example, the external device 20 may be an earphone, and the external device 30 may be a charger. Alternatively, the external device 20 may be a charger, and the external device 30 may be an earphone. Before the first external device is inserted into the downstream data connection port 120 or the downstream data connection port 130, the downstream data connection port 120 and the downstream data connection port 130 may be dynamically set to a power source port (power source port) or a power sink port (power sink port). That is, the roles of the downstream data connection port 120 and the downstream data connection port 130 are not fixed until any USB external device is plugged into either the downstream data connection port 120 or the downstream data connection port 130.
When a first external device is connected to one of the downstream data connection ports 120 and 130 (referred to herein as a first downstream data connection port) and the other of the downstream data connection ports 120 and 130 (referred to herein as a second downstream data connection port) is not connected to any external device, the control circuit 170 maintains the first downstream data connection port as one of the power supply connection port and the power reception connection port in accordance with the first external device and the second downstream data connection port as the other of the power supply connection port and the power reception connection port regardless of whether the second external device is connected to the second downstream data connection port later until the first external device is removed from the first downstream data connection port. The power connection port can supply power to an external device, and the power receiving connection port is powered by the external device.
For example, assuming that the external device 20 is a power supply device (e.g., a charger), when the charger (the external device 20) is connected to the downstream data connection port 120 and no external device is connected to the downstream data connection port 130, the control circuit 170 may hold the downstream data connection port 120 as an electric reception connection port and the downstream data connection port 130 as a power supply connection port regardless of whether any external device is connected to the downstream data connection port 130 later until the external device 20 is removed from the downstream data connection port 120. In another application scenario, assuming that the external device 30 is a power supply device (e.g., a charger), when the charger (external device 30) is connected to the downstream data connection port 130 and no external device is connected to the downstream data connection port 120, the control circuit 170 may maintain the downstream data connection port 130 as an electric reception connection port and the downstream data connection port 120 as a power supply connection port regardless of whether any external device is connected to the downstream data connection port 120 afterwards, until the external device 30 is removed from the downstream data connection port 130.
As another example, assuming that the external device 20 is a power sink device (e.g., a headset), when the host 10 is connected to the uplink data connection port 110 and the headset (external device 20) is connected to the downlink data connection port 120 and no external device is connected to the downlink data connection port 130, the control circuit 170 may maintain the downlink data connection port 120 as a power connection port and the downlink data connection port 130 as a power reception connection port regardless of whether any external device is connected to the downlink data connection port 130 afterwards until the external device 20 is removed from the downlink data connection port 120. In another application scenario, assuming that the external device 30 is a power receiving device (e.g., a headset), when the host 10 is connected to the uplink data connection port 110 and the headset (external device 30) is connected to the downlink data connection port 130 and no external device is connected to the downlink data connection port 120, the control circuit 170 may maintain the downlink data connection port 130 as a power connection port and the downlink data connection port 120 as a power reception connection port regardless of whether any external device is connected to the downlink data connection port 120 afterwards, until the external device 30 is removed from the downlink data connection port 130.
In the embodiment shown in FIG. 1, the USB device 100 further includes a data switching circuit 180. The data switch circuit 180 has a common terminal CM, a first selection terminal S1 and a second selection terminal S2. The common terminal CM is coupled to the data pin of the upstream data connection port 110. The first selection terminal S1 is coupled to the data pin of the downstream data connection port 120. The second selection terminal S2 is coupled to the data pin of the downstream data connection port 130. The "data pins" may be D pins (a pair of pins for differential signals, generally designated as D + and D-), and/or TX1 pins (a pair of output pins for differential signals) and RX1 pins (a pair of input pins for differential signals), depending on design requirements.
The control circuit 170 controls the data switch circuit 180 according to the connection status of the downstream data connection port 120 and the downstream data connection port 130, so that the common node CM is selectively connected to the first selection node S1 or the second selection node S2. When the downstream data connection port 120 is defined as a power supply connection port and the downstream data connection port 130 is defined as a power receiving connection port, the control circuit 170 controls the data switching circuit 180 so that the common terminal CM is selectively connected to the first selection terminal S1. When the downstream data connection port 120 is defined as a power reception connection port and the downstream data connection port 130 is defined as a power supply connection port, the control circuit 170 controls the data switching circuit 180 so that the common terminal CM is selectively connected to the second selection terminal S2.
In some embodiments, the physical layer circuit 140, the physical layer circuit 150, the physical layer circuit 160, the control circuit 170, and the data switch circuit 180 may be integrated into a same integrated circuit according to design requirements. In other embodiments, the PHY 140, PHY 150, and control 170 circuits may be Integrated into one Integrated Circuit, PHY 160 may be Integrated into another Integrated Circuit (e.g., a Type-C Port controller (TCPC) Integrated Circuit), and data switch 180 may be another Integrated Circuit, wherein the communication interface between the Integrated circuits may be an Inter-Integrated Circuit (I2C) interface, a General Purpose Input/Output (GPIO) interface, and/or other communication interfaces.
Fig. 2 is a block diagram of a USB device 200 according to another embodiment of the present invention. The USB device 200 shown in fig. 2 includes a plurality of USB connectors (e.g., the upstream data connection port 110, the downstream data connection port 120, and the downstream data connection port 130 shown in fig. 2), a plurality of physical layer circuits (e.g., the upstream physical layer circuit 140, the physical layer circuit 150, and the physical layer circuit 160 shown in fig. 2), a control circuit 170, a data switching circuit 180, a power switch PSW1, a power switch PSW2, a power switch PSW3, a power supply circuit 290, a power supply switch PS1, and a power supply switch PS 2. The uplink data connection port 110, the downlink data connection port 120, the downlink data connection port 130, the uplink physical layer circuit 140, the physical layer circuit 150, the physical layer circuit 160, the control circuit 170, and the data switching circuit 180 shown in fig. 2 may refer to the related description of fig. 1, and therefore, are not described again.
In the embodiment shown in fig. 2, a first terminal of the power switch PSW1 is coupled to a power pin (power bus pin, generally designated as Vbus) of the upstream data connection port 110. A second terminal of the power switch PSW1 is coupled to the second terminal of the power switch PSW2 and the second terminal of the power switch PSW 3. A first terminal of the power switch PSW2 is coupled to the power pin of the downstream data connection port 120. A first terminal of the power switch PSW3 is coupled to the power pin of the downstream data connection port 130. The power supply circuit 290 can provide a power voltage to the power switch PS1 and the power switch PS 2. The power voltage may be any voltage level (e.g., +5 volts) that meets the USB specification, depending on design requirements. The first terminal of the power switch PS1 and the first terminal of the power switch PS2 are coupled to the output terminal of the power supply circuit 290 to receive the power voltage. A second terminal of the power switch PS1 is coupled to the power pin of the downstream data connection port 120. A second terminal of the power switch PS2 is coupled to the power pin of the downstream data connection port 130.
The control circuit 170 controls the power switch PSW1, the power switch PSW2, the power switch PSW3, the power supply switch PS1, and the power supply switch PS2 according to the connection status of the upstream data connection port 110, the downstream data connection port 120, and the downstream data connection port 130. For example, assume that the external device 20 connected to the downstream data connection port 120 is a headset, and the external device 30 connected to the downstream data connection port 130 is a charger. As described above, the downstream data connection port 120 is set as the power connection port, and the downstream data connection port 130 is set as the power connection port until the external devices 20 and 30 are removed. When downstream data connection port 120 is defined as a power connection port and downstream data connection port 130 is defined as a power reception connection port, power switch PSW2 and power supply switch PS2 are turned off (turn off), and power switch PSW1, power switch PSW3 and power supply switch PS1 are turned on (turn on). At this time, the charger (external device 30) may supply power to the host 10 and the power supply circuit 290 via the downstream data connection port 130 and the power switch PSW3, and the power supply circuit 290 may supply power to the headset (external device 20) via the power switch PS1 and the downstream data connection port 120.
For another example, assume that the external device 20 connected to the downstream data connection port 120 is a charger, and the external device 30 connected to the downstream data connection port 130 is an earphone. As described above, the downstream data connection port 120 is set as the power connection port, and the downstream data connection port 130 is set as the power connection port until the external devices 20 and 30 are removed. When the downstream data connection port 120 is defined as the power receiving connection port and the downstream data connection port 130 is defined as the power supply connection port, the power switch PSW3 and the power supply switch PS1 are turned off, and the power switch PSW1, the power switch PSW2 and the power supply switch PS2 are turned on. At this time, the charger (external device 20) may supply power to the host 10 and the power supply circuit 290 via the downstream data connection port 120 and the power switches PSW1 and PSW2, and the power supply circuit 290 may supply power to the headset (external device 30) via the power switch PS2 and the downstream data connection port 130.
For another example, assuming that the rated voltages of the power pin of the upstream data connection port 110, the power pin of the downstream data connection port 120 and the power pin of the downstream data connection port 130 are all at the same voltage level (e.g., +5 volts), the power switch PSW1, the power switch PSW2, the power switch PSW3, the power supply circuit 290, the power switch PS1 and the power switch PS2 may be omitted according to design requirements. That is, the power pin of the upstream data connection port 110, the power pin of the downstream data connection port 120 and the power pin of the downstream data connection port 130 can be electrically connected to each other without passing through a power switch.
Fig. 3 is a circuit block diagram illustrating a phy layer circuit 150 shown in fig. 1 or fig. 2 according to an embodiment of the invention. The other phy layer circuits 140 and 160 shown in fig. 1 or fig. 2 may be analogized with reference to the related description of fig. 3, and thus are not described again. In the embodiment shown in fig. 3, the physical layer circuit 150 includes a configuration channel communication circuit 151 and a resistor circuit 152. The configuration channel communication circuit 151 is coupled to the CC pin of the downlink data connection port 120. The control circuit 170 knows whether the downstream data connection port 120 is connected to any external device through the configuration channel communication circuit 151 and the CC pin of the downstream data connection port 120. The configuration channel communication circuit 151 may include Bi-phase mark Coding (BMC) physical layer circuits according to design requirements. The BMC physical layer circuit is a conventional circuit, and thus is not described in detail. When an external device (e.g., the external device 20 shown in fig. 1 or fig. 2) is connected to the downstream data connection port 120, the control circuit 170 may communicate with the external device via the BMC physical layer circuit and the CC pin to transmit configuration information.
Resistor circuit 152 is coupled to the CC pin of downstream data connection port 120. When the downlink data connection port 120 is not connected to any external device, the control circuit 170 controls the resistor circuit 152 such that the resistor circuit 152 alternately applies one of the pull-up resistance Rp and the pull-down resistance Rd to the CC pin of the downlink data connection port 120 at different times. Therefore, when an external device (e.g., the external device 20 shown in fig. 1 or fig. 2) is connected to the downlink data connection port 120, the control circuit 170 can know the voltage level of the CC pin of the downlink data connection port 120 via the configuration channel communication circuit 151. When Rp and Rd of downlink data connection port 120 are not flipped (toggling), the current of power pin Vbus may be less than 0.5 mA. When Rp and Rd of downlink data connection port 120 are flipped, the current of power pin Vbus may be less than 1 mA. Depending on the voltage level of the CC pin and the resistance state (Rp or Rd) of the resistor circuit 152, the control circuit 170 may determine whether the downlink data connection port 120 is connected to any external device, and whether the external device connected to the downlink data connection port 120 is a power source (power source) device or a power sink (power sink) device. The pull-up resistor Rp and the pull-down resistor Rd are defined in the USB specification, and are not described herein.
When a power supply device (external device) is connected to the downstream data connection port 120, the control circuit 170 controls the resistor circuit 152 so that the resistor circuit 152 keeps applying the pull-down resistance Rd to the CC pin of the downstream data connection port 120 during a period in which the power supply device is connected to the downstream data connection port 120. That is, during the period when the power device (external device) is connected to the downlink data connection port 120, the downlink data connection port 120 is set as the power receiving connection port until the power device is removed from the downlink data connection port 120. When a receiving device (external device) is connected to the downstream data connection port 120, the control circuit 170 controls the resistor circuit 152 such that the resistor circuit 152 keeps applying the pull-up resistance Rp to the CC pin of the downstream data connection port 120 during a period when the receiving device is connected to the downstream data connection port 120. That is, during the period when the receiving device (external device) is connected to the downlink data connection port 120, the downlink data connection port 120 is set as the power connection port until the receiving device is removed from the downlink data connection port 120.
The blocks of the control circuit 170 can be implemented by logic circuits (hardware) formed on an integrated circuit (integrated circuit) or by software using a Central Processing Unit (CPU). In the latter case, the related functions of the control circuit 170 may be implemented as programming codes of software (i.e., programs). The control circuit 170 is implemented, for example, using a general programming languages (e.g., C or C + +) or other suitable programming languages. The software (i.e., program) may be Read by a computer (or CPU) and may be recorded/stored in a Read Only Memory (ROM), a storage device (referred to as a "recording medium"), and/or a Random Access Memory (RAM). The program is read from the recording medium and executed by a computer (or CPU), thereby achieving the related functions. As the recording medium, a "non-transitory computer readable medium" may be used, and for example, a tape (tape), a disk (disk), a card (card), a semiconductor memory, a programmable logic circuit, or the like may be used. The program may be supplied to the computer (or CPU) via any transmission medium (communication network, broadcast wave, or the like). Such as the Internet, wired communication, wireless communication, or other communication media.
In different application scenarios, the related functions of the control circuit 170 may be implemented as firmware or hardware using a general programming language (e.g., C or C + +), a hardware description language (e.g., Verilog HDL or VHDL), or other suitable programming languages. For a hardware implementation, various logic blocks, modules, and circuits within one or more controllers, microcontrollers, microprocessors, Application-specific integrated circuits (ASICs), Digital Signal Processors (DSPs), Field Programmable Gate Arrays (FPGAs), and/or other processing units may be used to implement or perform the functions described in the embodiments herein. In addition, the apparatus and methods of the present invention may be implemented by a combination of hardware, firmware, and/or software.
In summary, in the USB device and the operation method thereof according to the embodiments of the present invention, the two downlink data connection ports 120 and 130 provided therein can dynamically serve as either the power connection port or the power connection port, respectively. Therefore, the USB device according to the embodiments of the present invention can release the usage restriction of the downstream data connection port 11 of the host 10. When an external device is connected to the first downlink data connection port (one of the downlink data connection ports 120 and 130), and when no external device is connected to the second downlink data connection port (the other of the downlink data connection ports 120 and 130), the first downlink data connection port is dynamically set as one of the power connection port and the power reception connection port according to the external device, and the second downlink data connection port is dynamically set as the other of the power connection port and the power reception connection port. In the case where the external device is still connected to the first downstream data connection port, the role setting of the second downstream data connection port is not changed until the external device is removed from the first downstream data connection port regardless of whether any other external device is connected to the second downstream data connection port later.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.
List of reference numerals
10: main unit
11: downstream data connection port
20. 30: external device
100: universal Serial Bus (USB) device
110: uplink data connection port
120. 130, 130: downstream data connection port
140: uplink physical layer circuit
150. 160: physical layer circuit
151: configuration channel communication circuit
152: resistor circuit
170: control circuit
180: data switching circuit
200: USB device
290: power supply circuit
CM: common terminal
PS1, PS 2: power supply switch
PSW1, PSW2, PSW 3: power switch
S1: a first selection terminal
S2: second selection terminal

Claims (25)

1. A universal serial bus device, comprising:
a plurality of downstream data connection ports;
a plurality of physical layer circuits coupled to configuration channel pins of the plurality of downstream data connection ports in a one-to-one manner; and
a control circuit coupled to the plurality of physical layer circuits, wherein the control circuit dynamically defines the plurality of downstream data connection ports by controlling the plurality of physical layer circuits,
when a first external device is connected to a first downlink data connection port of the plurality of downlink data connection ports and a second downlink data connection port of the plurality of downlink data connection ports is not connected to any external device, the control circuit maintains the first downlink data connection port as one of a power connection port and an electrical reception connection port according to the first external device and maintains the second downlink data connection port as the other of the power connection port and the electrical reception connection port regardless of whether a second external device is connected to the second downlink data connection port afterwards until the first external device is removed from the first downlink data connection port.
2. The universal serial bus device of claim 1, wherein
The first external device is a power supply device;
when the first external device is connected to the first downlink data connection port and the second downlink data connection port is not connected to any external device, the control circuit maintains the first downlink data connection port as the electrical receive connection port and the control circuit maintains the second downlink data connection port as the power connection port regardless of whether the second downlink data connection port is subsequently connected to the second external device until the first external device is removed from the first downlink data connection port; and
when the first external device is connected to the second downstream data connection port and no external device is connected to the first downstream data connection port, the control circuit maintains the second downstream data connection port as the electrical receive connection port, and the control circuit maintains the first downstream data connection port as the electrical power connection port regardless of whether the first downstream data connection port is subsequently connected to the second external device until the first external device is removed from the second downstream data connection port.
3. The USB device of claim 2, wherein the power device comprises a charger.
4. The USB device of claim 1, wherein the first external device is a receiving device;
when the first external device is connected to the first downlink data connection port and the second downlink data connection port is not connected to any external device, the control circuit maintains the first downlink data connection port as the power connection port and the control circuit maintains the second downlink data connection port as the electrical reception connection port regardless of whether the second downlink data connection port is connected to the second external device at a later time until the first external device is removed from the first downlink data connection port; and
when the first external device is connected to the second downstream data connection port and no external device is connected to the first downstream data connection port, the control circuit maintains the second downstream data connection port as the power connection port, and the control circuit maintains the first downstream data connection port as the electrical reception connection port regardless of whether the first downstream data connection port is subsequently connected to the second external device until the first external device is removed from the second downstream data connection port.
5. The USB device of claim 4, wherein the receiving device comprises a headset.
6. The universal serial bus device of claim 1, further comprising:
an uplink data connection port; and
an uplink physical layer circuit coupled to a configuration channel pin of the uplink data connection port;
wherein the control circuit is further coupled to the physical layer uplink circuit.
7. The universal serial bus device of claim 6, further comprising:
a data switching circuit having a common terminal, a first selection terminal and a second selection terminal, wherein the common terminal is coupled to a data pin of the uplink data connection port, the first selection terminal is coupled to a data pin of the first downlink data connection port, and the second selection terminal is coupled to a data pin of the second downlink data connection port;
the control circuit controls the data switching circuit according to the connection status of the plurality of downlink data connection ports, so that the common port is selectively connected to the first selection port or the second selection port.
8. The universal serial bus device of claim 7, wherein
When the first downlink data connection port is defined as the power connection port and the second downlink data connection port is defined as the power connection port, the control circuit controls the data switching circuit to selectively connect the common terminal to the first selection terminal; and
when the first downstream data connection port is defined as the electrical receiving connection port and the second downstream data connection port is defined as the power connection port, the control circuit controls the data switching circuit to selectively connect the common terminal to the second selection terminal.
9. The universal serial bus device of claim 6, further comprising:
a first power switch having a first end coupled to a power pin of the first downlink data connection port;
a second power switch having a first end coupled to a power pin of the second downlink data connection port, wherein a second end of the second power switch is coupled to a second end of the first power switch; and
a third power switch having a first end coupled to a power pin of the upstream data link port, wherein a second end of the third power switch is coupled to the second end of the first power switch and the second end of the second power switch;
the control circuit controls the first power switch, the second power switch and the third power switch according to the connection status of the plurality of downlink data connection ports.
10. The universal serial bus device of claim 9, wherein
When the first downlink data connection port is defined as the power connection port and the second downlink data connection port is defined as the power reception connection port, the first power switch is turned off, and the second power switch and the third power switch are turned on; and
when the first downlink data connection port is defined as the electrical receiving connection port and the second downlink data connection port is defined as the power connection port, the second power switch is turned off, and the first power switch and the third power switch are turned on.
11. The universal serial bus device of claim 1, further comprising:
a power supply circuit for providing a power voltage;
a first power switch having a first end coupled to an output end of the power supply circuit for receiving the power voltage, wherein a second end of the first power switch is coupled to a power pin of the first downlink data connection port; and
a second power switch having a first end coupled to the output end of the power supply circuit for receiving the power voltage, wherein a second end of the second power switch is coupled to a power pin of the second downlink data connection port;
the control circuit controls the first power supply switch and the second power supply switch according to the connection status of the plurality of downlink data connection ports.
12. The universal serial bus device of claim 11, wherein
When the first downlink data connection port is defined as the power connection port and the second downlink data connection port is defined as the power reception connection port, the first power supply switch is turned on and the second power supply switch is turned off; and
when the first downlink data connection port is defined as the electrical receiving connection port and the second downlink data connection port is defined as the power connection port, the first power supply switch is turned off and the second power supply switch is turned on.
13. The universal serial bus device of claim 1, wherein any of the plurality of physical layer circuits comprises:
a configuration channel communication circuit coupled to the configuration channel pin, wherein the control circuit learns whether any external device is connected to a corresponding downlink data connection port of the plurality of downlink data connection ports through the configuration channel communication circuit and the configuration channel pin; and
a resistor circuit coupled to the configuration channel pin, wherein
The control circuit controls the resistor circuit to alternately apply a pull-up resistance and a pull-down resistance to the configuration channel pin at different times when the corresponding downstream data connection port is not connected to any external device,
when the corresponding downstream data connection port is connected to a power supply device, the control circuit controls the resistor circuit to keep applying the pull-down resistor to the configuration channel pin during the period when the corresponding downstream data connection port is connected to the power supply device, and
when the corresponding downstream data connection port is connected with a receiving device, the control circuit controls the resistor circuit so that the resistor circuit keeps applying the pull-up resistor to the configuration channel pin in the period when the corresponding downstream data connection port is connected with the receiving device.
14. The universal serial bus device of claim 13 wherein the configuration channel communication circuit comprises a dual flag coding physical layer circuit.
15. A method of operation of a universal serial bus device, comprising:
when a first external device is connected to a first downlink data connection port of a plurality of downlink data connection ports and a second downlink data connection port of the plurality of downlink data connection ports is not connected with any external device, a control circuit maintains the first downlink data connection port as one of a power connection port and a power reception connection port according to the first external device and maintains the second downlink data connection port as the other of the power connection port and the power reception connection port regardless of whether a second external device is connected to the second downlink data connection port afterwards until the first external device is removed from the first downlink data connection port.
16. The method of claim 15, wherein the first external device is a power device, and the method comprises:
when the first external device is connected to the first downlink data connection port and the second downlink data connection port is not connected to any external device, the control circuit maintains the first downlink data connection port as the electrical receive connection port and the control circuit maintains the second downlink data connection port as the power connection port regardless of whether the second downlink data connection port is subsequently connected to the second external device until the first external device is removed from the first downlink data connection port; and
when the first external device is connected to the second downstream data connection port and no external device is connected to the first downstream data connection port, the control circuit maintains the second downstream data connection port as the electrical receive connection port, and the control circuit maintains the first downstream data connection port as the electrical power connection port regardless of whether the first downstream data connection port is subsequently connected to the second external device until the first external device is removed from the second downstream data connection port.
17. The method of claim 16, wherein the power device comprises a charger.
18. The method of claim 15, wherein the first external device is a receiving device, and the method of operation comprises:
when the first external device is connected to the first downlink data connection port and the second downlink data connection port is not connected to any external device, the control circuit maintains the first downlink data connection port as the power connection port and the control circuit maintains the second downlink data connection port as the electrical reception connection port regardless of whether the second downlink data connection port is connected to the second external device at a later time until the first external device is removed from the first downlink data connection port; and
when the first external device is connected to the second downstream data connection port and no external device is connected to the first downstream data connection port, the control circuit maintains the second downstream data connection port as the power connection port, and the control circuit maintains the first downstream data connection port as the electrical reception connection port regardless of whether the first downstream data connection port is subsequently connected to the second external device until the first external device is removed from the second downstream data connection port.
19. The method of claim 18, wherein the receiving device comprises an earphone.
20. The method of operation of claim 15, further comprising:
providing a data switching circuit, wherein a common terminal of the data switching circuit is coupled to a data pin of an uplink data connection port, a first selection terminal of the data switching circuit is coupled to a data pin of the first downlink data connection port, and a second selection terminal of the data switching circuit is coupled to a data pin of the second downlink data connection port;
the control circuit controls the data switching circuit according to the connection status of the plurality of downlink data connection ports, so that the common port is selectively connected to the first selection port or the second selection port.
21. The method of operation of claim 20, further comprising:
when the first downlink data connection port is defined as the power connection port and the second downlink data connection port is defined as the power connection port, the control circuit controls the data switching circuit to selectively connect the common terminal to the first selection terminal; and
when the first downstream data connection port is defined as the electrical receiving connection port and the second downstream data connection port is defined as the power connection port, the control circuit controls the data switching circuit to selectively connect the common terminal to the second selection terminal.
22. The method of operation of claim 15, further comprising:
providing a first power switch, a second power switch and a third power switch, wherein a first terminal of the first power switch is coupled to a power pin of the first downlink data connection port, a first terminal of the second power switch is coupled to a power pin of the second downlink data connection port, a first terminal of the third power switch is coupled to a power pin of an uplink data connection port, and a second terminal of the third power switch is coupled to a second terminal of the first power switch and a second terminal of the second power switch;
the control circuit controls the first power switch, the second power switch and the third power switch according to the connection status of the plurality of downlink data connection ports.
23. The method of operation of claim 22, further comprising:
when the first downlink data connection port is defined as the power connection port and the second downlink data connection port is defined as the power reception connection port, turning off the first power switch and turning on the second power switch and the third power switch; and
when the first downlink data connection port is defined as the electric receiving connection port and the second downlink data connection port is defined as the power connection port, the second power switch is turned off, and the first power switch and the third power switch are turned on.
24. The method of operation of claim 15, further comprising:
providing a power supply voltage;
providing a first power supply switch and a second power supply switch, wherein a first end of the first power supply switch receives the power voltage, a second end of the first power supply switch is coupled to a power pin of the first downlink data connection port, a first end of the second power supply switch receives the power voltage, and a second end of the second power supply switch is coupled to a power pin of the second downlink data connection port; and
the control circuit controls the first power supply switch and the second power supply switch according to the connection status of the plurality of downlink data connection ports.
25. The method of operation of claim 24, further comprising:
when the first downlink data connection port is defined as the power connection port and the second downlink data connection port is defined as the power reception connection port, turning on the first power supply switch and turning off the second power supply switch; and
when the first downlink data connection port is defined as the electric receiving connection port and the second downlink data connection port is defined as the power connection port, the first power supply switch is turned off and the second power supply switch is turned on.
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