CN211019020U - Anti-interference frequency demultiplier - Google Patents
Anti-interference frequency demultiplier Download PDFInfo
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- CN211019020U CN211019020U CN201921441519.8U CN201921441519U CN211019020U CN 211019020 U CN211019020 U CN 211019020U CN 201921441519 U CN201921441519 U CN 201921441519U CN 211019020 U CN211019020 U CN 211019020U
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Abstract
The utility model discloses an jam-proof type frequency demultiplier, including the casing and arrange in the frequency demultiplier circuit in the casing, the frequency demultiplier circuit, including the antenna module that is used for receiving satellite signal, be used for suppressing the radio frequency filter module of the out-of-band signal of filtering satellite television signal communication protocol frequency band, be used for phase demodulation filtering's phase locking module, be used for the out-of-band signal further decay intermediate frequency filter module, be used for L C filter module to the stop band width accuracy, the antenna module the radio frequency filter module the phase locking module intermediate frequency filter module and L C filter module connect gradually, filter the out-of-band signal through the radio frequency filter module with the satellite signal who receives, then carry out phase demodulation, filtering, pressure-control through the phase locking module to the signal, the out-of-band signal decay suppression is carried out through intermediate frequency filter module again, exports suitable satellite signal behind the bandwidth of the accurate signal of L C filter module at last, effectively prevents the problem of 5.
Description
Technical Field
The utility model relates to the field of electronics, especially an jam-proof type frequency demultiplier.
Background
With the development of science and technology and life, communication transmission is more and more popularized, television programs watched in families do not simply pass through a cable television, a satellite television is a favorite choice of users, and the proportion of watching the television by using the satellite television is higher and higher. The frequency demultiplier is a necessary device for watching satellite televisions, but simultaneously, with the continuous development and updating of scientific and technological products, limited network bandwidth resources cannot meet market requirements, with the continuous promotion of 5G network technology, the frequency Band of the 5G network causes great radiation interference to the products of the C-Band frequency demultiplier on the market at present, the use frequency and partial bandwidth of the 5G network conflict with the C-Band receiving frequency Band of the satellite televisions, so that partial programs in the satellite televisions cannot be received, users cannot watch the programs, and user experience is poor.
SUMMERY OF THE UTILITY MODEL
In order to solve the above problem, an object of the present invention is to provide an interference-proof frequency demultiplier, which solves the problem of unstable frequency of the conventional medium oscillation mode and the problem of large frequency variation in the high and low temperature environments, and effectively prevents the interference of the 5G network to the satellite signal.
The utility model provides a technical scheme that its problem adopted is:
according to the utility model provides an anti-interference frequency demultiplier, which comprises a shell and a frequency demultiplier circuit arranged in the shell;
the frequency reducing circuit comprises an antenna module for receiving satellite signals, a radio frequency filtering module for inhibiting and filtering out-of-band signals of a satellite television signal communication protocol frequency band, a phase locking module for phase discrimination filtering, an intermediate frequency filtering module for further attenuating the out-of-band signals, and an L C filtering module for further accurately narrowing a cutoff frequency bandwidth;
the antenna module, the radio frequency filtering module, the phase locking module, the intermediate frequency filtering module and the L C filtering module are connected in sequence.
The anti-interference frequency demultiplier has the advantages that the received satellite signals pass through the radio frequency filtering module to filter out-of-band signals, then the phase locking module is used for phase discrimination, filtering and voltage control on the signals, the intermediate frequency filtering module is used for further attenuating and inhibiting the power of the out-of-band signals in the signals, and finally the signals pass through the L C filtering module to further accurately output the appropriate satellite signals after the bandwidth of the signals is further accurate.
According to the utility model provides a pair of jam-proof type frequency demultiplier, antenna module includes horizontal polarization receiving module and vertical polarization receiving module, receives the satellite signal under the multiple condition, lowers because the signal attenuation can not receive the satellite signal's of partial bandwidth the condition.
According to the utility model provides a pair of jam-proof type frequency demultiplier, the antenna module with still be provided with the amplification module between the phase-locked module, amplify received satellite signal, improve the power of signal, make the filtering capability of circuit stronger.
According to the utility model provides a pair of jam-proof type frequency demultiplier, the amplification module include with first amplifier circuit that horizontal polarization receiving module connects, with second amplifier circuit that vertical polarization receiving module connects, be used for with first amplifier circuit with the transmission duplexer that second amplifier circuit merges and with the third amplifier circuit that the transmission duplexer is connected amplifies the enhancement to horizontal polarization receiving module and vertical polarization receiving module received satellite signal respectively, then merges then enlargies again two way signals through the transmission duplexer, makes the signal of input frequency filtering module satisfy the power demand, improves the filter effect.
According to the utility model provides a pair of jam-proof type frequency demultiplier, the amplification module still including be used for with first amplifier circuit output signal carries out the first electric capacity of coupling, be used for with second amplifier circuit output signal carries out the second electric capacity of coupling and is used for carrying out the third electric capacity of coupling with third amplifier circuit output signal, first amplifier circuit first electric capacity with the transmission duplexer connects gradually, the second amplifier circuit the second electric capacity with the transmission duplexer connects gradually, the third amplifier circuit the third electric capacity with the radio frequency filter module connects gradually, provides the high frequency signal route, prevents low frequency current and gets into the weak current system, guarantees every circuit module's safety.
According to the utility model provides a pair of jam-proof type frequency demultiplier, the radio frequency filtering module includes microwave radio frequency narrow band rejection filter, effectively with the frequency suppression and the filtering of outband signal.
According to the utility model provides a pair of jam-proof type frequency demultiplier, the phase-locked module includes the RDA3570 chip, gets into phase-locked loop chip RDA3570 and carries out phase discrimination, filtering, operation.
According to the utility model provides a pair of jam-proof type frequency demultiplier, RDA3570 chip includes RFin pin, GND pin, IF pin and VD pin, the phase-locked module still includes crystal oscillator, fourth electric capacity, first resistance, RFin pin with the radio frequency filtering module is connected, the IF pin passes through the fourth electric capacity be connected to the intermediate frequency filtering module, GND pin is connected to ground, the VD pin is connected to ground through first resistance, through the effectual intermediate frequency signal of intermediate frequency filtering module output.
According to the utility model provides a pair of jam-proof type frequency demultiplier, the RDA3570 chip includes XTA L1 pin and XTA L2 pin, the phase-locked module still includes the crystal oscillator, XTA L1 pin passes through the crystal oscillator is connected to XTA L2 pin provides stable, accurate single-frequency oscillation for the circuit.
The utility model provides a pair of jam-proof type frequency demultiplier still includes signal output part, L C filter module includes fifth electric capacity, sixth electric capacity, seventh electric capacity, eighth electric capacity, first inductance, second inductance, third inductance, the one end of fifth electric capacity with intermediate frequency filter module connects, and the other end passes through first inductance ground connection, the one end of sixth electric capacity is through first inductance ground connection, and the other end passes through second inductance ground connection, the one end of seventh electric capacity passes through second inductance ground connection, and the other end passes through third inductance ground connection, the one end of eighth electric capacity passes through third inductance ground connection, and the other end is connected signal output part is with out-of-band signal filtering, suppression and export through L C filter module.
Drawings
The present invention will be further explained with reference to the drawings and examples.
Fig. 1 is a schematic circuit diagram of an embodiment of an interference-proof frequency down converter of the present invention;
fig. 2 is a block diagram of an embodiment of an interference-proof frequency down converter of the present invention;
fig. 3 is a schematic diagram of an embodiment of an interference-proof frequency down converter of the present invention.
Detailed Description
This section will describe in detail the embodiments of the present invention, preferred embodiments of the present invention are shown in the attached drawings, which are used to supplement the description of the text part of the specification with figures, so that one can intuitively and vividly understand each technical feature and the whole technical solution of the present invention, but they cannot be understood as the limitation of the protection scope of the present invention.
In the description of the present invention, it should be understood that the orientation or positional relationship indicated with respect to the orientation description, such as up, down, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, a plurality of means are one or more, a plurality of means are two or more, and the terms greater than, less than, exceeding, etc. are understood as not including the number, and the terms greater than, less than, within, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless there is an explicit limitation, the words such as setting, installation, connection, etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in combination with the specific contents of the technical solution.
Referring to fig. 1-3, an embodiment of the present invention provides an anti-interference down converter, which includes a housing and a down converter circuit disposed in the housing, wherein the down converter circuit includes an antenna module for receiving satellite signals, a rf filter module 20 for suppressing out-of-band signals of a satellite television signal communication protocol frequency band, a phase-locked module 30 for phase-detecting filtering, an if filter module 40 for further attenuating the out-of-band signals, and an L C filter module 50 for further accurately detecting a band cut-off width, the antenna module, the rf filter module 20, the phase-locked module 30, the if filter module 40, and the L C filter module 50 are sequentially connected to filter the received satellite signals out-of-band signals through the rf filter module 20, phase-detecting, filtering, and voltage controlling the signals through the phase-locked module 30, further attenuate and suppress the power of the out-of-band signals in the signals through the if filter module 40, and finally output suitable satellite signals after further accurately detecting the bandwidth of the signals through the L C filter module 50.
The interference type frequency demultiplier mainly performs pilot frequency suppression on the received satellite signals through three steps:
1. the comb-shaped narrow-band rejection pilot frequency filter circuit is arranged in the radio frequency filter module 20, so that the frequency of radio frequency signals of 3.4 GHz-3.7 GHz is effectively rejected.
2. After the intermediate frequency amplification, the signal output end is connected to the intermediate frequency filtering module 40 narrow frequency ceramic low pass filter, so that the pilot frequency signal can be further suppressed; i.e. only allowing the intermediate frequency of 950 MHz-1450 MHz bandwidth signal to pass
3. The processed signals are filtered again by a filter circuit consisting of an L C filter module 50L C to obtain accurate high-narrow frequency intermediate frequency bandwidth.
An embodiment of the utility model provides an interference-proof type frequency demultiplier, antenna module includes horizontal polarization receiving module 11 and vertical polarization receiving module 12, receives the satellite signal under the multiple condition, lowers because the signal attenuation can not receive the satellite signal's of partial bandwidth the condition.
An embodiment of the utility model provides an interference-proof type frequency demultiplier, the antenna module with still be provided with the amplification module between the phase-locked module 30, amplify received satellite signal, improve the power of signal, make the filtering capability of circuit stronger.
An embodiment of the utility model provides an interference-proof type frequency demultiplier, the amplification module include with first amplifier circuit 61 that horizontal polarization receiving module 11 is connected, with second amplifier circuit 62 that vertical polarization receiving module 12 is connected, be used for with first amplifier circuit 61 with second amplifier circuit 62 carries out the transmission duplexer 63 that merges and with the third amplifier circuit 64 that transmission duplexer 63 connects amplifies the enhancement to horizontal polarization receiving module 11 and vertical polarization receiving module 12 received satellite signal respectively, then merges two way signals through transmission duplexer 63 and then enlargies again, makes the signal that inputs frequency filtering module satisfy the power demand, improves the filter effect.
An embodiment of the utility model provides an interference-proof type frequency demultiplier, the amplification module still including be used for with first amplifier circuit 61 output signal carries out the first electric capacity C1 of coupling, be used for with second amplifier circuit 62 output signal carries out the second electric capacity C2 of coupling and is used for carrying out the third electric capacity C3 of coupling with third amplifier circuit 64 output signal, first amplifier circuit 61 first electric capacity C1 with transmission duplexer 63 connects gradually, second amplifier circuit 62 second electric capacity C2 with transmission duplexer 63 connects gradually, third amplifier circuit 64 third electric capacity C3 with radio frequency filtering module 20 connects gradually, provides the high frequency signal route, prevents low frequency current entering weak electric system, guarantees every circuit module's safety.
An embodiment of the utility model provides an jam-proof type frequency demultiplier, radio frequency filtering module 20 includes microwave radio frequency narrow band rejection filter, effectively with the frequency suppression and the filtering of out-of-band signal.
An embodiment of the utility model provides an jam-proof type frequency demultiplier, phase-locked module 30 includes the RDA3570 chip, gets into phase-locked loop chip RDA3570 and carries out phase discrimination, filtering, operation.
An embodiment of the utility model provides an interference-proof type frequency demultiplier, the RDA3570 chip includes RFin pin, GND pin, IF pin and VD pin, phase-locked module 30 still includes crystal oscillator F1, fourth electric capacity C4, first resistance R1, RFin pin with radio frequency filtering module 20 is connected, the IF pin passes through fourth electric capacity C4 is connected to intermediate frequency filtering module 40, the GND pin is connected to ground, the VD pin is connected to ground through first resistance R1, through the effectual intermediate frequency signal of intermediate frequency filtering module 40 output.
An embodiment of the utility model provides an interference-proof type frequency demultiplier, the RDA3570 chip includes XTA L1 pin and XTA L2 pin, phase-locked module 30 still includes crystal oscillator F1, XTA L1 pin passes through crystal oscillator F1 is connected to XTA L2 pin provides stable, accurate single-frequency oscillation for the circuit.
An embodiment of the utility model provides an interference-proof type frequency demultiplier, still include signal output part, L C filtering module 50 includes fifth electric capacity C5, sixth electric capacity C6, seventh electric capacity C7, eighth electric capacity C8, first inductance L1, second inductance L02, third inductance L3, fifth electric capacity C5's one end with intermediate frequency filtering module 40 is connected, and the other end passes through first inductance L1 ground connection, sixth electric capacity C6's one end is through first inductance L1 ground connection, and the other end passes through second inductance L2 ground connection, seventh electric capacity C7's one end is through second inductance L2 ground connection, and the other end passes through third inductance L3 ground connection, eighth electric capacity C8's one end is through third inductance L3 ground connection, and the other end is connected signal output part, through L C filtering module 50 with the filtering out-of-band, restrain and export.
When the device works, satellite television signals with a communication protocol frequency band of 3.8 GHz-4.2 GHz are completely introduced, out-of-band frequencies, namely frequencies smaller than 3.8GHz and larger than 4.2GHz, are simultaneously inhibited and filtered, the signals are received by the horizontal polarization receiving module 11 and the vertical polarization receiving module 12 and are amplified with low noise, the signals are divided into a first stage comprising a first amplifying circuit 61 and a second amplifying circuit 62, and a second stage comprising a third amplifying circuit 64, the horizontal polarization signals and the vertical polarization signals are respectively introduced into the micro-strip comb type narrow-band rejection pilot frequency filtering circuit of the radio frequency filtering module 20 to be filtered through the transmission duplexer 63, the signals enter the phase locking loop chip RDA3570 of the phase locking module 30 to be subjected to phase discrimination, filtering and operation, the required signals of 950 MHz-1450 MHz are obtained through the intermediate frequency filtering module 40, and the signals are finally output and filtered through the microwave low pass filter of the L C filtering module 50.
One embodiment of the utility model provides an anti-interference frequency demultiplier, which comprises a shell and a frequency demultiplier circuit arranged in the shell;
the frequency reducing circuit comprises an antenna module for receiving satellite signals, wherein the antenna module comprises a horizontal polarization receiving module 11, a vertical polarization receiving module 12, a radio frequency filtering module 20 for inhibiting and filtering out-of-band signals of a satellite television signal communication protocol frequency band, a microwave radio frequency narrow-band rejection filter, a phase locking module 30RDA3570 chip for phase discrimination filtering, an intermediate frequency filtering module 40 for further attenuating the out-of-band signals, an L C filtering module 50 for further accurately cutting-off frequency bandwidth, and an amplifying module arranged between the antenna module and the phase locking module 30.
The antenna module, the amplifying module, the radio frequency filtering module 20, the phase locking module 30, the intermediate frequency filtering module 40 and the L C filtering module 50 are connected in sequence.
The amplifying module includes a first amplifying circuit 61 connected to the horizontal polarization receiving module 11, a second amplifying circuit 62 connected to the vertical polarization receiving module 12, a transmission duplexer 63 for combining the first amplifying circuit 61 and the second amplifying circuit 62, and a third amplifying circuit 64 connected to the transmission duplexer 63.
The amplifying module further comprises a first capacitor C1 for coupling the output signal of the first amplifying circuit 61, a third capacitor C3 for coupling the output signal of the second amplifying circuit 62, a second capacitor C2 for coupling the output signal of the third amplifying circuit 64, the first amplifying circuit 61, the first capacitor C1 and the transmission duplexer 63 are sequentially connected, the second amplifying circuit 62, the second capacitor C2 and the transmission duplexer 63 are sequentially connected, and the third amplifying circuit 64, the third capacitor C3 and the radio frequency filter module 20 are sequentially connected.
The RDA3570 chip includes an RFin pin, a GND pin, an IF pin and a VD pin, the phase-locked module 30 further includes a crystal oscillator F1, a fourth capacitor C4 and a first resistor R1, the RFin pin is connected with the rf filtering module 20, the IF pin is connected to the IF filtering module 40 through the fourth capacitor C4, the GND pin is connected to ground, and the VD pin is connected to ground through the first resistor R1, the RDA3570 chip includes an XTA L1 pin and an XTA L2 pin, the phase-locked module 30 further includes a crystal oscillator F1, and the XTA L1 pin is connected to the XTA L2 pin through the crystal oscillator F1.
The L C filter module 50 further includes a signal output end, and includes a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a first inductor L1, a second inductor L2, and a third inductor L3, where one end of the fifth capacitor C5 is connected to the if filter module 40, and the other end is grounded through a first inductor L1, one end of the sixth capacitor C6 is grounded through a first inductor L1, the other end is grounded through a second inductor L2, one end of the seventh capacitor C7 is grounded through a second inductor L2, and the other end is grounded through a third inductor L3, one end of the eighth capacitor C8 is grounded through a third inductor L3, and the other end is connected to the signal output end.
When the satellite television receiver works, satellite television signals of 3.8 GHz-4.2 GHz are received by a horizontally polarized H/Antenna of a horizontally polarized receiving module 11, low-noise amplification is carried out by a first-stage FET-CKRF7513/Q1 of a first amplifying circuit 61, and VGS voltage is filtered by a filter capacitor and then provided with-0.3 to-0.45V voltage by a voltage reduction resistor R1; the VDS is provided by a pin 15 of a phase-locked loop chip RDA3570 after being filtered by a filter capacitor. The low-noise amplified signal is coupled to the microstrip transmission duplexer 63 via a first capacitor C1, and enters a third amplifying circuit 64 for secondary amplification.
2. A signal received by the vertical polarization V/Antenna through the vertical polarization receiving module 12; amplified by the second amplifier circuit 62. The VGS voltage is provided with about-0.3 to-0.5V voltage by a filter capacitor and a current limiting resistor. The VDS of the phase-locked loop chip is provided with about +2.5V voltage by a pin 6 of an RDA3570 of the phase-locked loop chip after being filtered by a filter capacitor. The signal amplified by the second amplifying circuit 62 with low noise is coupled to the transmission duplexer 63 of the microstrip through the second capacitor C2, and enters the third amplifying circuit 64 for secondary amplification
3. The processed signals are further accurately locked to a cutoff frequency band through a multistage L C filter circuit made of inductive circuits such as a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a first inductor 5631, a second inductor L2, a third inductor L and the like, so that the problem of interference of a 5G network on satellite signals is effectively solved.
Above, only the preferred embodiment of the present invention has been described, the present invention is not limited to the above embodiment, and the technical effects of the present invention can be achieved by the same means, which all belong to the protection scope of the present invention.
Claims (10)
1. An interference-free frequency down converter, comprising: the frequency reduction circuit comprises a shell and a frequency reduction circuit arranged in the shell;
the frequency reducing circuit comprises an antenna module for receiving satellite signals, a radio frequency filtering module (20) for inhibiting out-of-band signals of a communication protocol frequency band of the satellite television signals, a phase locking module (30) for phase discrimination filtering, an intermediate frequency filtering module (40) for attenuating the out-of-band signals, and an L C filtering module (50) for accurately narrowing a cutoff frequency band;
the antenna module, the radio frequency filtering module (20), the phase locking module (30), the intermediate frequency filtering module (40) and the L C filtering module (50) are connected in sequence.
2. The interference-free frequency downconverter of claim 1, wherein: the antenna module comprises a horizontally polarized receiving module (11) and a vertically polarized receiving module (12).
3. The interference-free frequency downconverter of claim 2, wherein: an amplifying module is also arranged between the antenna module and the phase locking module (30).
4. The interference-free frequency downconverter of claim 3 wherein: the amplifying module comprises a first amplifying circuit (61) connected with the horizontal polarization receiving module (11), a second amplifying circuit (62) connected with the vertical polarization receiving module (12), a transmission duplexer (63) used for combining the first amplifying circuit (61) and the second amplifying circuit (62), and a third amplifying circuit (64) connected with the transmission duplexer (63).
5. The interference-free frequency downconverter of claim 4 wherein: the amplifying module further comprises a first capacitor (C1) for coupling the output signal of the first amplifying circuit (61), a second capacitor (C2) for coupling the output signal of the second amplifying circuit (62) and a third capacitor (C3) for coupling the output signal of the third amplifying circuit (64), the first amplifying circuit (61), the first capacitor (C1) and the transmission duplexer (63) are sequentially connected, the second amplifying circuit (62), the second capacitor (C2) and the transmission duplexer (63) are sequentially connected, and the third amplifying circuit (64), the third capacitor (C3) and the radio frequency filter module (20) are sequentially connected.
6. The interference-free frequency downconverter of claim 1, wherein: the radio frequency filtering module (20) comprises a microwave radio frequency narrow-band rejection filter.
7. The interference-free frequency downconverter of claim 1, wherein: the phase-locking module (30) includes an RDA3570 chip.
8. The interference rejection downconverter of claim 7 wherein: the RDA3570 chip comprises an RFin pin, a GND pin, an IF pin and a VD pin, the phase-locking module (30) further comprises a crystal oscillator (F1), a fourth capacitor (C4) and a first resistor (R1), the RFin pin is connected with the radio frequency filtering module (20), the IF pin is connected to the intermediate frequency filtering module (40) through the fourth capacitor (C4), the GND pin is connected to the ground, and the VD pin is connected to the ground through the first resistor (R1).
9. The interference-free down converter according to claim 8, wherein the RDA3570 chip comprises XTA L1 pin and XTA L2 pin, the phase-locked module (30) further comprises a crystal oscillator (F1), and the XTA L1 pin is connected to the XTA L2 pin through the crystal oscillator (F1).
10. The interference-free frequency down converter according to claim 1, further comprising a signal output terminal, wherein the L C filter module (50) comprises a fifth capacitor (C5), a sixth capacitor (C6), a seventh capacitor (C7), an eighth capacitor (C8), a first inductor (L1), a second inductor (L), and a third inductor (L), one end of the fifth capacitor (C5) is connected to the IF filter module (40), the other end is connected to ground through the first inductor (L), one end of the sixth capacitor (C6) is connected to ground through the first inductor (L1), the other end is connected to ground through the second inductor (L), one end of the seventh capacitor (C38) is connected to ground through the second inductor (L2), the other end is connected to ground through the third inductor (L), and one end of the eighth capacitor (C8) is connected to ground through the third inductor (L) and the other end is connected to the signal output terminal.
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| CN201921441519.8U CN211019020U (en) | 2019-08-30 | 2019-08-30 | Anti-interference frequency demultiplier |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110492883A (en) * | 2019-08-30 | 2019-11-22 | 珠海市普斯赛特科技有限公司 | A kind of method and circuit of the anti-tampering type frequency reducing of C-band phaselocked loop |
| CN112601057A (en) * | 2020-11-27 | 2021-04-02 | 浙江盛洋科技股份有限公司 | Anti 5G signal interference device that removes of C wave band |
-
2019
- 2019-08-30 CN CN201921441519.8U patent/CN211019020U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110492883A (en) * | 2019-08-30 | 2019-11-22 | 珠海市普斯赛特科技有限公司 | A kind of method and circuit of the anti-tampering type frequency reducing of C-band phaselocked loop |
| CN112601057A (en) * | 2020-11-27 | 2021-04-02 | 浙江盛洋科技股份有限公司 | Anti 5G signal interference device that removes of C wave band |
| CN112601057B (en) * | 2020-11-27 | 2023-03-03 | 浙江盛洋科技股份有限公司 | Anti 5G signal interference device that removes of C wave band |
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