CN210897242U

CN210897242U - Display panel

Info

Publication number: CN210897242U
Application number: CN201921723060.0U
Authority: CN
Inventors: 赵立新; 王富中; 张斌
Original assignee: Geke Microelectronics Shanghai Co Ltd
Current assignee: Geke Microelectronics Shanghai Co Ltd; Galaxycore Shanghai Ltd Corp
Priority date: 2019-10-15
Filing date: 2019-10-15
Publication date: 2020-06-30
Anticipated expiration: 2029-10-15

Abstract

The utility model provides a display panel, include: a base plate and/or panel substrate; the single crystal wafer is bonded or attached to the substrate and/or the panel substrate, and at least one conductive interconnection layer is arranged on the second surface of the single crystal wafer. The utility model discloses a display panel adopts single crystal wafer to replace amorphous silicon or polycrystalline silicon layer among the prior art, has reduced device structural defect, has improved display panel's image quality, has improved display panel's yields, has satisfied the demand to display panel high performance.

Description

Display panel

Technical Field

The utility model relates to a display panel.

Background

The display panel can be used in various fields such as a television set, various audio/video systems, a computer monitor device, a navigation terminal device, a portable terminal device, and the like. Various types of display panels are capable of outputting images to the outside using different types of display units. For example, the display unit may be a Liquid Crystal Display (LCD), a Light Emitting Diode (LED), an Organic Light Emitting Diode (OLED), an active matrix OLED (amoled), or the like.

With the rapid development of display technology, the requirements of the current market for display panels are gradually increasing, especially the requirements for miniaturization, low power consumption, low cost, high image quality, and the like are increasing. In the manufacturing method of the display panel in the prior art, an amorphous silicon or polysilicon layer is usually formed on a substrate, then an active region is etched on the amorphous silicon or polysilicon layer after excimer laser crystallization (ELA) processing, device structures such as a source, a drain, a gate channel region and the like are formed in the active region, and at least one conductive interconnection layer and the like are formed on the device structures, so that a complete display panel is formed. Since the device structure is formed in the amorphous silicon or polysilicon layer which may have more defects, it is easy to affect the imaging quality and yield of the display panel.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a display panel improves display panel's image quality, improves display panel's yields, satisfies the demand to display panel high performance.

Based on the above consideration, the utility model provides a display panel, include: a base plate and/or panel substrate; the single crystal wafer is bonded or attached to the substrate and/or the panel substrate, and at least one conductive interconnection layer is arranged on the second surface of the single crystal wafer.

Preferably, an epitaxial layer is arranged on the first surface of the single crystal wafer, and a partial device structure is arranged in the epitaxial layer.

Preferably, the partial device structure comprises a source electrode, a drain electrode, a grid electrode channel region and a device isolation region.

Preferably, the thickness of the epitaxial layer is 3-5 μm.

Preferably, the material of the panel substrate is polyimide or fluorinated polyimide.

Preferably, the thickness of the panel substrate is 50 to 100 μm.

Preferably, the first surface of the single crystal wafer and the substrate and/or the panel substrate are respectively provided with an oxide layer for bonding.

Preferably, the material of the oxide layer is silicon dioxide.

Preferably, the oxide layers have a thickness of 0.5 to 2 μm, respectively.

Preferably, the material of the conductive interconnection layer is metal or conductive metal compound.

Preferably, the thickness of the conductive interconnection layer is 1 to 2 μm.

Preferably, the substrate is made of glass.

Compared with the prior art, the utility model discloses a display panel adopts single crystal wafer to replace amorphous silicon or polycrystalline silicon layer among the prior art, has reduced device structural defect, has improved display panel's image quality, has improved display panel's yields, has satisfied the demand to display panel high performance.

Drawings

Other features, objects and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments thereof, which proceeds with reference to the accompanying drawings.

Fig. 1 to 8 are schematic process views illustrating a method for manufacturing a display panel according to an embodiment of the present invention;

fig. 9 to 16 are schematic process diagrams of a method for manufacturing a display panel according to another embodiment of the present invention;

fig. 17 is a flowchart of a method for manufacturing a display panel according to the present invention.

In the drawings, like or similar reference numbers indicate like or similar devices (modules) or steps throughout the different views.

Detailed Description

For solving the problem in the prior art, the utility model provides a display panel, include: a base plate and/or panel substrate; the single crystal wafer is bonded or attached to the substrate and/or the panel substrate, and at least one conductive interconnection layer is arranged on the second surface of the single crystal wafer. The utility model discloses a display panel adopts single crystal wafer to replace amorphous silicon or polycrystalline silicon layer among the prior art, has reduced device structural defect, has improved display panel's image quality, has improved display panel's yields, has satisfied the demand to display panel high performance.

In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings which form a part hereof. The accompanying drawings illustrate, by way of example, specific embodiments in which the invention may be practiced. The illustrated embodiments are not intended to be exhaustive of all embodiments according to the invention. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.

The utility model provides a display panel, its manufacturing method is shown in figure 17, include: providing a monocrystalline wafer; providing a substrate; bonding or attaching the first surface of the single crystal wafer with a substrate, thinning the single crystal wafer from the second surface, and forming at least one conductive interconnection layer on the thinned second surface of the single crystal wafer.

The following describes the manufacturing method of the display panel in detail with reference to the specific embodiment.

Example one

Fig. 1 to 8 are schematic process views illustrating a method for manufacturing a display panel according to an embodiment of the present invention.

Referring to fig. 1, a single crystal wafer is provided, preferably comprising a wafer substrate 100 and an epitaxial layer 101 disposed on a first side, the epitaxial layer 101 may have a thickness of 3-5 μm. A portion of the device structure 102 is formed in the epitaxial layer 101, where the portion of the device structure 102 includes, for example, a source, a drain, a gate channel region, and a device isolation region.

Referring to fig. 2, for the case where bonding with the substrate 104 is required in the subsequent step, an oxide layer 103 is preferably formed on the first surface of the single crystal wafer, and specifically, the oxide layer 103 is formed on the surface of the epitaxial layer 101.

Referring to fig. 3, a substrate 104 is provided, and the substrate 104 is made of glass, for example. In the case of a flexible display panel, a panel substrate 105 made of a flexible material such as polyimide or fluorinated polyimide may be formed on the base substrate 104, and the thickness of the panel substrate 105 may be 50 to 100 μm.

For the case where bonding to a single crystal wafer is required in a subsequent step, it is preferable to form the oxide layer 106 on the substrate 104. In the present embodiment, in the case where the panel substrate 105 exists on the base plate 104, the oxide layer 106 is formed on the surface of the panel substrate 105; for other embodiments not shown, in the case that the panel substrate 105 does not exist on the base plate 104, the oxide layer 106 is directly formed on the surface of the base plate 104.

Referring to fig. 4, a first side of the single crystal wafer is bonded or attached to a substrate 104. For the bonding case, the oxide layer 103 on the single crystal wafer provides a better bonding force with the oxide layer 106 on the substrate 104. Preferably, the

oxide layers

103 and 106 are made of silicon dioxide, and have a thickness of 0.5-2 μm, respectively, and can be formed by a plasma enhanced chemical vapor deposition process. For the bonding case, the

oxide layers

103 and 106 are not required to be formed, and the single crystal wafer and the substrate 104 can provide a good bonding force through an adhesive material such as an adhesive.

In order to solve the problems of warpage, shape and size matching of the single crystal wafer, it is preferable that the single crystal wafer is cut into a plurality of single crystal units, the shape and size of each single crystal unit is consistent with the shape and size of the finally required display panel, and then the first surfaces of the plurality of single crystal units are bonded or attached to the substrate 104 to form the structure shown in fig. 4.

Referring to fig. 5 and fig. 6, the single crystal wafer is thinned from the second side, preferably stopping on the epitaxial layer 101, at least one conductive interconnection layer 107 is formed on the thinned second side, the material of the conductive interconnection layer 107 is preferably metal or conductive metal compound, the thickness is 1-2 μm, and part of the device structure 102 in the epitaxial layer 101 is connected with the conductive interconnection layer 107 through the through silicon via 108.

Referring to fig. 7, in the case where the base plate 104 is not required for the panel substrate 105 requiring only flexibility, the base plate 104 may be thinned and removed after the conductive interconnection layer 107 is formed, and then cut along a cutting line (dot-dash line in the figure) to form a single display panel structure as shown in fig. 8.

As shown in fig. 8, the display panel of the present invention includes: a panel substrate 105 (in the present embodiment shown in fig. 8, only the panel substrate 105 is included; in other embodiments not shown, there may be a case where only the base plate 104 is included or both the panel substrate 105 and the base plate 104 are included). Preferably, the panel substrate 105 is made of polyimide or fluorinated polyimide, the thickness is 50-100 μm, and the substrate 104 is made of glass.

The utility model discloses a display panel still includes: and the first side of the single crystal wafer is bonded or attached with the base plate 104 and/or the panel substrate 105, and the second side of the single crystal wafer is provided with at least one conductive interconnection layer 107. Preferably, the conductive interconnection layer 107 is made of metal or conductive metal compound and has a thickness of 1-2 μm.

Wherein, an epitaxial layer 101 is arranged on the first surface of the monocrystalline wafer, and the thickness of the epitaxial layer 101 is preferably 3-5 μm. A partial device structure 102 is disposed in the epitaxial layer 101, and the partial device structure 102 includes a source, a drain, a gate channel region and a device isolation region. Portions of device structure 102 in epitaxial layer 101 are connected to conductive interconnect layer 107 by through-silicon-vias 108.

For the bonding case, the first side of the single crystal wafer and the substrate and/or panel substrate are respectively provided with an

oxide layer

103, 106 for bonding to provide a better bonding force. The oxide layers 103 and 106 are made of silicon dioxide and have a thickness of 0.5-2 μm.

Example two

Fig. 9 to 16 are schematic process diagrams of a method for manufacturing a display panel according to another embodiment of the present invention.

Referring to fig. 9, a single crystal wafer is provided, preferably, the single crystal wafer comprises a wafer substrate 200 and an epitaxial layer 201 disposed on a first side, and the thickness of the epitaxial layer 201 may be 3-5 μm.

Referring to fig. 10, for the case where bonding with the substrate 204 is required in the subsequent step, it is preferable to form an oxide layer 203 on the first surface of the single crystal wafer, specifically, the oxide layer 203 is formed on the surface of the epitaxial layer 201.

Referring to fig. 11, a substrate 204 is provided, and the material of the substrate 204 is, for example, glass. In the case of a flexible display panel, a panel substrate 205 made of a flexible material such as polyimide or fluorinated polyimide may be formed on the base substrate 204, and the thickness of the panel substrate 205 may be 50 to 100 μm.

For the case where bonding to a single crystal wafer is required in a subsequent step, it is preferable to form the oxide layer 206 on the substrate 204. In the present embodiment, in the case where the panel substrate 205 exists on the base plate 204, the oxide layer 206 is formed on the surface of the panel substrate 205; for other embodiments not shown, in the case where the panel substrate 205 is not present on the base plate 204, the oxide layer 206 is directly formed on the surface of the base plate 204.

Referring to fig. 12, a first side of the single crystal wafer is bonded or attached to a substrate 204. For the bonding case, the oxide layer 203 on the single crystal wafer and the oxide layer 206 on the substrate 204 provide a better bonding force. Preferably, the oxide layers 203 and 206 are made of silicon dioxide, and have a thickness of 0.5 to 2 μm, respectively, and can be formed by a plasma enhanced chemical vapor deposition process. For the bonding case, the oxide layers 203 and 206 are not required to be formed, and the single crystal wafer and the substrate 204 can provide a good bonding force through an adhesive material such as an adhesive.

In order to solve the problems of warpage, shape and size matching, etc. of the single crystal wafer, it is preferable that the single crystal wafer is cut into a plurality of single crystal units, the shape and size of each single crystal unit is consistent with the shape and size of the finally required display panel, and then the first surfaces of the plurality of single crystal units are bonded or attached to the substrate 204 to form the structure shown in fig. 12.

Referring to fig. 13, the single crystal wafer is thinned from the second side, preferably stopping on the epitaxial layer 201, and a partial device structure 202 is formed in the epitaxial layer 201, wherein the partial device structure 202 includes, for example, a source, a drain, a gate channel region and a device isolation region.

Referring to fig. 14, at least one conductive interconnection layer 207 is formed on the thinned second surface, the material of the conductive interconnection layer 207 is preferably metal or conductive metal compound, the thickness is 1-2 μm, and a part of the device structure 202 in the epitaxial layer 201 is connected with the conductive interconnection layer 207 through a contact hole 208.

Referring to fig. 15, in the case where the base plate 204 is not required for the panel substrate 205 which only needs to be flexible, after the conductive interconnection layer 207 is formed, the base plate 204 may be thinned and removed, and then cut along a cutting line (dot-dash line in the figure) to form a single display panel structure as shown in fig. 16.

As shown in fig. 16, the display panel of the present invention includes: a panel substrate 205 (in the present embodiment shown in fig. 16, only the panel substrate 205 is included; in other embodiments not shown, there may be a case where only the base plate 204 is included or both the panel substrate 205 and the base plate 204 are included). Preferably, the panel substrate 205 is made of polyimide or fluorinated polyimide, the thickness is 50-100 μm, and the substrate 204 is made of glass.

The utility model discloses a display panel still includes: and a single crystal wafer, wherein a first side of the single crystal wafer is bonded or attached to the base plate 204 and/or the panel substrate 205, and at least one conductive interconnection layer 207 is arranged on a second side of the single crystal wafer. Preferably, the conductive interconnection layer 207 is made of metal or conductive metal compound, and has a thickness of 1-2 μm.

Wherein, an epitaxial layer 201 is arranged on the first surface of the monocrystalline wafer, and the thickness of the epitaxial layer 201 is preferably 3-5 μm. A partial device structure 202 is disposed in the epitaxial layer 201, and the partial device structure 202 includes a source, a drain, a gate channel region and a device isolation region. A portion of device structure 202 in epitaxial layer 101 is connected to conductive interconnect layer 207 through contact hole 208.

For the bonding condition, the first surface of the single crystal wafer and the substrate and/or the panel substrate are respectively provided with an oxide layer 203 and an oxide layer 206 for bonding, so as to provide better bonding force. The oxide layers 203 and 206 are made of silicon dioxide and have a thickness of 0.5-2 μm.

To sum up, the utility model provides a display panel, include: a base plate and/or panel substrate; the single crystal wafer is bonded or attached to the substrate and/or the panel substrate, and at least one conductive interconnection layer is arranged on the second surface of the single crystal wafer. The utility model discloses a display panel adopts single crystal wafer to replace amorphous silicon or polycrystalline silicon layer among the prior art, has reduced device structural defect, has improved display panel's image quality, has improved display panel's yields, has satisfied the demand to display panel high performance.

It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive. Furthermore, it will be obvious that the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. Several elements recited in the apparatus claims may also be implemented by one element. The terms first, second, etc. are used to denote names, but not any particular order.

Claims

1. A display panel, comprising:

a base plate and/or panel substrate;

the single crystal wafer is bonded or attached to the substrate and/or the panel substrate, and at least one conductive interconnection layer is arranged on the second surface of the single crystal wafer.

2. The display panel of claim 1, wherein the first side of the single crystal wafer has an epitaxial layer disposed thereon, the epitaxial layer having a portion of the device structure disposed therein.

3. The display panel of claim 2, wherein the portion of the device structure includes a source, a drain, a gate channel region, and a device isolation region.

4. The display panel of claim 2, wherein the epitaxial layer has a thickness of 3-5 μm.

5. The display panel according to claim 1, wherein the panel substrate is made of polyimide or fluorinated polyimide.

6. The display panel according to claim 1, wherein the thickness of the panel substrate is 50 to 100 μm.

7. The display panel according to claim 1, wherein the first surface of the single crystal wafer and the substrate and/or the panel substrate are provided with an oxide layer for bonding, respectively.

8. The display panel of claim 7, wherein the oxide layer is silicon dioxide.

9. The display panel according to claim 7, wherein the oxide layers have thicknesses of 0.5 to 2 μm, respectively.

10. The display panel of claim 1, wherein the conductive interconnection layer is made of a metal or a conductive metal compound.

11. The display panel of claim 1, wherein the conductive interconnect layer has a thickness of 1-2 μ ι η.

12. The display panel according to claim 1, wherein the substrate is made of glass.