CN210723043U - Floating junction type Schottky barrier diode - Google Patents
Floating junction type Schottky barrier diode Download PDFInfo
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- CN210723043U CN210723043U CN201920806491.7U CN201920806491U CN210723043U CN 210723043 U CN210723043 U CN 210723043U CN 201920806491 U CN201920806491 U CN 201920806491U CN 210723043 U CN210723043 U CN 210723043U
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Abstract
The utility model relates to a float knot formula schottky barrier diode, include: a substrate layer 1; the epitaxial layer 2 is positioned on the upper layer of the substrate layer 1; the floating junction layer 4 is positioned on two sides of the upper layer of the epitaxial layer 2; an insulating polysilicon layer 5 located on the upper layer of the floating junction layer 4; a trench 6 located on the upper layer of the insulating polysilicon layer 5; a Schottky contact cathode 7 which is positioned at the lower layer of the substrate layer 1; and the Schottky contact anode 8 covers the epitaxial layer 2, the insulating polycrystalline silicon layer 5 and the groove 6. The utility model provides a diode, through the process steps who improves the knot formula of floating schottky barrier diode, does not need the secondary growth epitaxial layer, has increased device breakdown voltage, has reduced on-resistance, has promoted the power merit, has reduced the technology degree of difficulty and cost.
Description
Technical Field
The utility model belongs to the technical field of the microelectronics is made, concretely relates to float knot formula schottky barrier diode.
Background
The SiC Schottky barrier diode is used as a wide bandgap semiconductor device to replace a Si device in the technical field of power electronics. The greatest advantage of SiC schottky barrier diodes in the field of power electronics is their excellent reverse recovery characteristics. At present, commercial SiC schottky barrier diodes are widely used in the fields of high-frequency switching power supplies, power factor correction, motor driving and the like. When used in conjunction with the best current power MOSFETs, the switching frequency can reach 400kHz and is expected to be higher than 1 MHz. Many companies use SiC schottky barrier diodes instead of Si fast recovery diodes in their IGBT inverter or inverter devices with overall benefits far exceeding the cost increase due to the price difference between SiC and Si devices.
Compared with the Si Schottky barrier diode, the SiC Schottky barrier diode has the advantages of low leakage current, high switching speed and the like, and has great potential in the aspect of power application. However, there is still a contradiction between the breakdown voltage and the on-resistance that is a constraint that the high breakdown voltage and the low on-resistance cannot be satisfied at the same time. Meanwhile, in the process of manufacturing the common Schottky barrier diode with the floating junction structure, the epitaxial layer needs to grow twice, and the process difficulty and the cost are high.
SUMMERY OF THE UTILITY MODEL
In order to solve the above-mentioned problem that exists among the prior art, the utility model provides a floating junction formula schottky barrier diode. The to-be-solved technical problem of the utility model is realized through following technical scheme:
an embodiment of the utility model provides a floating junction formula schottky barrier diode, include:
a substrate layer;
the epitaxial layer is positioned on the upper layer of the substrate layer;
the floating junction layers are positioned on two sides of the upper layer of the epitaxial layer;
the insulating polycrystalline silicon layer is positioned on the upper layer of the floating junction layer;
the groove is positioned on the upper layer of the insulation type polycrystalline silicon layer;
the Schottky contact cathode is positioned at the lower layer of the substrate layer;
and the Schottky contact anode covers the epitaxial layer, the insulating polycrystalline silicon layer and the groove.
In an embodiment of the present invention, the epitaxial layer is made of N-The thickness of the ion-doped 4H-SiC is 5-15 mu m.
In one embodiment of the present invention, the floating layer is made of metal Ti and has a thickness of 0.5 μm to 2 μm.
In one embodiment of the present invention, the thickness of the insulating polysilicon layer is 4 μm to 6 μm, and the width is 0.4 μm to 0.6 μm.
In one embodiment of the present invention, the cross-sectional area of the trench is smaller than the cross-sectional area of the insulating polysilicon.
In an embodiment of the present invention, the material of the schottky contact cathode is Al/Ti alloy, the thickness is 300nm to 500nm, wherein the content ratio of metal Al to metal Ti is 3: 1.
in one embodiment of the present invention, the schottky contact cathode is made of metal Ni and has a thickness of 400nm to 600 nm.
Compared with the prior art, the beneficial effects of the utility model are that:
1. the utility model provides a diode has increased device breakdown voltage, has reduced on-resistance, has promoted the power optimal value.
2. The utility model provides a manufacturing method of diode has improved the process steps of 4H-SiC floating junction formula schottky barrier diode, does not need the secondary growth epitaxial layer, has reduced the technology degree of difficulty and cost.
Drawings
Fig. 1 is a schematic longitudinal sectional view of a diode in a floating junction schottky barrier diode according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a lateral cross section of a diode in a floating junction schottky barrier diode according to an embodiment of the present invention;
fig. 3 is a schematic flow chart of a method for manufacturing a floating junction schottky barrier diode according to an embodiment of the present invention;
fig. 4 is a schematic view of a manufacturing process in a method for manufacturing a floating junction schottky barrier diode according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the present invention is not limited thereto.
Example one
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and to simplify the description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present invention, unless otherwise expressly specified or limited, the first feature "on" or "under" the second feature may include both the first and second features being in direct contact, and may also include the first and second features being in contact, not being in direct contact, but rather being in contact with each other via additional features between them. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
In the description of the present invention, reference to the description of the terms "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
Referring to fig. 1 and fig. 2, fig. 1 is a schematic longitudinal section of a diode in a floating junction schottky barrier diode provided by an embodiment of the present invention, and fig. 2 is a schematic transverse section of a diode in a floating junction schottky barrier diode provided by an embodiment of the present invention, the diode includes:
a substrate layer 1;
the epitaxial layer 2 is positioned on the upper layer of the substrate layer 1;
the floating junction layer 4 is positioned on two sides of the upper layer of the epitaxial layer 2;
an insulating polysilicon layer 5 on the upper layer of the floating layer 4;
a trench 6 located on the upper layer of the insulating polysilicon layer 5;
a Schottky contact cathode 7 which is positioned at the lower layer of the substrate layer 1;
and a Schottky contact anode 8 covering the epitaxial layer 2, the insulating polysilicon layer 5 and the trench 6.
In particular, the upper layer mentioned in the present invention refers to the upper layer adjacent to and above the upper layer; the two sides of the upper layer of the epitaxial layer 2 mentioned in the utility model refer to the upper layer of a step-shaped structure formed on the upper layer of the epitaxial layer 2 by etching; the lower layer mentioned in the utility model is adjacent to the lower layer and is positioned below the lower layer.
In particular, the substrate layer 1 may be chosen to be N+The prefix 4H refers to the structure type of SiC, SiC can form different crystal structures under different physical and chemical environments, the crystals with the same components and different shapes, structures and physical characteristics are called homogeneous multi-image variants, and the SiC has more than 200 homogeneous multi-image variants, the most common homogeneous multi-image variant structures of SiC are 3C-SiC (zinc blende structure), 2H-SiC (zinc blende structure), 4H-SiC and 6H-SiC, wherein 3C-SiC is also called β -SiC, 2H-SiC is called α -SiC, and N is selected as the novel silicon carbide, the silicon carbide has the advantages of large forbidden band width, high breakdown electric field intensity, high saturated electron drift velocity, large heat conductivity, small dielectric constant, strong radiation resistance, good chemical stability and the like, and is considered as a wide band gap semiconductor material with great potential for manufacturing high-temperature, high-frequency, high-power and radiation resistance devices+The ion-doped 4H-SiC can ensure that the Schottky diode has extremely fast switching response speed, the switching characteristic is not influenced by junction temperature, the switching loss is extremely low, and the reverberation recovery time is almost zero.
In particular, in embodiments of the invention, the material of epitaxial layer 2 may be selected to be N-Ion-doped 4H-SiC of which the thickness can beSo as to be 5 to 15 μm.
In particular, the epitaxial layer 2 is situated on top of the substrate layer 1, by being in N+Growing a layer of N on the ion-doped 4H-SiC substrate by adopting a horizontal hot-wall CVD method-Ion-doped 4H-SiC, an epitaxial layer 2 having a thickness of 5 μm to 15 μm, wherein N-The doping concentration of the ions is 1X 1016cm-3～3×1016cm-3。
In particular, in the embodiment of the present invention, the material of the floating layer 4 may be metal Ti, and the thickness may be 0.5 μm to 2 μm.
Specifically, metal Ti with the thickness of 0.5-2 mu m is deposited on two sides of the upper layer of the epitaxial layer 2 by a magnetron sputtering method to serve as a floating junction layer, and the floating junction layer is used for reducing the electric field peak value at the vertex angle. In the development process of power semiconductor devices, higher current and higher reverse blocking voltage are always pursued, and in order to realize high breakdown voltage, in recent years, in the research on new structures of power semiconductor devices, the hottest is a super junction structure, a semi-super junction structure and a floating junction structure. However, since the manufacturing difficulty of the super junction is very large, multiple times of alternating ion implantation and epitaxial growth are required, and compared with the floating junction device, the floating junction device is easier to realize.
In particular, in the embodiment of the present invention, the thickness of the insulating polysilicon layer 5 may be 4 μm to 6 μm, and the width may be 0.4 μm to 0.6 μm. Such parameters are selected to provide devices with good forward electrical, breakdown, and reverse recovery characteristics.
In particular, in the embodiment of the present invention, the trench 6 is aligned with the boundary of the insulating polysilicon 5, and the cross-sectional area of the trench 6 is smaller than that of the insulating polysilicon 5, so as to uniform the current density distribution in the device, thereby facilitating the subsequent test and analysis.
In particular, in the embodiment of the present invention, the material of the schottky contact cathode 7 may be Al/Ti alloy, and the thickness may be 300nm to 500nm, wherein the content ratio of the metal Al to the metal Ti is 3: 1.
in particular, in the embodiment of the present invention, the material of the schottky contact cathode 8 is Ni metal with a thickness of 400nm to 600 nm.
The utility model provides a schottky diode through the process steps who improves the formula of floating schottky barrier diode, does not need the secondary growth epitaxial layer, has increased device breakdown voltage, has reduced on-resistance, has promoted the power merit, and the stability of device is better.
The utility model discloses another embodiment provides a manufacturing method of floating junction formula schottky barrier diode, include:
s1, selecting a substrate layer 1;
s2, forming an epitaxial layer 2 on the substrate layer 1;
s3, forming SiO on the upper layer of the epitaxial layer 22An isolation layer 3;
s4 etching SiO2The isolation layer 3 and the epitaxial layer 2 form an etching window;
s5, depositing metal on the upper layer of the epitaxial layer 2 outside the etching window 2 to form a floating junction layer 4;
s6, depositing an insulation type polycrystalline silicon layer 5 on the upper layer of the floating layer 4;
s7, etching the insulation type polycrystalline silicon layer 5 to form a groove 6;
s8, forming a Schottky contact cathode 7 on the lower layer of the substrate layer 1;
and S9, forming a Schottky contact anode 8, and covering the epitaxial layer 2, the insulating polycrystalline silicon layer 5 and the trench 6.
In particular, in an embodiment of the present invention, before step S7, the method further includes:
etching SiO2The isolating layer 3 and the epitaxial layer 2 enable the epitaxial layer 2 and the insulating polycrystalline silicon layer 5 to be positioned on the same plane.
Specifically, as shown in fig. 3 and 4, the thickness range is selected from 0.4 μm to 1 μm, and the material is N+Ion-doped 4H-SiC is used as substrate layer 1.
In N+A layer of N with the thickness of 5-15 mu m is grown on the ion-doped 4H-SiC sample wafer by adopting a horizontal hot-wall CVD method-Ion-doped 4H-SiC, forming epitaxial layer 2, the precursor gases used are monosilane and propane in a hydrogen atmosphere. The growth pressure is kept at 250Mbar, and the content ratio of C and Si is 0.6-1.5. Wherein，N-The ion doping concentration is 1 × 1016cm-3～3×1016cm-3. The horizontal hot-wall CVD is adopted to finish the growth of the SiC homoepitaxial material, and the thickness concentration uniformity of the SiC epitaxial layer can be effectively improved by optimizing the flow rate and the C/Si ratio of the carrier gas H2. The method is carried out in a horizontal hot wall CVDVP508GFR epitaxial furnace with SiH4-C3H8-H2, which is produced by EPIGRESS company, wherein the typical epitaxial temperature is 1550-1600 ℃, the growth pressure is 50-150 mbar, H2 is used as diluent gas and carrier gas, nitrogen is used as an N-type doping source, SiH4 and C3H8 are used as growth sources, a base rotates by air flotation to improve the thickness uniformity of epitaxial concentration, and the growth rate is 2-12 mu m/H.
And cleaning the SiC sample wafer by using a standard RCA process for removing particle contamination and metal impurities, wherein the principle is that an oxide film is generated by oxidation of H2O2, the oxide film is corroded by NH4OH, oxidation occurs immediately after corrosion, and oxidation and corrosion are repeated, so that particles attached to the surface of the sample wafer fall into the cleaning solution along with the corrosion. Then, a process combining dry oxygen oxidation and wet oxygen oxidation is adopted to form SiO with the thickness of 200nm on the epitaxial layer 22And an isolation layer 3.
Then using the photoresist as a mask to the SiO2The isolation layer 3 is selectively etched to form an etching window, RIE etching is adopted, and CHF is used as reaction gas3Etching time of 1.5min and gas flow of 40cm3Min, the power of the radio frequency power supply is 200W, and the gas pressure of the reaction chamber is 5 Pa. Masking and photolithography of SiO2The isolation layer 3 forms an etching window, and the area of the etching window occupies SiO280% -90% of the total area of the isolation layer 3, and then partially etching the epitaxial layer 2 outside the etching window according to the etching window, wherein the etching depth is 7 μm.
And depositing a layer of metal Ti with the thickness of 0.5-2 mu m on the epitaxial layer 2 outside the etching window by adopting a magnetron sputtering method, and removing redundant metal Ti by adopting chemical etching to form a floating junction layer 4.
Depositing an insulating polycrystalline silicon layer 5 with the thickness of 4-6 mu m and the width of 0.4-0.6 mu m by adopting a low-pressure chemical vapor deposition method;
and then, an ICP etching method is adopted to enable the epitaxial layer 2 and the insulating polycrystalline silicon layer 5 to be positioned on the same plane, and a groove 6 which is aligned with the edge of the insulating polycrystalline silicon layer 5 and has a cross section area smaller than that of the insulating polycrystalline silicon layer 5 is etched.
Then Al/Ti alloy with the thickness ratio of 300nm/100nm is deposited on the lower layer of the epitaxial layer 2 to form a cathode 7 with Schottky contact, and annealing is carried out for 3min at 1050 ℃ in a nitrogen atmosphere.
And then 500nm Ni is deposited on the plane where the epitaxial layer 2 and the insulating polycrystalline silicon layer 5 are positioned to form a Schottky contact anode 8 covering the epitaxial layer 2, the insulating polycrystalline silicon layer 5 and the groove 6, and then annealing is carried out in a nitrogen atmosphere at 1050 ℃ for 3min, thereby forming the floating junction type Schottky barrier diode provided by the utility model.
The utility model provides a preparation technology does not need the secondary growth epitaxial layer, has increased device breakdown voltage, has reduced on-resistance, has promoted the power merit, and the stability of device is better. The prepared diode can be applied to a high-power integrated circuit to replace a Si diode to provide more excellent power characteristics, and is widely applied to the fields of power electronic systems and electric automobiles.
The foregoing is a more detailed description of the present invention, taken in conjunction with the specific preferred embodiments thereof, and it is not intended that the invention be limited to the specific embodiments shown and described. To the utility model belongs to the technical field of ordinary technical personnel, do not deviate from the utility model discloses under the prerequisite of design, can also make a plurality of simple deductions or replacement, all should regard as belonging to the utility model discloses a protection scope.
Claims (7)
1. A floating-junction schottky barrier diode, comprising:
a substrate layer (1);
the epitaxial layer (2) is positioned on the upper layer of the substrate layer (1);
the floating layer (4) is positioned on two sides of the upper layer of the epitaxial layer (2);
the insulating polycrystalline silicon layer (5) is positioned on the upper layer of the floating junction layer (4);
the groove (6) is positioned on the upper layer of the insulation type polycrystalline silicon layer (5);
a Schottky contact cathode (7) which is positioned below the substrate layer (1);
a Schottky contact anode (8) covering the epitaxial layer (2), the insulating polysilicon layer (5) and the trench (6).
2. Diode according to claim 1, characterized in that the epitaxial layer (2) material is N-The thickness of the ion-doped 4H-SiC is 5-15 mu m.
3. The diode according to claim 1, wherein the material of the floating junction layer (4) is metal Ti, and the thickness is 0.5-2 μm.
4. The diode according to claim 1, wherein the insulating polysilicon layer (5) has a thickness of 4 μm to 6 μm and a width of 0.4 μm to 0.6 μm.
5. Diode according to claim 1, characterized in that the cross-sectional area of said trench (6) is smaller than the cross-sectional area of said insulating polycrystalline silicon layer (5).
6. The diode of claim 1, wherein the schottky contact cathode (7) is an Al/Ti alloy with a thickness of 300nm to 500 nm.
7. The diode of claim 1, wherein the schottky contact cathode (7) is made of Ni metal and has a thickness of 400nm to 600 nm.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110323283A (en) * | 2019-05-29 | 2019-10-11 | 西安电子科技大学芜湖研究院 | A kind of floating junction type Schottky barrier diode and preparation method thereof |
| CN110323283B (en) * | 2019-05-29 | 2024-11-05 | 西安电子科技大学芜湖研究院 | Floating junction type Schottky barrier diode and manufacturing method thereof |
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2019
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110323283A (en) * | 2019-05-29 | 2019-10-11 | 西安电子科技大学芜湖研究院 | A kind of floating junction type Schottky barrier diode and preparation method thereof |
| CN110323283B (en) * | 2019-05-29 | 2024-11-05 | 西安电子科技大学芜湖研究院 | Floating junction type Schottky barrier diode and manufacturing method thereof |
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