CN210668389U - Crystalline silicon solar cell with front surface in local passivation contact - Google Patents

Abstract

The utility model discloses a crystal silicon solar cell of local passivation contact in front, the whole compound speed on battery positive surface further reduces, and battery conversion efficiency is higher. The crystalline silicon solar cell comprises a front electrode, a front passivation layer, an N-type silicon doping layer, a P-type silicon substrate layer and a back electrodeThe P-type silicon substrate layer is formed on the substrate, the P-type silicon substrate layer is⁺A P-type polysilicon layer with front side of textured surface and front passivation layer laminated on the N⁺The front electrode is formed on the N-type polysilicon layer and the other region of the N-type silicon doped layer through the front passivation layer⁺On the upper surface of the type polysilicon layer and N⁺The type polysilicon layer forms an ohmic contact.

Description

Crystalline silicon solar cell with front surface in local passivation contact

Technical Field

The utility model belongs to crystalline silicon solar cell field relates to a crystalline silicon solar cell of local passivation contact in front.

Background

The PERC (passivated Emitter and reader cell) crystalline silicon solar cell adopts the dielectric layer as the back passivation layer, so that the back surface recombination rate can be greatly reduced, and the photoelectric conversion efficiency of the cell is improved. Compared with the traditional aluminum back field battery, the PERC battery can obtain 1% -1.5% efficiency improvement. After back surface recombination is effectively inhibited, front surface recombination becomes a bottleneck for improving battery efficiency, so that many photovoltaic enterprises begin to introduce a selective emitter technology on the PERC battery to reduce the front surface recombination rate and further improve the battery efficiency. The selective emitter technology divides the emitter into a non-metal contact area and a metal contact area, the doping concentration of the non-metal contact area is low, the recombination rate is reduced, the doping concentration of the metal contact area is high, and the contact resistance of the electrode is reduced. That is, selective emitter technology can only reduce the recombination rate of non-metal contact regions, but cannot reduce the recombination rate of metal contact regions. Therefore, the object of the present invention is to reduce the recombination rate of the metal contact area while reducing the recombination rate of the non-metal contact area.

Chinese utility model patent ZL201721093521.1 discloses a scheme that adopts passivation contact structure to reduce positive surface recombination rate, and it is high although can solve the problem of metal contact area recombination rate, nevertheless there is comparatively serious parasitic absorption in the polycrystalline silicon layer of non-metal contact area, influences the short circuit current density and the conversion efficiency of battery.

The prior art (selective emitter technology) can reduce the recombination rate of the non-metal contact area, but cannot reduce the recombination rate of the metal contact area, and the overall recombination rate of the front surface of the battery is influenced.

SUMMERY OF THE UTILITY MODEL

To the above technical problem, the utility model aims at providing a crystal silicon solar cell of local passivation contact in front, it is when reducing non-metallic contact area composite rate, reduces the composite rate in metallic contact area, and the whole composite rate on battery positive surface further reduces, and battery conversion efficiency is higher.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

a crystalline silicon solar cell with a front surface in local passivation contact comprises a front surface electrode, a front passivation layer, an N-type silicon doping layer, a P-type silicon substrate layer, a back passivation layer and a back surface electrode, wherein the back passivation layer is formed on the back surface of the P-type silicon substrate layer, the back surface electrode is formed on the back passivation layer and partially penetrates through the back passivation layer to form ohmic contact with the P-type silicon substrate layer, the N-type silicon doping layer is formed on the front surface of the P-type silicon substrate layer, and the N-type silicon doping layer is formed on the front surface of the P-type siliconA patterned silicon oxide thin layer is formed on the silicon doping layer, and N is formed on the silicon oxide thin layer in a covering manner⁺The front surface of the P-type silicon substrate layer is a textured surface which is formed by texturing, and the N-type silicon doping layer, the silicon oxide thin layer and the N are arranged on the front surface of the P-type silicon substrate layer⁺The polysilicon layers have concave-convex upper surfaces, and the front passivation layer is laminated on the N⁺The front electrode penetrates through the front passivation layer and is formed on the N-type silicon doping layer⁺On the upper surface of the type polysilicon layer, and the N⁺The type polysilicon layer forms an ohmic contact.

Preferably, the N-type silicon doped layer and the N⁺The type polycrystalline silicon layers are all doped with phosphorus elements.

More preferably, the doping concentration of the phosphorus element in the N-type silicon doping layer is less than that of the N⁺And the doping concentration of phosphorus element in the polycrystalline silicon layer.

Preferably, the thickness of the N + type polycrystalline silicon layer is 10-200 nm.

Preferably, the thickness of the silicon oxide thin layer is 0.1-2 nm.

Preferably, the back passivation layer is provided with a groove, and the P-type silicon substrate layer has a P corresponding to the groove⁺A type silicon portion, a part of the back electrode passing through the groove and contacting the P⁺The type silicon portion forms an ohmic contact.

The utility model adopts the above scheme, compare prior art and have following advantage:

the utility model discloses an among the crystal silicon solar cell of local passivation contact in front, N type silicon doping concentration at non-metal contact area is lower, can reduce the compound rate of non-metal contact area, simultaneously at metal contact area through introducing the passivation contact structure of constituteing by silicon oxide thin layer and doping polycrystalline silicon, can reduce the compound rate of metal contact area. Because the N-type silicon of the non-metal contact region extends to the metal contact region, carriers separated in the non-metal contact region can be transported to the metal contact region and then collected and converted into electric energy, the carrier collection efficiency is high, and the battery conversion efficiency is high.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a crystalline silicon solar cell.

Wherein the content of the first and second substances,

1. a front electrode; 2. n is a radical of⁺A type polycrystalline silicon layer; 3. a thin layer of silicon oxide; 4. a front passivation layer; 5. an N-type silicon doped layer; 6. a P-type silicon substrate; 7. p⁺A type silicon site; 8. a back passivation layer; 9. and a back electrode.

Detailed Description

The following detailed description of the preferred embodiments of the invention, taken in conjunction with the accompanying drawings, enables the advantages and features of the invention to be more readily understood by those skilled in the art. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. Furthermore, the technical features mentioned in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

The embodiment provides a crystalline silicon solar cell with a front surface local passivation contact, which is a PERC cell. Referring to fig. 1, the crystalline silicon solar cell includes front electrodes 1, N⁺The solar cell comprises a type polycrystalline silicon layer 2, a silicon oxide thin layer 3, a front passivation layer 4, an N-type silicon doping layer 5, a P-type silicon substrate layer 6, a back passivation layer 8 and a back electrode 9. Wherein the P-type silicon substrate layer 6 is a boron-doped or gallium-doped P-type silicon substrate. The N-type silicon doping layer 5 is doped with phosphorus with low phosphorus doping concentration, is formed on the front surface of the P-type silicon substrate layer 6 and forms a PN junction with the P-type silicon substrate. Thin layer of silicon oxide 3 and N⁺The polysilicon layer 2 is a patterned layered structure, and the patterns of the polysilicon layer and the polysilicon layer are consistentAnd the two are laminated to form a passivation contact structure; a thin layer of silicon oxide 3 is formed on a portion of the upper surface of the N-type silicon doped layer 5, N⁺The type polycrystalline silicon layer 2 covers the upper surface of the formed silicon oxide thin layer 3. A front passivation layer 4 is laminated on N⁺On the type polycrystalline silicon layer 2 and on the other upper surface of the N-type doped silicon layer 5 not covered by the thin silicon oxide layer 3. The front electrode 1 is also patterned and its pattern and N⁺The pattern of the polysilicon layer 2 is identical or similar, and the front electrode 1 is positioned at N⁺ A polysilicon layer 2 formed on the front surface of the substrate and penetrating the front passivation layer 4⁺On the upper surface of the type polycrystalline silicon layer 2, thereby adding N⁺The type polycrystalline silicon layer 2 forms an ohmic contact. A back passivation layer 8 is formed on the back of the P-type silicon substrate layer 6, and a back electrode 9 is formed on the back passivation layer 8 and partially penetrates through the back passivation layer 8 to form ohmic contact with the P-type silicon substrate layer 6.

Specifically, the front surface of the P-type silicon substrate layer 6 is a textured surface formed by texturing, and correspondingly, the N-type silicon doping layer 5, the silicon oxide thin layer 3 and the N are sequentially stacked on the textured surface⁺The polysilicon layer 2 also has a corresponding rugged upper surface, the front electrode 1 and N⁺The contact area of the polysilicon layer 2 is also the rugged surface.

The N-type silicon doped layer 5 and N⁺The type polysilicon layers 2 are all doped with phosphorus elements, and the doping concentration of the phosphorus elements in the N type silicon doping layer 5 is less than that of N⁺The doping concentration of phosphorus element in the type polysilicon layer 2. N is a radical of⁺The thickness of the polycrystalline silicon layer 2 is 10-200 nm. The thickness of the thin silicon oxide layer 3 is 0.1 to 2 nm.

The back passivation layer 8 is provided with a groove, and the P-type silicon substrate layer 6 is provided with a P corresponding to the groove⁺The silicon portion 7, the back electrode 9 partially passing through the groove and being combined with P⁺ Type silicon sites 7 form ohmic contacts. Specifically, laser grooving is carried out on the passivation layer 8 on the back until the P-type silicon substrate 6 is exposed, then metal slurry is printed on the back of the silicon wafer, part of the slurry enters the groove and forms ohmic contact with the P-type silicon substrate 6 after sintering, and the contact position is the P⁺And a type silicon site 7.

In the present embodiment, the first and second electrodes are,the front electrode 1 may be a silver electrode; the front passivation layer 4 can be a silicon nitride layer, and plays a role of passivation and antireflection; p⁺The type silicon part 7 is positioned on the back surface of the P type silicon substrate layer 6 and is called a local back surface field; the back passivation layer 8 may be an aluminum oxide/silicon nitride stack; the back electrode 9, which may be aluminum, covers the back passivation layer 8 and partially enters the grooves of the back passivation layer 8.

As shown in fig. 1, the N-type silicon doping concentration in the non-metal contact region (the region not in contact with the front electrode) is low, which can reduce the recombination rate of the non-metal contact region. The recombination rate of the metal contact region can be reduced by introducing a passivation contact structure (a thin silicon oxide layer and doped polysilicon) in the metal contact region. Because the N-type silicon of the non-metal contact region extends to the metal contact region, carriers separated in the non-metal contact region can be transported to the metal contact region and then collected and converted into electric energy, namely the carrier collection efficiency is high.

The embodiment also provides a preparation method of the crystalline silicon solar cell with the front surface locally passivated contact, which sequentially comprises the following steps:

A. texturing is carried out on the P-type silicon wafer;

B. carrying out phosphorus doping on the front surface of the P-type silicon wafer to form an N-type silicon doping layer;

C. growing a silicon oxide thin layer on the N-type silicon doped layer, and forming N on the silicon oxide thin layer⁺A type polycrystalline silicon layer;

D. in N⁺Depositing a graphical mask on the type polycrystalline silicon layer;

E. removing N outside the mask region⁺A type polycrystalline silicon layer;

F. removing the silicon oxide thin layer and the graphical mask;

G. depositing a back passivation film on the back of the silicon wafer, and depositing a front passivation film on the front;

H. slotting the back of the silicon wafer to expose the P-type silicon substrate;

I. and respectively printing slurry on the back and the front of the silicon wafer, and sintering.

And in the step A, cleaning the P-type silicon wafer, and then texturing the surface to form a pyramid structure to obtain a concave-convex textured surface.

And in the step B, phosphorus is doped on the front surface of the silicon wafer, and the method can be diffusion or ion implantation to form N-type silicon with lower doping concentration. Wherein if a diffusion method is used, the phosphosilicate glass generated by the diffusion is removed with hydrofluoric acid.

In the step C, a silicon oxide thin layer grows on the front surface of the silicon wafer, the thickness is 0.1-2 nm, and the method can be thermal oxidation or wet chemical oxidation. Depositing higher phosphorus-doped N on silicon oxide thin layer⁺The thickness of the polycrystalline silicon is 10-200 nm. The method can be LPCVD in-situ doping; or depositing a polysilicon layer by LPCVD and doping by diffusion or ion implantation. Wherein if a diffusion method is used, the phosphosilicate glass generated by the diffusion needs to be removed with hydrofluoric acid.

In the step D, a patterned mask is deposited on the front surface of the silicon wafer, the mask material is a material that does not react with alkali, silicon nitride is preferred in this embodiment, and the method may be screen printing or PECVD with a mask.

In the step E, N except the mask area is etched by using alkali solution⁺And (3) molding the polycrystalline silicon, and etching the edge of the silicon wafer and polishing the back of the silicon wafer by adopting a mixed solution of nitric acid and hydrofluoric acid.

And in the step F, removing the silicon oxide thin layer and the patterned mask. In this embodiment, the mask material is silicon nitride, and is therefore soaked in hydrofluoric acid.

And G, depositing a passivation layer on the back surface of the silicon wafer, wherein the passivation layer can be an aluminum oxide/silicon nitride laminated layer. The front side is deposited with a passivation layer, which may be silicon nitride.

And H, performing laser hole opening on the passivation layer on the back of the silicon wafer to expose the P-type silicon substrate.

In the step I, the back of the silicon wafer is screen-printed with metallization slurry, which can be aluminum slurry; screen printing metallization slurry, which can be silver paste, on the front surface of the silicon wafer; and sintering to complete metallization. During sintering, the aluminum paste and silicon are fused to form a local back surface field, i.e. the P⁺A type silicon site. The pattern of the front electrode is the same as the pattern of the previous mask.

The true bookIn the new type, a thin layer of silicon oxide and N are used⁺The passivation contact structure composed of the polycrystalline silicon solves the problem of high recombination rate of the metal contact area on the front surface of the crystalline silicon solar cell. The N-type silicon with the lower doping concentration of the non-metal contact area extends to the metal contact area, so that carriers separated by the non-metal contact area can be transported to the metal contact area, and the carrier collection efficiency is improved.

The above embodiments are only for illustrating the technical concept and features of the present invention, and are preferred embodiments, which are intended to enable persons skilled in the art to understand the contents of the present invention and to implement the present invention, and thus, the protection scope of the present invention cannot be limited thereby. All equivalent changes or modifications made according to the principles of the present invention are intended to be covered by the scope of the present invention.

Claims (4)

1. The utility model provides a crystal silicon solar cell of front local passivation contact, includes front electrode, front passivation layer, N type silicon doping layer, P type silicon substrate layer, back passivation layer and back electrode, the back passivation layer is formed at P type silicon substrate layer back, the back electrode is formed on the back passivation layer and local pass through the back passivation layer and form ohmic contact with P type silicon substrate layer, N type silicon doping layer forms in the front of P type silicon substrate layer its characterized in that: a patterned silicon oxide thin layer is formed on the N-type silicon doping layer, and N is formed on the silicon oxide thin layer in a covering mode⁺The front surface of the P-type silicon substrate layer is a textured surface which is formed by texturing, and the N-type silicon doping layer, the silicon oxide thin layer and the N are arranged on the front surface of the P-type silicon substrate layer⁺The polysilicon layers have concave-convex upper surfaces, and the front passivation layer is laminated on the N⁺The front electrode penetrates through the front passivation layer and is formed on the N-type silicon doping layer⁺On the upper surface of the type polysilicon layer, and the N⁺The type polysilicon layer forms an ohmic contact.

2. The method of claim 1Crystalline silicon solar cell, its characterized in that: said N is⁺The thickness of the polysilicon layer is 10-200 nm.

3. The crystalline silicon solar cell of claim 1, wherein: the thickness of the silicon oxide thin layer is 0.1-2 nm.

4. The crystalline silicon solar cell of claim 1, wherein: the back passivation layer is provided with a groove, and the P-type silicon substrate layer is provided with a P corresponding to the groove⁺A type silicon portion, a part of the back electrode passing through the groove and contacting the P⁺The type silicon portion forms an ohmic contact.

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