CN115172477B - Solar cell and photovoltaic module - Google Patents
Solar cell and photovoltaic module Download PDFInfo
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- CN115172477B CN115172477B CN202210887189.5A CN202210887189A CN115172477B CN 115172477 B CN115172477 B CN 115172477B CN 202210887189 A CN202210887189 A CN 202210887189A CN 115172477 B CN115172477 B CN 115172477B
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- 239000000758 substrate Substances 0.000 claims abstract description 170
- 230000005641 tunneling Effects 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims description 38
- 239000002313 adhesive film Substances 0.000 claims description 10
- 238000004806 packaging method and process Methods 0.000 claims description 10
- 238000006243 chemical reaction Methods 0.000 abstract description 22
- 230000009286 beneficial effect Effects 0.000 abstract description 10
- 239000010410 layer Substances 0.000 description 185
- 210000004027 cell Anatomy 0.000 description 86
- 238000002161 passivation Methods 0.000 description 38
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 23
- 229910052814 silicon oxide Inorganic materials 0.000 description 22
- 238000009792 diffusion process Methods 0.000 description 18
- 230000006798 recombination Effects 0.000 description 18
- 238000005215 recombination Methods 0.000 description 18
- 230000008569 process Effects 0.000 description 17
- 239000000969 carrier Substances 0.000 description 16
- 239000000463 material Substances 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 230000003287 optical effect Effects 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 230000000694 effects Effects 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 230000003647 oxidation Effects 0.000 description 6
- 238000007254 oxidation reaction Methods 0.000 description 6
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- 239000000243 solution Substances 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 4
- 239000005380 borophosphosilicate glass Substances 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 4
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 4
- 239000005360 phosphosilicate glass Substances 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 238000006388 chemical passivation reaction Methods 0.000 description 3
- 238000005538 encapsulation Methods 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 230000000149 penetrating effect Effects 0.000 description 3
- 238000002310 reflectometry Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- MARUHZGHZWCEQU-UHFFFAOYSA-N 5-phenyl-2h-tetrazole Chemical compound C1=CC=CC=C1C1=NNN=N1 MARUHZGHZWCEQU-UHFFFAOYSA-N 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910000676 Si alloy Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 239000003929 acidic solution Substances 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- UIPVMGDJUWUZEI-UHFFFAOYSA-N copper;selanylideneindium Chemical compound [Cu].[In]=[Se] UIPVMGDJUWUZEI-UHFFFAOYSA-N 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000005527 interface trap Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000001272 nitrous oxide Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000009279 wet oxidation reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Sustainable Development (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Life Sciences & Earth Sciences (AREA)
- Power Engineering (AREA)
- Sustainable Energy (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Photovoltaic Devices (AREA)
Abstract
The embodiment of the application relates to the field of photovoltaics, and provides a solar cell and a photovoltaic module, wherein the solar cell comprises: the substrate is provided with a front surface and a back surface which are opposite, the back surface of the substrate is provided with a first doped region, and the doping element type of the first doped region is opposite to the doping element type in the substrate; the tunneling dielectric layer is positioned on the back surface of the substrate; the doped conductive layer is positioned on the surface of the tunneling dielectric layer, which is far away from the back surface of the substrate, and is provided with doped elements, and the types of the doped elements in the doped conductive layer are opposite to those of the doped elements in the substrate; the back electrodes are arranged along the first direction and are contacted with the doped conductive layer. The solar cell and the photovoltaic module provided by the embodiment of the application are at least beneficial to improving the photoelectric conversion efficiency of the solar cell.
Description
Technical Field
The embodiment of the application relates to the field of photovoltaics, in particular to a solar cell and a photovoltaic module.
Background
Reasons for affecting the performance of solar cells (e.g., photoelectric conversion efficiency) include optical losses including cell surface reflection losses, shadow losses of contact grids, and long-band non-absorption losses, etc., as well as electrical losses including losses of photo-generated carrier recombination on and in semiconductor surfaces and bodies, contact resistance of semiconductors and metal grids, and contact resistance of metals and semiconductors, etc.
In order to reduce the electrical loss of the solar cell, a tunnel oxide passivation metal contact structure may be formed on the surface of the cell. The tunneling oxide passivation metal contact structure consists of an ultrathin tunneling dielectric layer and a doped conductive layer, and can provide good surface passivation, so that metal contact composite current is reduced, and open-circuit voltage and short-circuit current of the battery are improved. The tunneling oxide layer passivation metal contact structure can optimize the performance of the solar cell, but factors influencing the performance of the solar cell are still more, and the development of the efficient passivation contact solar cell has important significance.
Disclosure of Invention
The embodiment of the application provides a solar cell and a photovoltaic module, which are at least beneficial to improving the photoelectric conversion efficiency of the solar cell.
According to some embodiments of the present application, an aspect of an embodiment of the present application provides a solar cell, including: the substrate is provided with a front surface and a back surface which are opposite, the back surface of the substrate is provided with a first doped region, and the doping element type of the first doped region is opposite to the doping element type in the substrate; the tunneling dielectric layer is positioned on the back surface of the substrate; the doped conductive layer is positioned on the surface of the tunneling dielectric layer, which is far away from the back surface of the substrate, and is provided with doped elements, and the types of the doped elements in the doped conductive layer are opposite to those of the doped elements in the substrate; the back electrodes are arranged along the first direction and are contacted with the doped conductive layer.
In some embodiments, the doping element type of the first doping region is the same as the doping element type in the doped conductive layer, and the doping concentration of the first doping region is less than or equal to the doping concentration of the doped conductive layer.
In some embodiments, the first doped region has a doping concentration of 1×10 or less 20 cm -3 。
In some embodiments, a ratio of a doping depth of the first doped region to a thickness of the substrate is less than or equal to 0.2%.
In some embodiments, the first doped region has a doping depth of 1nm to 200nm.
In some embodiments, the doped conductive layer has a second doped region extending through the thickness of the doped conductive layer, the second doped region having a doping concentration greater than the doping concentration of the doped conductive layer other than the second doped region, the back electrode being in contact with the doped conductive layer of the second doped region; the second doped region is opposite to the first doped region.
In some embodiments, the doping concentration of the second doped region is greater than or equal to the doping concentration of the first doped region.
In some embodiments, the tunneling dielectric layer has a third doped region penetrating through the thickness of the tunneling dielectric layer, the third doped region is respectively in contact with the first doped region and the second doped region, and the first doped region, the second doped region and the third doped region are aligned and the doping elements are the same type.
In some embodiments, the doping element type of the substrate is a P-type doping element and the doping element type of the doped conductive layer is an N-type doping element.
In some embodiments, the front side of the substrate has a heavily doped region having a doping element type that is the same as the doping element type of the substrate, the heavily doped region having a doping concentration that is greater than the doping concentration of the substrate other than the heavily doped region; the solar cell further includes: and the electrode is contacted with the substrate of the heavily doped region.
In some embodiments, the width of the heavily doped region is greater than or equal to the width of the contact surface of the electrode and the substrate along the first direction; the ratio of the width of the heavily doped region to the width of the contact surface of the electrode and the substrate is 100% -200%.
In some embodiments, the heavily doped region has a doping concentration of 7×10 18 cm -3 ~2×10 19 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The doping depth of the heavily doped region is 0.8 μm to 1.6 μm.
According to some embodiments of the present application, another aspect of the embodiments of the present application further provides a photovoltaic module, including: a cell string formed by connecting a plurality of solar cells according to any one of the above embodiments; the packaging adhesive film is used for covering the surface of the battery string; and the cover plate is used for covering the surface of the packaging adhesive film, which is away from the battery strings.
The technical scheme provided by the embodiment of the application has at least the following advantages:
In the technical scheme provided by the embodiment of the application, the tunneling dielectric layer and the doped conductive layer are formed on the back surface of the substrate, and the doping element type of the doped conductive layer is opposite to the doping element type of the substrate, so that a PN junction is formed between the doped conductive layer and the substrate, namely the solar cell is a back junction solar cell, and the tunneling dielectric layer and the doped conductive layer are combined to form a passivation contact structure. The doped conductive layer can cover the whole back of the substrate, the PN junction formed between the substrate and the doped conductive layer can cover the whole back of the battery, the maximum utilization of incident light can be ensured, the short-circuit current and open-circuit voltage of the battery can be improved, the width of the back electrode can be optimized, the series resistance of the battery can be reduced, and the back junction solar battery can optimize the front light trapping structure, so that the lower front surface recombination rate and the lower reflectivity can be obtained. The passivation contact structure can reduce the surface carrier recombination rate of the substrate and improve the photoelectric conversion efficiency of the solar cell.
In addition, the back of the substrate is provided with a first doped region, the doping element type of the first doped region is the same as that of the doped conductive layer, an emitter can be formed on the back of the substrate, carriers (electrons and holes) can be separated in the first doped region, and the output current of the solar cell can be improved. And a first doped region is formed on the back surface, so that a path for carriers generated on the front surface of the substrate to migrate to the PN junction on the back surface is shortened, and the risk of recombination before minority carriers reach the doped conductive layer is reduced.
Drawings
One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, which are not to be construed as limiting the embodiments unless specifically indicated otherwise; in order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the drawings required for the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art.
Fig. 1 is a schematic structural diagram of a solar cell according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a solar cell according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a photovoltaic module according to an embodiment of the present application;
fig. 4 is a schematic cross-sectional structure corresponding to a step of providing a substrate in a method for manufacturing a solar cell according to an embodiment of the application;
fig. 5 is a schematic cross-sectional structure diagram corresponding to a step of forming a silicon oxide layer in a method for manufacturing a solar cell according to an embodiment of the application;
Fig. 6 is a schematic cross-sectional structure diagram corresponding to a step of forming a groove in a method for manufacturing a solar cell according to an embodiment of the application;
fig. 7 is a schematic cross-sectional structure diagram corresponding to a step of forming a heavily doped region in a method for manufacturing a solar cell according to an embodiment of the present application;
fig. 8 is a schematic cross-sectional structure diagram corresponding to a step of forming a tunneling dielectric film in a method for manufacturing a solar cell according to an embodiment of the present application;
fig. 9 is a schematic cross-sectional structure diagram corresponding to a step of forming a first doped region in a method for manufacturing a solar cell according to an embodiment of the present application;
fig. 10 is a schematic cross-sectional view illustrating a step of forming a first doped region in a method for manufacturing a solar cell according to an embodiment of the present application;
fig. 11 is a schematic cross-sectional structure corresponding to a step of forming a passivation layer in a method for manufacturing a solar cell according to an embodiment of the application.
Detailed Description
As known from the background art, the photoelectric conversion efficiency of the solar cell in the prior art is poor.
Analysis finds that one of the reasons for the poor photoelectric conversion efficiency of the solar cell is that when the substrate is a P-type substrate, a front side B diffusion process is generally adopted to prepare a front side emitter, so that a PN junction is formed on the front side of the solar cell, and then high-concentration B diffusion leads to serious carrier recombination on the front surface of the cell; the adoption of the local high-concentration B diffusion in the front metal contact area and the low-concentration B diffusion in the non-contact area can also lead to the reduction of the effective PN junction area of the solar cell, so that the short-circuit current of the cell is reduced, and the photoelectric conversion efficiency of the solar cell is poor.
The embodiment of the application provides a solar cell and a photovoltaic module, wherein a tunneling dielectric layer and a doped conductive layer are formed on the back surface of a substrate, and the doping element type of the doped conductive layer is opposite to the doping element type of the substrate, so that a PN junction is formed between the doped conductive layer and the substrate. The doped conductive layer can cover the whole back of the substrate, the PN junction formed between the substrate and the doped conductive layer can cover the whole back of the battery, the maximum utilization of incident light can be ensured, the short-circuit current and open-circuit voltage of the battery can be improved, the width of the back electrode can be optimized, the series resistance of the battery can be reduced, and the back junction solar battery can optimize the front light trapping structure, so that the lower front surface recombination rate and the lower reflectivity can be obtained. The passivation contact structure can reduce the surface carrier recombination rate of the substrate and improve the photoelectric conversion efficiency of the solar cell.
Embodiments of the present application will be described in detail below with reference to the attached drawings. However, it will be understood by those of ordinary skill in the art that in various embodiments of the present application, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, the claimed technical solution of the present application can be realized without these technical details and various changes and modifications based on the following embodiments.
Fig. 1 is a schematic structural diagram of a solar cell according to an embodiment of the present application; fig. 2 is a schematic structural diagram of a solar cell according to an embodiment of the application.
According to some embodiments of the present application, an aspect of the embodiments of the present application provides a solar cell, referring to fig. 1 to 2, the solar cell includes: a substrate 100, the substrate 100 having a front side 101 and a back side 102 opposite to each other, the back side 102 of the substrate 100 having a first doped region 110, the first doped region 110 having a doping element of a type opposite to a doping element type within the substrate; a tunneling dielectric layer 120, where the tunneling dielectric layer 120 is located on the back surface 102 of the substrate 100; the doped conductive layer 130, the doped conductive layer 130 is located on the surface of the tunneling dielectric layer 120 far away from the back surface 102 of the substrate 100, the doped conductive layer 130 has doping elements, and the doping element type in the doped conductive layer 130 is opposite to the doping element type in the substrate 100; the back electrodes 141, the back electrodes 141 are arranged along the first direction X, and the back electrodes 141 are in contact with the doped conductive layer 130.
In some embodiments, the solar cell is a tunnel oxide passivation contact cell (Tunnel Oxide Passivated Contact, TOPCon) that may include a double-sided tunnel oxide passivation contact cell or a single-sided tunnel oxide passivation contact cell.
The substrate 100 is a region that absorbs incident photons to generate photogenerated carriers. In some embodiments, the substrate 100 is a silicon substrate 100, which may include one or more of monocrystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon; in other embodiments, the material of the substrate 100 may also be silicon carbide, an organic material, or a multi-component compound. The multi-component compounds may include, but are not limited to, perovskite, gallium arsenide, cadmium telluride, copper indium selenium, and the like. Illustratively, the substrate 100 of the present application is a monocrystalline silicon substrate.
In some embodiments, for a single-sided cell, the front side 101 of the substrate 100 is the light-receiving side and the back side 102 of the substrate 100 is the backlight side; for a double sided cell, both the front side 101 and the back side 102 may act as light receiving surfaces to absorb incident light. The substrate 100 has a doping element therein, the doping element being of an N-type or a P-type, the N-type element being a group v element such As a phosphorus (P) element, a bismuth (Bi) element, an antimony (Sb) element, or an arsenic (As) element, and the P-type element being a group iii element such As a boron (B) element, an aluminum (Al) element, a gallium (Ga) element, or an indium (In) element. For example, when the substrate 100 is a P-type substrate, the internal doping element type is P-type. For another example, when the substrate 100 is an N-type substrate, the internal doping element type is N-type. The embodiment of the present application takes the substrate 100 as a P-type substrate as an example.
In some embodiments, the doping element type of the first doping region 110 is the same as the doping element type in the doped conductive layer 130, and the doping concentration of the first doping region 110 is less than or equal to the doping concentration of the doped conductive layer 130. For example, the doping element type of the substrate 100 is P-type doping element, the doping element type of the doped conductive layer is N-type doping element, and the doping element type of the first doping region 110 is N-type doping element. In this way, the PN junction is formed between the substrate 100 and the doped conductive layer 130, and the PN junction is formed on the back surface 102, so that optical loss caused by forming a highly doped emitter on the front surface can be avoided, and electrical loss caused by forming a low doped emitter can be avoided, which is beneficial to improving the photoelectric conversion efficiency of the solar cell. When the doping concentration of the first doped region 110 is smaller than that of the doped conductive layer 130, a high-low junction is formed between the first doped region 110 and the doped conductive layer 130, so that a built-in electric field is formed between the first doped region 110 and the doped conductive layer 130, positive space charges are formed on the surface of the doped conductive layer 130 with higher doping, negative space charges are formed on the surface of the first doped region 110 with lower doping, so that P-type doping elements in the substrate easily drift to the doped conductive layer 130 with higher doping, and the output current of the battery is facilitated to be improved. The doping concentration of the first doped region 110 is 1×10 or less 20 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The doping concentration of the doped conductive layer 130 is 1×10 20 cm -3 ~1×10 21 cm -3 . Further, the doping concentration of the first doped region 110 is 0cm -3 ~1×10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The doping concentration of the doped conductive layer 130 is 2×10 20 cm -3 ~1×10 21 cm -3 . The doping concentration of the first doped region 110 may be specifically 5×10 16 cm -3 、1.8×10 17 cm -3 、6.3×10 17 cm -3 Or 9.3X10 17 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The doping concentration of the doped conductive layer 130 may be 3.8x10 20 cm -3 、5.3×10 20 cm -3 、7.8×10 20 cm -3 Or 9.8X10 20 cm -3 . In other embodiments, the doping concentration of the first doped region 110 is greater than that of the doped conductive layer 130, a PN junction is formed between the first doped region 110 and the substrate 100, and the surface of the first doped region may be a pyramid suede, so as to reduce reflection of light from the surface of the first doped region, increase absorption and utilization rate of light, and improve conversion efficiency of the solar cell.
In some embodiments, the ratio of the doping depth of the first doped region 110 to the thickness of the substrate 100 is less than or equal to 0.2%, and the doping depth of the first doped region 110 may satisfy the strength of the infield electric field forming the high-low junction, so that minority carriers drift to the surface of the doped conductive layer 130. The doping depth of the first doped region 110 may reduce the thickness of the P-type substrate except the first doped region, and shorten the path for carriers generated on the front surface 101 of the substrate 100 to drift to the back surface PN junction, which is beneficial to reducing the risk of recombination of minority carriers before reaching the doped conductive layer. The doping depth of the first doped region 110 is less than 0.002 times the thickness of the substrate 100, so that the doped elements in the first doped region 110 can be prevented from diffusing into the front surface 101 of the substrate 100 or the heavily doped region, which is beneficial to improving the open circuit voltage of the solar cell and the photoelectric conversion efficiency of the solar cell. It is understood that the ratio of the doping depth of the first doped region 110 to the thickness of the substrate 100 may be specifically set according to the thickness of the substrate 100, and the embodiment of the present application is 0.2% or less is merely an example.
The doping depth of the first doped region 110 is 1nm to 200nm, and optionally, the doping depth of the first doped region 110 is 1nm to 150nm. The doping depth of the first doped region 110 is in particular 1nm, 29nm, 68nm, 128nm or 143nm.
In some embodiments, tunneling dielectric layer 120 reduces interface state density between substrate 100 and doped conductive layer 130 by chemical passivation, reducing minority carrier recombination with holes, facilitating reduced Jo load current; the tunneling dielectric layer 120 can make majority carriers tunnel into the doped conductive layer 130, so that majority carriers are laterally transferred in the doped conductive layer 130 and collected by the back electrode 141, thereby greatly reducing contact recombination current between the back electrode 141 and the doped conductive layer 130 and improving open-circuit voltage and short-circuit current of the solar cell.
In some embodiments, the material of the tunneling dielectric layer 120 may include, but is not limited to, dielectric materials with tunneling effect such as silicon oxide, silicon nitride, silicon oxynitride, intrinsic amorphous silicon, and intrinsic polysilicon. The thickness of the tunneling dielectric layer 120 may be 0.5nm to 3nm, alternatively, the thickness of the tunneling dielectric layer 120 is 0.5nm to 2nm, and further, the thickness of the tunneling dielectric layer 120 is 0.5nm to 1.5nm. The thickness of the tunneling dielectric layer 120 is 0.5nm, 0.9nm, 1.25nm, or 1.5nm.
The material of the doped conductive layer 130 may be at least one of a polycrystalline semiconductor, an amorphous semiconductor, or a microcrystalline semiconductor, and preferably, the material of the doped conductive layer includes at least one of polycrystalline silicon, amorphous silicon, or microcrystalline silicon. The thickness range of the doped conductive layer 130 is 40 nm-150 nm, optionally, the thickness range of the doped conductive layer 130 is 60 nm-90 nm, the thickness range of the doped conductive layer 130 can ensure that the optical loss of the doped conductive layer 130 is smaller and the interface passivation effect of the tunneling dielectric layer 120 is better, thereby improving the battery efficiency. Illustratively, the material of the doped conductive layer 130 in the present application is polysilicon, and the thickness of the doped conductive layer 130 is 80nm.
In some embodiments, referring to fig. 2, the doped conductive layer 130 has a second doped region 131 penetrating the thickness of the doped conductive layer 130, the doped concentration of the second doped region 131 is greater than the doped concentration of the doped conductive layer 130 except for the second doped region 131, and the back electrode 141 is in contact with the doped conductive layer 130 of the second doped region 131; the second doped region 131 is opposite to the first doped region 110. The doping concentration of the second doping region 131 is equal to or greater than the doping concentration of the first doping region 110. A local heavily doped region (second doped region 131) is formed for the region opposite to the back electrode 141, and the high doping of the contact interface between the back electrode 141 and the doped conductive layer 130 breaks the rectification characteristic caused by the schottky barrier of the doped conductive layer 130, which is beneficial to reducing the contact resistance between the back electrode 141 and the doped conductive layer 130. The lower doping concentration for the non-opposite region of the back electrode 141 can reduce optical loss due to the excessively high doping element concentration, thereby improving the cell efficiency.
In some embodiments, the tunneling dielectric layer 120 has a third doped region 121 penetrating through the thickness of the tunneling dielectric layer 120, the third doped region 121 is respectively contacted with the first doped region 110 and the second doped region 131, and the first doped region 110, the second doped region 131 are aligned with the third doped region 121 and the doping elements are the same type.
In some embodiments, the ratio of the total surface area of the first doped regions 110 to the surface area of the doped conductive layer 130 ranges from 1% to 20%, alternatively, the ratio of the total orthographic projection area of all the first doped regions 110 on the substrate 100 to the orthographic projection area of the doped conductive layer 130 on the substrate 100 ranges from 1% to 20%, specifically may be 5%, 3%, 10%, 15% or 20%, and this ratio range may avoid the situation that the optical absorption of the solar cell is too large due to the too large area of the first doped regions 110, which is beneficial to improving the photoelectric conversion efficiency of the solar cell; meanwhile, the situation that the square resistance of the doped conductive layer of the first doped region 110 is larger and the contact area with the back electrode 141 is small due to the fact that the area of the first doped region 110 is too small can be avoided, the resistance of the contact resistance of the doped first doped region 110 and the back electrode 141 is reduced, and therefore the conductivity of current and the photoelectric conversion efficiency of the solar cell are improved.
In some embodiments, referring to fig. 2, the width of the first doped region 110 along the first direction X is 20 μm to 100 μm, and may specifically be 20 μm, 40 μm, 58 μm, 82 μm, or 100 μm. The spacing between adjacent first doped regions 110 along the first direction X may range from 0.8mm to 4mm, and may specifically be 0.8mm, 1.5mm, 2.8mm, 3.6mm, or 4mm. The width of the first doped region 110 and the range of the distance between adjacent first doped regions 110 may further define a ratio of the total orthographic projection area of the first doped region 110 on the substrate 100 to the orthographic projection area of the doped conductive layer 130 on the substrate 100 in a range of 1% -20%.
In some embodiments, the first doped regions 110 under different back electrodes 141 are disposed at equal intervals, so that the current collection of each first doped region 110 is more uniform. Optionally, the first doped regions 110 under the same back electrode 141 are disposed at equal intervals, so that current collection of the first doped regions 110 is more uniform.
It is understood that the doping concentration of the first doped region 110 may be the same throughout the first doped region 110, or the first doped region 110 may be distributed stepwise or in a gradient toward the second doped region 131, with the doping concentration being greater closer to the back electrode 141. The doping concentration of the second doping region 131 may be the same throughout the second doping region 131, or the second doping region 131 may be distributed stepwise or in a gradient in a direction toward the back electrode 141, with the doping concentration being greater closer to the back electrode 141. The doping concentration of the third doping region 121 may be the same throughout the third doping region 121, or the first doping region 110 may be stepwise or gradient-distributed toward the second doping region 131, with the doping concentration being greater closer to the second doping region 131.
In some embodiments, referring to fig. 1 or 2, the front surface of the substrate 100 has a heavily doped region 105, the doping element type of the heavily doped region 105 is the same as the doping element type of the substrate 100, and the doping concentration of the heavily doped region 105 is greater than the doping concentration of the substrate 100 except for the heavily doped region 105; the solar cell further includes: electrode 142, electrode 142 is in contact with substrate 100 of heavily doped region 105. The doping element type of the heavily doped region 105 is P-type doping element, and for the electrode 142, the region contacted by the electrode 142 is a heavily doped region, so that good ohmic contact is formed between the substrate 100 and the electrode 142, the contact recombination rate between the metal electrode and the substrate is reduced, and the photoelectric conversion efficiency of the battery is improved; for the front surface 101 of the substrate 100, the opposite region of the non-electrode 142 is not provided with a heavily doped region, so that defect recombination centers formed by high-concentration doped ions can be reduced, and optical loss is reduced; for the back surface 102 of the substrate 100, a high-low junction is formed between the heavily doped region 105 and the substrate 100, a negative space charge is formed at the interface of the heavily doped region 105, a positive space charge is formed at the front surface of the substrate 100, the substrate 100 and the heavily doped region 105 form a built-in electric field, and electron-hole pairs generated at the front surface 101 of the substrate 100 are accelerated to diffuse towards the PN junction direction of the back surface, so that the collection efficiency of photo-generated carriers is improved, the efficiency of the battery is improved, and the spectral response of a long-wave part is also improved. In other embodiments, the heavily doped region may be an aluminum-silicon alloy layer and an aluminum diffusion layer formed on the front side of the substrate from a paste of the printed electrode.
In some embodiments, the width of the heavily doped region 105 is greater than or equal to the width of the contact surface of the electrode 142 with the substrate 100 along the first direction X; the ratio of the width of the heavily doped region 105 to the width of the contact surface of the electrode 142 and the substrate 100 ranges from 100% to 200%, alternatively, the ratio of the width of the heavily doped region 105 to the width of the contact surface of the electrode 142 and the substrate 100 ranges from 100% to 150%, and may specifically be 100%, 123%, 144% or 150%. The contact area of the electrode 142 and the substrate 100 can be ensured to be a heavy doped area, so that the contact resistance is reduced, the optical radiation loss caused by high-concentration doping elements can be reduced, and the cell efficiency is improved. In one specific example, the width of heavily doped region 105 is equal to the width of the contact surface of electrode 142 with substrate 100.
In some embodiments, the heavily doped region 105 has a doping concentration of 7×10 18 cm -3 ~2×10 19 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The doping depth of the heavily doped region 105 is 0.8 μm to 1.6 μm. Optionally, the heavily doped region 105 has a doping concentration of 1×10 19 cm -3 ~2×10 19 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The doping depth of the heavily doped region 105 is 1 μm to 1.6 μm; the heavily doped region 105 has a doping concentration of 1.3X10 19 cm -3 、1.52×10 19 cm -3 Or 1.98X10 19 cm -3 The doping depth of heavily doped region 105 may be 1.18 μm, 1.23 μm, 1.39 μm, or 1.583 μm. The depth range of the heavily doped region 105 can avoid the tunneling effect caused by the high doping of the heavily doped region 105, i.e. the doping element of the heavily doped region 105 cannot diffuse to the surface of the substrate 100 contacted with the first doped region 110 or the first doped region 110, so that the open circuit voltage of the solar cell can be improved, and the photoelectric conversion efficiency of the solar cell can be improved.
In some embodiments, with continued reference to fig. 1 and 2, the solar cell further includes a rear passivation layer 109, the rear passivation layer 109 being located on a surface of the doped conductive layer 130, and the rear electrode 141 extending through the rear passivation layer 109 and contacting the doped conductive layer 130. The rear passivation layer 109 may reduce recombination of metal regions generated by the contact of the rear electrode 141 with the substrate 100, thereby improving battery efficiency. The rear passivation layer 109 may have a single-layer structure or a stacked-layer structure, and the material of the rear passivation layer 109 may be one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbonitride, titanium oxide, hafnium oxide, or aluminum oxide.
The back electrode 141 is a grid line of the solar cell for collecting and summarizing the current of the solar cell. The back electrode 141 may be sintered from a burn-through paste. The contact of the back electrode 141 with the doped conductive layer 130 may be a local contact or a full contact. The material of the back electrode 141 may be one or more of aluminum, silver, gold, nickel, molybdenum, or copper. In some cases, the back electrode 141 refers to a thin gate line or a finger gate line to distinguish from a main gate line or a bus bar.
In some embodiments, the solar cell further comprises: a silicon oxide layer 103 and a front passivation layer 108, the silicon oxide layer 103 being located on the front surface 101 of the substrate 100, the front passivation layer 108 being located on the surface of the silicon oxide layer 103. The silicon oxide layer 103 reduces the interface state density between the silicon substrate 100 and the silicon oxide layer 103 through chemical passivation, and increases the lifetime of minority carriers, so that the contact resistance between the passivation layer including the aluminum oxide layer and the silicon substrate can be reduced. The front passivation layer 108 may have a single-layer structure or a stacked structure, and the material of the front passivation layer 108 may be one or more of aluminum oxide, silicon nitride, silicon oxynitride, silicon oxycarbonitride, titanium oxide, hafnium oxide, or aluminum oxide. The front passivation layer 108 may be composed of an aluminum oxide layer having a relatively high negative fixed charge density Qf (Qf about 10 at the interface with the substrate 100 12 ~10 13 cm -2 ) An electric field having a negative polarity is formed on the surface of the substrate 100, and a good field effect passivation effect can be provided to the P-type surface by shielding minority carriers (minority carriers) and electrons of the same polarity on the P-type silicon surface. In addition, the alumina layer has very low interface state defect density (Dit) and good chemical passivation effect, and can be used as a high-efficiency hydrogen atom storage, and sufficient hydrogen atoms are provided in the subsequent heat treatment process, so that dangling bonds on the surface of the substrate 100 are saturated. The band gap of alumina is 6.4eV, and canA part of sunlight is allowed to pass through the rear passivation layer composed of the aluminum oxide layer to reach the surface of the substrate 100, and the photoelectric conversion efficiency of the solar cell is improved.
The electrode 142 may be sintered from a burn-through paste. The contact of electrode 142 with substrate 100 may be a localized contact (through heavily doped region 105) or a full contact. The material of the electrode 142 may be one or more of aluminum, silver, nickel, gold, molybdenum, or copper. In some cases, the electrode 142 refers to a thin gate line or finger gate line to distinguish from a main gate line or bus bar.
In the technical solution of the solar cell provided in the embodiment of the present application, the tunneling dielectric layer 120 and the doped conductive layer 130 are formed on the back surface 102 of the substrate 100, and the doping element type of the doped conductive layer 130 is opposite to the doping element type of the substrate 100, so that a PN junction is formed between the doped conductive layer 130 and the substrate 100, i.e., the solar cell is a back junction solar cell, and the tunneling dielectric layer 120 and the doped conductive layer 130 are combined to form a passivation contact structure. The doped conductive layer may cover the entire back surface 102 of the substrate, the PN junction formed between the substrate 100 and the doped conductive layer 130 may cover the entire back surface of the battery, may ensure maximum utilization of incident light, may increase short circuit current and open circuit voltage of the battery, and may optimize the width of the back electrode 141 to reduce the series resistance of the battery, and the back junction solar cell may optimize the front light trapping structure to obtain a lower front surface recombination rate and a lower reflectivity. The passivation contact structure can reduce the surface carrier recombination rate of the substrate and improve the photoelectric conversion efficiency of the solar cell.
In addition, the back surface of the substrate 100 has the first doped region 110, the doping element type of the first doped region 110 is the same as the doping element type of the doped conductive layer 130, an emitter can be formed on the back surface of the substrate 100, and carriers (electrons and holes) can be separated in the first doped region 110, which is beneficial to improving the output current of the solar cell. The formation of the first doped region 110 on the back surface 102 shortens the path of carriers generated by the front surface 101 of the substrate 100 to migrate to the back surface PN junction, which is advantageous for reducing the risk of recombination of minority carriers before they reach the doped conductive layer 130.
Fig. 3 is a schematic structural diagram of a photovoltaic module according to an embodiment of the present application.
Correspondingly, referring to fig. 3, in yet another aspect, the embodiment of the present application further provides a photovoltaic module, which is used for converting received light energy into electric energy and transmitting the electric energy to an external load. The photovoltaic module includes: at least one cell string formed by connecting a plurality of solar cells 10 according to any one of the above embodiments (e.g., fig. 1 and 2); a packaging adhesive film 21 for covering the surface of the battery string; and a cover plate 22 for covering the surface of the packaging adhesive film 21 facing away from the battery strings.
The packaging adhesive film 21 may be an organic packaging adhesive film such as EVA or POE, and the packaging adhesive film 21 covers the surface of the battery string to seal and protect the battery string. In some embodiments, the encapsulation film 21 includes an upper encapsulation film and a lower encapsulation film respectively covering both sides of the surface of the battery string. The cover plate 22 may be a glass cover plate or a plastic cover plate, etc. for protecting the battery strings, and the cover plate 22 covers the surface of the packaging adhesive film 21 facing away from the battery strings. In some embodiments, light trapping structures are provided on the cover plate 22 to increase the utilization of the incident light. The photovoltaic module has higher current collection capability and lower carrier recombination rate, and can realize higher photoelectric conversion efficiency. In some embodiments, the cover 22 includes an upper cover and a lower cover on either side of the battery string.
Accordingly, in still another aspect, the present embodiment provides a method for manufacturing a solar cell, which is used for manufacturing the solar cell provided in the above embodiment (fig. 1 or fig. 2). Details of the same or similar content or elements as those given in the above embodiments are not repeated, and only descriptions different from the above descriptions are detailed. Exemplary, the embodiment of the application provides a method for manufacturing a solar cell, which can manufacture the solar cell shown in fig. 1 to 2.
Referring to fig. 4, a substrate 100 is provided, the substrate 100 having a front side 101 and a back side 102 disposed opposite to each other.
In some embodiments, the substrate 100 is a P-type substrate, and the resistivity of the substrate 100 is 0.5 Ω -cm to 3 Ω -cm, alternatively, the resistivity of the substrate 100 is 0.5 Ω -cm to 2 Ω -cm, and the resistivity of the substrate 100 may be specifically 0.53 Ω -cm, 0.89 Ω -cm, 1.29 Ω -cm, 1.53 Ω -cm, or 1.86 Ω -cm. The front and back surfaces 101, 102 of the substrate 100 have a textured structure that enhances the internal reflection of incident light, thereby reducing the optical loss of incident light. The pile structure may be produced by a solution pile process or a laser pile process. The pile structures may include pyramid structures, pyramid-like structures, or any other slope structure having a high aspect ratio.
Referring to fig. 5, a silicon oxide layer 103 is formed, the silicon oxide layer 103 being located on the front surface 101 of the substrate 100.
In some embodiments, the silicon oxide layer 103 is formed by a thermal oxidation method, and the substrate 100 is specifically placed at 900-1100 ℃, and the front surface 101 and the back surface 102 of the substrate 100 are oxidized by oxygen to form the silicon oxide layer 103 with a thickness of 10 nm-80 nm, where the silicon oxide layer on the back surface of the substrate 100 is not shown. The silicon oxide layer 103 formed by the thermal oxidation method has good stability and compactness, can reduce the surface dangling bond of the substrate so as to reduce the interface state density of the substrate and the silicon oxide layer, can well control the interface trap and the fixed charge, and is beneficial to improving the passivation effect. The thermal oxidation method can be classified into dry oxidation, water vapor oxidation and wet oxidation according to the oxidation atmosphere. In other embodiments, silicon oxide may be deposited by plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD) using silane and nitrous oxide, with the PECVD method forming a faster silicon oxide growth and thicker films of silicon oxide that may be deposited.
Referring to fig. 6, the front surface 101 of the substrate 100 is selectively etched by using laser grooving, and a portion of the silicon oxide layer 103 is removed to form a groove 104 corresponding to the electrode, and the bottom of the groove 104 exposes the front surface 101 of the substrate 100; alternatively, a mask layer is formed on the surface of the silicon oxide layer, and a recess 104 is formed in the electrode corresponding region by a wet etching process or the like.
It can be appreciated that when the groove is formed by a wet etching process or laser grooving, if the texture structure on the front surface of the substrate 100 is damaged, the front surface of the substrate 100 may be subjected to secondary texturing, and the texture structure at the bottom of the groove 104 may be identical to the texture structure of the substrate 100 except for the groove 104; alternatively, the pile structures at the bottom of the grooves 104 may be different from the pile structures of the substrate 100 except the grooves 104, and the pile structures at the bottom of the grooves 104 may have smaller widths and lower heights.
Referring to fig. 7, a heavily doped region 105 is formed, the heavily doped region 105 being located on the front surface of the substrate 100 and within the recess 104. A borosilicate glass layer (BSG) containing a diffusion source is first formed on the front side of the substrate 100, and then ion diffusion is performed by a diffusion apparatus to form a heavily doped region. The diffusion apparatus may comprise a transverse quartz tube or a chain type diffusion furnace. In other embodiments, the heavily doped regions may be formed by laser doping.
Referring to fig. 8, the back surface 102 of the substrate 100 is polished to remove the silicon oxide layer and the textured structure on the back surface; a tunnel dielectric film 106 and a conductive film 107 are stacked on the back surface 102.
In some embodiments, an alkaline solution or an acidic solution may be used for polishing, so that the back surface 102 of the substrate 100 is a polished surface, and the polished surface may increase internal reflection of light, reduce the carrier surface recombination rate, and improve the photoelectric conversion efficiency of the battery. It will be appreciated that when the back surface 102 of the substrate 100 is polished, the polishing degree of the polished surface, i.e., the etching degree of the textured structure of the back surface 102, can be controlled by controlling the process parameters of the polishing process. In one specific example, the back surface 102 of the substrate 100 is a complete plane, i.e., without distinct raised structures. In another specific example, the back surface 102 of the substrate 100 still has a portion of the land relief structure, which may be considered as a partially thickness etched pile structure, with the top surface of the pile structure constituting the land.
In some embodiments, tunnel dielectric film 106 and conductive film 107 are formed by one or more of low pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition, LPCVD) or plasma enhanced chemical vapor deposition. The thickness of the tunneling dielectric film 106 is 0.5 nm-3 nm, and the thickness of the conductive film 107 is 40 nm-150 nm; optionally, the thickness of the tunneling dielectric film 106 is 1nm to 2nm, the thickness of the conductive film 107 is 80nm to 120nm, the thickness of the tunneling dielectric film 106 may be 1.3nm, 1.52nm, 1.63nm or 1.92nm, and the thickness of the conductive film 107 may be 80nm, 93nm, 108nm or 119nm. The thickness range of the tunneling dielectric film 106 and the conductive film 107 can ensure that the optical loss of the doped conductive layer formed later is smaller and the interface passivation effect of the tunneling dielectric layer is better, thereby improving the battery efficiency. The thickness of the tunneling dielectric film 106 and the conductive film 107 may include, but is not limited to, the above thickness range, and may be other thickness known to those skilled in the art
Referring to fig. 9, the formed conductive film 107 is subjected to a doping process to form a doped conductive layer 130, and a first doped region 110 is formed on the surface of the substrate 100.
In some embodiments, the doped conductive layer may be formed by LPCVD followed by diffusion or ion implantation doping, and the intrinsically doped conductive layer may be an intrinsic polysilicon layer. In other embodiments, the doped initial conductive film is deposited by PECVD and annealed to form the doped conductive layer, and the material of the initial conductive film may be amorphous silicon or microcrystalline silicon. The material of the doped conductive layer 130 may be polysilicon, amorphous silicon, or microcrystalline silicon.
In some embodiments, the doping element type in the doping conductive layer may be opposite to the doping element type in the substrate 100, for example, the doping element type in the substrate 100 is P-type and the doping element type in the doping conductive layer is N-type.
Referring to fig. 10, a doping process is performed on a partial region of the conductive film to increase the concentration of doping elements of the partial region to form a second doping region 131, and the remaining conductive film serves as a doped conductive layer 130.
In some embodiments, a doped source layer is formed on the surface of the conductive film, the doped source layer having a doping element therein. The doping source layer is located on the whole surface of the conductive film. The material of the doped source layer may include, but is not limited to, phosphosilicate glass (Phosphosilicate Glass, PSG) or borophosphosilicate glass (Borophosphosilicate Glass, BPSG). Performing diffusion treatment to make partial region The doped ions in the doped source layer of (a) are diffused into the conductive film to form a second doped region 131; and removing the doping source layer. And performing diffusion treatment by adopting a local laser process. The doping source layer is completely removed by wet etching, so that the phenomenon that the surface of the silicon wafer is wetted in the air to reduce current and attenuate power due to the existence of residual phosphosilicate glass is avoided; the situation that the passivation layer formed on the doped conductive layer 130 is separated can be avoided, which is beneficial to improving the photoelectric conversion efficiency of the solar cell. The solution of wet etching is HNO 3 And HF. In other embodiments, the diffusion process may be performed using a thermal diffusion process or an ion implantation process. In other embodiments, a plurality of sub-doped source layers are formed on the surface of the conductive film at intervals, and each sub-doped source layer extends along the first direction X. The ratio of the total orthographic projection area of all the sub-doping source layers on the substrate 100 to the orthographic projection area of the conductive film on the substrate 100 is 1% -20%, specifically can be 5%, 3%, 10%, 15% or 20%, and the ratio can avoid the situation that the optical absorption of the solar cell is excessive due to the fact that the area of the subsequently formed first doping region is too large, so that the photoelectric conversion efficiency of the solar cell is improved; meanwhile, the situation that the substrate resistance of the first doped region is large due to the fact that the area of the first doped region is too small and the contact area of the first doped region and the back electrode formed subsequently is small can be avoided, the resistance of the contact resistance of the doped conductive layer and the back electrode formed subsequently can be reduced, and therefore the conductivity of current and the photoelectric conversion efficiency of the solar cell are improved. The material of the sub-doped source layer may include, but is not limited to, phosphosilicate glass or borophosphosilicate glass.
Continuing to refer to fig. 10, a diffusion process is performed to diffuse the doping element in the sub-doping source layer into the conductive film, so as to form a second doping region 131, a third doping region 121 and a first doping region 110; and removing the sub-doping source layer.
It will be appreciated that the doping process may be performed to eliminate the conductive film from the top surface of the substrate 100, that is, the doped conductive layer 130 of the second doped region 131 is lower than the top surface of the doped conductive layer 130 except for the second doped region 131 from the top surface of the substrate 100, and the height difference may be less than 20% of the thickness of the doped conductive layer 130 except for the second doped region 131. Optionally, the top surface of the second doped region 131 remote from the substrate 100 is flush with the top surface of the doped conductive layer 130 except for the second doped region 131.
In some embodiments, a diffusion process is performed to diffuse the doping element in the sub-doped source layer of the partial region into the conductive film to form the second doped region 131, and further diffuse the doping element in the sub-doped source layer into the tunneling dielectric layer 120 and the substrate 100 with a partial thickness to form the first doped region 110 opposite to the second doped region 131 in the substrate 100, and form the third doped region 121 opposite to the second doped region 131 in the tunneling dielectric layer 120.
The solar cells of fig. 9 and 10 may be formed using nanosecond lasers with a laser wavelength of 532nm or other doping capable lasers, and the process parameters of the diffusion process that form the solar cells of fig. 9 and 10 may be different. In some embodiments, the process parameters to form the solar cell shown in fig. 9 include: the laser power is 5-40W, and the laser frequency is 50-250 KHz; the process parameters for forming the solar cell shown in fig. 10 include: the laser power is 40-100W, and the laser frequency is 250-450 KHz.
Referring to fig. 11, a post passivation layer 109 is formed, the post passivation layer 109 being located on a surface of the doped conductive layer 130 remote from the substrate 100; a front passivation layer 108 is formed, the front passivation layer 108 being located on the surface of the silicon oxide layer 103 remote from the substrate 100.
Referring to fig. 1, a plurality of back electrodes 141 are formed at intervals, the back electrodes 141 extend along the second direction, and each back electrode 141 penetrates the rear passivation layer 109 and contacts the doped conductive layer 130; a plurality of spaced apart electrodes 142 are formed, the electrodes 142 extend along the second direction, and each electrode 142 penetrates the front passivation layer 108 and contacts the heavily doped region 103.
In some embodiments, the electrode 142 and the back electrode 141 may be formed through a screen printing process. The paste in the screen printing process is aluminum-containing silver paste, the aluminum-containing paste can form good contact with the substrate 100, the silver self-resistance of the silver-containing paste is small, and the contact resistance of the electrode 141 and the substrate 100 is reduced. In other embodiments, a laser grooving process is used to form the partial contact grooves, and the electrode or back electrode forming paste is positioned in the contact grooves and then annealed to form the electrode or back electrode.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples of carrying out the application and that various changes in form and details may be made therein without departing from the spirit and scope of the application. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the application, and the scope of the application is therefore intended to be limited only by the appended claims.
Claims (13)
1. A solar cell, comprising:
a substrate having opposite front and back sides, the back side of the substrate having a first doped region of a doping element type opposite to a doping element type within the substrate;
the tunneling dielectric layer is positioned on the back of the substrate; the tunneling dielectric layer is only provided with a third doping region which penetrates through the thickness of the tunneling dielectric layer locally;
the doped conductive layer is positioned on the whole surface of the tunneling dielectric layer far away from the back surface of the substrate, and is provided with doping elements, and the doping element types in the doped conductive layer are opposite to the doping element types in the substrate; a PN junction is formed between the substrate and the doped conductive layer;
The ratio of the total surface area of the first doped region to the surface area of the doped conductive layer ranges from 1% to 20%;
and the back electrodes are arranged along the first direction and are contacted with the doped conductive layer.
2. The solar cell of claim 1, wherein a doping element type of the first doped region is the same as a doping element type within the doped conductive layer, and a doping concentration of the first doped region is less than or equal to a doping concentration of the doped conductive layer.
3. The solar cell according to claim 1 or 2, wherein the doping concentration of the first doped region is 1 x 10 or less 20 cm -3 。
4. The solar cell according to claim 1 or 2, wherein the ratio of the doping depth of the first doped region to the thickness of the substrate is less than or equal to 0.2%.
5. The solar cell of claim 4, wherein the first doped region has a doping depth of 1nm to 200nm.
6. The solar cell of claim 1, wherein the doped conductive layer has a second doped region extending through a thickness of the doped conductive layer, the second doped region having a doping concentration greater than a doping concentration of the doped conductive layer other than the second doped region, the back electrode being in contact with the doped conductive layer of the second doped region; the second doped region is opposite to the first doped region.
7. The solar cell according to claim 6, wherein a doping concentration of the second doped region is equal to or higher than a doping concentration of the first doped region.
8. The solar cell of claim 7, wherein the third doped region is in contact with the first doped region and the second doped region, respectively, and the first doped region, the second doped region, and the third doped region are aligned and of the same doping element type.
9. The solar cell of claim 1, wherein the doping element type of the substrate is a P-type doping element and the doping element type of the doped conductive layer is an N-type doping element.
10. The solar cell of claim 1, wherein the front side of the substrate has a heavily doped region having a doping element type that is the same as the doping element type of the substrate, the heavily doped region having a doping concentration that is greater than the doping concentration of the substrate other than the heavily doped region; the solar cell further includes: and an electrode in contact with the substrate of the heavily doped region.
11. The solar cell of claim 10, wherein a width of the heavily doped region is equal to or greater than a width of the electrode-substrate interface along the first direction; the ratio of the width of the heavily doped region to the width of the contact surface of the electrode and the substrate is 100% -200%.
12. The solar cell of claim 10, wherein the heavily doped region has a doping concentration of 7 x 10 18 cm -3 ~2×10 19 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The doping depth of the heavily doped region is 0.8-1.6 mu m.
13. A photovoltaic module, comprising:
a cell string formed by connecting a plurality of solar cells according to any one of claims 1 to 12;
the packaging adhesive film is used for covering the surface of the battery string;
and the cover plate is used for covering the surface of the packaging adhesive film, which is away from the battery strings.
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| CN116581174A (en) * | 2023-02-22 | 2023-08-11 | 浙江晶科能源有限公司 | Solar cell, preparation method thereof and photovoltaic module |
| CN116093191A (en) * | 2023-03-01 | 2023-05-09 | 浙江晶科能源有限公司 | Solar cell and photovoltaic module |
| CN117374168B (en) * | 2023-12-07 | 2024-02-06 | 无锡华晟光伏科技有限公司 | Heterojunction solar cell and preparation method thereof |
| CN117727822B (en) * | 2024-02-07 | 2024-07-12 | 浙江晶科能源有限公司 | Solar cell, method for manufacturing solar cell, and photovoltaic module |
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