CN210666764U

CN210666764U - Communication equipment and communication device based on I3C bus

Info

Publication number: CN210666764U
Application number: CN201921517046.5U
Authority: CN
Inventors: 刘春香; 王常慧; 杜金凤; 赵井坤
Original assignee: Gowin Semiconductor Corp
Current assignee: Gowin Semiconductor Corp
Priority date: 2019-09-11
Filing date: 2019-09-11
Publication date: 2020-06-02
Anticipated expiration: 2029-09-11

Abstract

The utility model discloses a communication equipment and communication device based on I3C bus. The communication device includes a first translation bridge, an I3C bus connected to the first translation bridge, and a second translation bridge connected to the I3C bus; the first conversion bridge comprises a first protocol communication slave board, an I3C communication master board and a first protocol conversion adapter, wherein the first protocol conversion adapter is used for realizing the analysis and conversion of data based on a first communication protocol and data based on an I3C communication protocol; the second conversion bridge comprises an I3C communication slave board, a second protocol communication master board and a second protocol conversion adapter, and the second protocol conversion adapter is used for realizing the analysis and conversion of data based on the I3C communication protocol and data based on the second communication protocol. The communication device can realize normal communication between the first protocol master device and the slave device mounted on the I3C bus through the first conversion bridge, so that the communication process has the functions and advantages of I3C bus communication.

Description

Communication equipment and communication device based on I3C bus

Technical Field

The utility model relates to an integrated circuit designs technical field, especially relates to communications facilities and communication device based on I3C bus.

Background

The IP Core is a fully-known Intellectual Property Core (Intellectual Property Core) and refers to a chip design module provided by a certain party. Designers can design logic of an application specific integrated circuit or a Field Programmable Gate Array (FPGA) based on an IP core to shorten a design period and improve design quality and efficiency. With the increasing application of integrated circuit chips, the disadvantages of the devices adopting the I2C protocol are gradually revealed, and the MIPI alliance proposes a new standard specification of I3C. The new standard specification of I3C has the advantages of effectively reducing the physical interfaces of the integrated circuit chip system, and supporting low power consumption, high data rate and other existing interface protocols.

Based on the above advantages of the I3C interface protocol, more and more users will choose to use the I3C communication protocol when designing, but most of the existing integrated circuit devices are only configured with a Serial Peripheral Interface (SPI) and a universal asynchronous receiver/transmitter interface (UART), because the SPI interface or the UART interface cannot communicate with the I3C bus, a traditional protocol master device configured with only the SPI interface or the UART interface cannot communicate with other slave devices through the I3C bus, power consumption in the communication process is large, transmission performance is low, and compatibility with other devices is low, for example, the traditional protocol master device cannot communicate with the I3C slave device.

SUMMERY OF THE UTILITY MODEL

The embodiment of the utility model provides a communication equipment and communication device based on I3C bus to solve the current main equipment that adopts traditional communication protocol and can't communicate the problem that exists through I3C agreement.

An I3C bus-based communication device comprises a first conversion bridge for connecting a first protocol master device, an I3C bus connected with the first conversion bridge, and a second conversion bridge connected with the I3C bus for connecting a second protocol slave device;

the first conversion bridge comprises a first protocol communication slave board, an I3C communication master board and a first protocol conversion adapter for connecting the first protocol communication slave board and the I3C communication master board, wherein the first protocol conversion adapter is used for realizing the analysis and conversion of data based on a first communication protocol and data based on an I3C communication protocol;

the second conversion bridge comprises an I3C communication slave board, a second protocol communication master board and a second protocol conversion adapter for connecting the I3C communication slave board and the second protocol communication master board, and the second protocol conversion adapter is used for realizing the analysis and conversion of data based on an I3C communication protocol and data based on a second communication protocol.

Preferably, the first conversion bridge is specifically an SPI-I3C conversion bridge, the first protocol communication slave board is specifically an SPI communication slave board, and the first protocol conversion adapter is specifically an SPI-I3C conversion adapter.

Preferably, the second conversion bridge is specifically an I3C-UART conversion bridge, the second protocol communication motherboard is specifically a UART communication motherboard, and the second protocol conversion adapter is specifically an I3C-UART conversion adapter.

Preferably, the first conversion bridge is a UART-I3C conversion bridge, the first protocol communication slave board is a UART communication slave board, and the first protocol conversion adapter is a UART-I3C conversion adapter.

Preferably, the second conversion bridge is specifically an I3C-SPI conversion bridge, the second protocol communication motherboard is specifically an SPI communication motherboard, and the second protocol conversion adapter is specifically an I3C-SPI conversion adapter.

An I3C bus-based communication device comprises the I3C bus-based communication device, a first protocol master device connected with a first conversion bridge through a first bus, a second protocol slave device connected with a second conversion bridge through a second bus, and an I2C slave device and/or an I3C slave device mounted on an I3C bus, wherein the first protocol master device is connected with an MCU controller; the first protocol master device and the first protocol communication slave plate communicate through the first bus; the I3C communication motherboard communicates with the I3C communication slave, the I2C slave, or the I3C slave over the I3C bus; the second protocol communication main board is communicated with the second protocol slave equipment through the second bus.

Preferably, the first protocol master device comprises an SPI master device, and the first bus comprises a first SPI bus; the first conversion bridge is specifically an SPI-I3C conversion bridge, the first protocol communication slave board is specifically an SPI communication slave board, and the first protocol conversion adapter is specifically an SPI-I3C conversion adapter.

Preferably, the second protocol slave device comprises a UART slave device, and the second bus comprises a first UART bus; the second conversion bridge is specifically an I3C-UART conversion bridge, the second protocol communication mainboard is specifically a UART communication mainboard, and the second protocol conversion adapter is specifically an I3C-UART conversion adapter.

Preferably, the first protocol master comprises a UART master, and the first bus comprises a second UART bus; the first conversion bridge is specifically a UART-I3C conversion bridge, the first protocol communication slave board is specifically a UART communication slave board, and the first protocol conversion adapter is specifically a UART-I3C conversion adapter.

Preferably, the second protocol slave device comprises an SPI slave device, and the second bus comprises a second SPI bus; the second conversion bridge is specifically an I3C-SPI conversion bridge, the second protocol communication mainboard is specifically an SPI communication mainboard, and the second protocol conversion adapter is specifically an I3C-SPI conversion adapter.

By arranging the first conversion bridge connected through the I3C bus and used for connecting the first protocol master device and the second conversion bridge connected through the second protocol slave device, the communication device and the communication device based on the I3C bus can realize normal communication between the first protocol master device and the I2C slave device, the I3C slave device and the second protocol slave device connected through the second conversion bridge, wherein the slave devices are mounted on the I3C bus, and the communication process of the communication device and the communication device has the advantages of smaller power consumption, higher transmission performance and the like existing in the I3C bus communication.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.

Fig. 1 is a schematic diagram of an I3C bus-based communication device according to an embodiment of the present invention;

fig. 2 is a schematic diagram of a communication device based on I3C bus according to an embodiment of the present invention;

fig. 3 is another schematic diagram of a communication device based on an I3C bus according to an embodiment of the present invention;

fig. 4 is another schematic diagram of a communication device based on the I3C bus according to an embodiment of the present invention.

110, a first conversion bridge; 1101. SPI-I3C switch bridge; 1102. UART-I3C converting bridge; 111. a first protocol communication slave board; 1111. an SPI communication slave plate; 1112. a UART communication slave board; 112. an I3C communication mainboard; 113. a first protocol conversion adapter; 1131. SPI-I3C conversion adapter; 1132. a UART-I3C conversion adapter; 120. an I3C bus; 130. a second conversion bridge; 1301. I3C-UART conversion bridge; 1302. I3C-SPI transfer bridge; 131. I3C communication slave plate; 132. a second protocol communication main board; 1321. a UART communication mainboard; 1322. an SPI communication mainboard; 133. a second protocol conversion adapter; 1331. I3C-UART conversion adapter; 1332. I3C-SPI conversion adapter; 140. a first bus; 141. a first SPI bus; 142. a first UART bus; 150. a second bus; 151. a second SPI bus; 152. a second UART bus; 210. a first protocol master device; 211. an SPI master device; 212. a UART master device; 220. a second protocol slave device; 221. a UART slave device; 222. an SPI slave device; 230. an I2C slave device; 240. an I3C slave device; 250. an MCU controller; 260. a register interface.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, of the embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

Fig. 1 shows an I3C bus-based communication device in an embodiment of the present invention. The communication device based on the I3C bus can be used to implement the first protocol master device 210 to communicate with the I3C slave device 240 or the I2C slave device 230 mounted on the I3C bus 120 through the I3C bus 120, or implement the first protocol master device 210 to communicate with the second protocol slave device 220 connected to the second conversion bridge 130 mounted on the I3C bus 120, that is, implement the first protocol master device 210 to communicate with the I2C slave device 230, the I3C slave device 240 and the second protocol slave device 220 mounted on the I3C bus 120. The first protocol master device 210 is a master device for implementing communication based on a certain communication protocol (including but not limited to SPI and UART communication protocols), and the master device is a device for implementing a control function. The second protocol slave device 220 is a slave device for implementing communication based on some communication protocol (including but not limited to SPI and UART communication protocols), and the slave device is a device for cooperating with the master device to perform corresponding functions, and generally speaking, may be various sensors mounted on a bus for implementing data collection functions.

As shown in fig. 1, the I3C bus-based communication device includes a first translation bridge 110 for connecting a first protocol master 210, an I3C bus 120 connected to the first translation bridge 110, and a second translation bridge 130 connected to the I3C bus 120 for connecting a second protocol slave 220. The I3C communication protocol is a brand new protocol standard, which can effectively reduce the physical ports of the integrated system, and support the advantages of low power consumption, high data rate and other existing port protocols. The I3C bus 120 is a bus that communicates based on the I3C communication protocol, the I3C bus 120 takes in the key characteristics of I2C and SPI, has low pin count, scalability, low power consumption, higher capacity and new performance, and is I2C compatible, allowing the I2C slave 230 to coexist on the same port with new devices of the I3C specification. The first conversion bridge 110 is a device for converting data of a conventional communication protocol corresponding to the first protocol master 210 and data of an I3C communication protocol corresponding to the I3C bus 120, so that the first protocol master 210 can communicate with the I3C bus 120. The second conversion bridge 130 is a device for converting data of the I3C communication protocol corresponding to the I3C bus 120 and data of the conventional communication protocol corresponding to the second protocol slave device 220, so as to enable communication between the I3C bus 120 and the second protocol slave device 220.

The first conversion bridge 110 includes a first protocol communication slave board 111, an I3C communication master board 112, and a first protocol conversion adapter 113 for connecting the first protocol communication slave board 111 and the I3C communication master board 112, where the first protocol conversion adapter 113 is used to implement parsing conversion of data based on the first communication protocol and data based on the I3C communication protocol.

The first protocol communication slave board 111 is a circuit board configured based on a conventional communication protocol corresponding to the first protocol master device 210. Specifically, the first protocol master device 210 communicates with the first protocol communication slave plate 111 through a bus corresponding to a certain communication protocol, where a conventional communication protocol is the first communication protocol. It is understood that the first protocol communication slave board 111 is provided with a bus interface corresponding to the first communication protocol, and the bus interface is connected to the first bus 140, so that the bus interface and the first bus 140 can perform communication based on the first communication protocol. In this embodiment, the first protocol communication slave board 111 is configured to connect the first protocol master device 210 and the first protocol conversion adapter 113, so as to send data sent by the first protocol master device 210 to the first protocol conversion adapter 113, and send response data returned by the first protocol conversion adapter 113 to the first protocol master device 210.

The I3C communication motherboard 112 is a circuit board configured based on the I3C communication protocol and capable of implementing a control function. The I3C communication motherboard 112 is connected to the I3C bus 120, and the I3C communication motherboard 112 is the master in the I3C bus 120 for controlling I3C bus 120 communication. The I3C communication master board 112 is a master device capable of realizing a control function in the communication process of the I3C bus 120, and may send a corresponding control command to one target slave device among all the I2C slave devices 230, I3C slave devices 240 mounted on the I3C bus 120, or the second protocol slave device 220 connected through the second conversion bridge 130 through the I3C communication master board 112, so as to receive response data corresponding to the control command returned by the target slave device through the I3C bus 120, and send the response data to the first protocol communication slave board 111 through the first protocol conversion adapter 113, so that the first protocol communication slave board 111 returns the response data to the first protocol master device 210.

The first protocol conversion adapter 113 is disposed between the first protocol communication slave board 111 and the I3C communication master board 112, and is configured to implement parsing and converting data based on the first communication protocol and data based on the I3C communication protocol, so as to implement communication between the first protocol communication slave board 111 and the I3C communication master board 112. The first communication protocol is a communication protocol used for communication between the first protocol master device 210 and the first protocol communication slave plate 111.

The second conversion bridge 130 comprises an I3C communication slave board 131, a second protocol communication master board 132, and a second protocol conversion adapter 133 for connecting the I3C communication slave board 131 with the second protocol communication master board 132, wherein the second protocol conversion adapter 133 is used for implementing parsing conversion of data based on the I3C communication protocol and data based on the second communication protocol.

The I3C communication slave board 131 is a circuit board configured based on the I3C communication protocol and capable of communicating with the I3C communication master board 112 through the I3C bus 120. In this embodiment, the I3C communication slave board 131 and the I3C communication master board 112 may perform mutual communication through the I3C bus 120, for example, the I3C communication slave board 131 may receive a control command sent by the I3C communication master board 112 through the I3C bus 120, send the control command to the second protocol communication master board 132 through the second protocol conversion adapter 133, and receive response data returned by the second protocol communication master board 132 through the second protocol conversion adapter 133, so as to send the response data to the I3C communication master board 112 through the I3C bus 120.

The second protocol communication motherboard 132 is a motherboard configured based on a conventional communication protocol corresponding to the second protocol slave device 220. Specifically, the second protocol communication motherboard 132 communicates with the second protocol slave device 220 through a bus corresponding to a certain communication protocol, where the conventional communication protocol is the second communication protocol. Correspondingly, the second protocol communication motherboard 132 is provided with a bus interface corresponding to the second communication protocol, and the bus interface is connected to the second bus 150, so that the bus interface and the second bus 150 can perform communication based on the second communication protocol, and thus the second protocol communication motherboard 132 and the second protocol slave device 220 can perform communication based on the second bus 150. In this embodiment, the second protocol communication motherboard 132 and the second protocol slave device 220 communicate with each other through the second bus 150 corresponding to the second communication protocol, when the second protocol communication motherboard 132 communicates on the bus based on the second communication protocol, the second protocol communication motherboard 132 can implement a control function, and the second protocol slave device 220 is configured to respond according to the control instruction sent by the second protocol communication motherboard 132, so as to send corresponding response data to the second protocol communication motherboard 132.

The second protocol conversion adapter 133 is disposed between the I3C slave board 131 and the second protocol communication master board 132, and is configured to implement parsing and converting of data based on the I3C communication protocol and data based on the second communication protocol, so as to implement communication between the I3C slave board 131 and the second protocol communication master board 132. The second communication protocol refers to a communication protocol used for communication between the second protocol communication motherboard 132 and the second protocol slave device 220.

In this embodiment, each of the first conversion bridge 110 and the second conversion bridge 130 may be a circuit described in a hardware language, for example, a circuit described in a Verilog or a VHDL language, where the Verilog or the VHDL language is a hardware description language.

In the communication process of the communication device based on the I3C bus provided in the foregoing embodiment, the first conversion bridge 110 shown in fig. 1 needs to perform the following steps:

s101: the first protocol communication slave board 111 receives first protocol communication data based on the first communication protocol, which is sent by the first protocol master device 210, through the first bus 140, and sends the first protocol communication data to the first protocol conversion adapter 113.

S102: the first protocol conversion adapter 113 receives, analyzes and converts the first protocol communication data, acquires I3C communication data and a target slave address based on the I3C communication protocol, and sends the I3C communication data and the target slave address to the I3C communication mainboard 112.

The receiving, analyzing and converting the first protocol communication data in the step S102 to obtain the I3C communication data and the target slave address based on the I3C communication protocol specifically includes the following steps: (1) the first protocol conversion adapter 113 receives and analyzes the first protocol communication data, and acquires the address of the target slave and the valid communication data. (2) And converting the effective communication data to obtain I3C communication data corresponding to the I3C communication protocol.

S103: the I3C communication motherboard 112 sends the I3C communication data to the target slave device corresponding to the target slave address through the I3C bus 120. The treatment process specifically comprises the following steps: the I3C communication motherboard 112 generates an addressing signal based on the target slave address, and transmits the addressing signal to the target slave device corresponding to the target communication address through the I3C bus 120. If an address response signal returned by the target slave device is received within the addressing response time, the I3C communication data and the target slave address are sent to the I3C communication main board 112.

S104: the I3C communication motherboard 112 receives I3C response data corresponding to the I3C communication data returned by the target slave device through the I3C bus 120, and transmits the I3C response data to the first protocol conversion adapter 113.

S105: when the first protocol conversion adapter 113 receives the I3C response data within the response waiting time corresponding to the target slave device, it performs parsing conversion on the I3C response data, acquires the first protocol response data, and sends the first protocol response data to the first protocol communication slave board 111.

In this embodiment, the response latency includes a first response latency and a second response latency, and the first response latency is a response latency corresponding to the target slave device being the I2C slave device 230 or the I3C slave device 240. The second response latency is the response latency for the target slave device to be the second protocol slave device 220. Since the second conversion bridge 130 is required to perform the parsing conversion process when the target slave device is the second protocol slave device 220, the second response waiting time is longer than the first response waiting time, so as to ensure the smooth proceeding of the communication process.

S106: the first protocol communication slave board 111 transmits the first protocol response data to the first protocol master 210 through the first bus 140.

In the communication process of the communication device based on the I3C bus provided in the foregoing embodiment, the second conversion bridge 130 shown in fig. 1 needs to perform the following steps:

s201: the I3C communication slave board 131 receives the target slave address and the I3C communication data sent by the I3C communication master board 112 through the I3C bus 120, and if the I3C communication address corresponding to the I3C communication slave board 131 matches the target slave address, the I3C communication data is sent to the second protocol conversion adapter 133.

S202: the second protocol conversion adapter 133 receives and parses the converted I3C communication data, acquires the second protocol communication data, and sends the second protocol communication data to the second protocol communication motherboard 132.

S203: the second protocol communication motherboard 132 receives the second protocol communication data, sends the second protocol communication data to the second protocol slave device 220, receives second protocol response data returned by the second protocol slave device 220 based on the second protocol communication data, and sends the second protocol response data to the second conversion bridge 130.

S204: the second conversion bridge 130 receives and parses the converted second protocol response data, obtains the I3C response data, and sends the I3C response data to the I3C communication motherboard 112 through the I3C bus 120.

In the communication device based on the I3C bus provided by the embodiment, the first conversion bridge 110 for connecting the first protocol master device 210 and the second conversion bridge 130 for connecting the second protocol slave device 220 are arranged on the I3C bus 120, so that the communication device based on the I3C bus realizes normal communication between the first protocol master device 210 and the I2C slave device 230, the I3C slave device 240 mounted on the I3C bus 120 and the second protocol slave device 220 connected through the second conversion bridge 130, and the communication process has the advantages of smaller power consumption and higher transmission performance existing in the I3C bus 120.

In one embodiment, as shown in fig. 3, the first translation bridge 110 is embodied as an SPI-I3C translation bridge 1101, the first protocol communication slave board 111 is embodied as an SPI communication slave board 1111, and the first protocol translation adapter 113 is embodied as an SPI-I3C translation adapter 1131. Wherein, when first switch bridge 110 is SPI-I3C switch bridge 1101, then the first protocol master 210 connected to SPI-I3C translation bridge 1101 is SPI master 211, that is the SPI-I3C translation bridge 1101 may be used to connect the SPI master device 211 with the I3C bus 120, so that the data sent by SPI master device 211 may be transmitted through SPI-I3C bridge 1101, enabling SPI master device 211 to communicate with I3C bus 120, such that SPI master device 211 may be communicatively coupled via I3C bus 120 to an I2C slave device 230, an I3C slave device 240, or a second protocol slave device 220 coupled to a generic second translation bridge 130 mounted on I3C bus 120, so that the power consumption is low and the transmission performance is high in the process that the SPI master 211, which is a conventional protocol master, communicates with the I2C slave 230, the I3C slave 240 or the second protocol slave 220 connected through the second conversion bridge 130 through the I3C bus 120.

Further, as shown in fig. 3, the second conversion bridge 130 is specifically an I3C-UART conversion bridge 1301, the second protocol communication motherboard 132 is specifically a UART communication motherboard 1321, and the second protocol conversion adapter 133 is specifically an I3C-UART conversion adapter 1331. I.e., the second converting bridge 130 is the I3C-UART converting bridge 1301, the second protocol slave 220 connected to the I3C-UART converting bridge 1301 is the UART slave 221, i.e., the I3C-UART converting bridge 1301 can connect the I3C bus 120 with the UART slave 221, so that the I3C bus 120 can communicate with the UART slave 221. It can be understood that when the first translation bridge 110 is the SPI-I3C translation bridge 1101 and the second translation bridge 130 is the I3C-UART translation bridge 1301, the SPI master device 211, which is a traditional protocol master device, can communicate with the UART slave device 221 through the I3C bus 120 through the I3C bus 120, and the communication process has the advantages of less power consumption and higher transmission performance in the I3C bus 120 communication.

In one embodiment, as shown in fig. 4, the first conversion bridge 110 is specifically a UART-I3C conversion bridge 1102, the first protocol communication slave board 111 is specifically a UART communication slave board 1112, and the first protocol conversion adapter 113 is specifically a UART-I3C conversion adapter 1132. Wherein, when the first converting bridge 110 is the UART-I3C converting bridge 1102, the first protocol master 210 connected to the UART-I3C translation bridge 1102 is the UART master 212, that is, the UART-I3C translation bridge 1102 may be used to connect the UART master 212 to the I3C bus 120, so that the data transmitted by the UART master 212 can be transmitted through the UART-I3C converting bridge 1102, so that the UART master 212 can communicate with the I3C bus 120, so that the UART master 212 can be communicatively coupled via the I3C bus 120 to the I2C slave 230, the I3C slave 240, or the second protocol slave 220 coupled to the universal second translation bridge 130 mounted on the I3C bus 120, so that the power consumption is low and the transmission performance is high when the UART master 212, a conventional protocol master, communicates with the I2C slave 230, the I3C slave 240 through the I3C bus 120 or the second protocol slave 220 connected through the second conversion bridge 130.

Further, as shown in fig. 4, the second conversion bridge 130 is specifically an I3C-SPI conversion bridge 1302, the second protocol communication motherboard 132 is specifically an SPI communication motherboard 1322, and the second protocol conversion adapter 133 is specifically an I3C-SPI conversion adapter 1332. That is, if the second translation bridge 130 is the I3C-SPI translation bridge 1302, the second protocol slave device 220 connected to the I3C-SPI translation bridge 1302 is the SPI slave device 222, that is, the I3C-SPI translation bridge 1302 can connect the I3C bus 120 and the SPI slave device 222, so that the I3C bus 120 can communicate with the SPI slave device 222. It can be understood that when the first translation bridge 110 is the UART-I3C translation bridge 1102 and the second translation bridge 130 is the I3C-SPI translation bridge 1302, a conventional protocol master device, such as the UART master device 212, can communicate with the SPI slave device 222 through the I3C bus 120 via the I3C bus 120, and the communication process has the advantages of less power consumption and higher transmission performance for the I3C bus 120 communication.

Fig. 2 shows an I3C bus-based communication device according to an embodiment of the present invention. The communication device based on the I3C bus comprises the communication device based on the I3C bus shown in FIG. 1, a first protocol master device 210 connected with the first conversion bridge 110 through a first bus 140, a second protocol slave device 220 connected with the second conversion bridge 130 through a second bus 150, and an I2C slave device 230 and/or an I3C slave device 240 mounted on an I3C bus 120, wherein the first protocol master device 210 is connected with the MCU controller 250; the first protocol master device 210 communicates with the first protocol communication slave plate 111 through the first bus 140; the I3C communication motherboard 112 communicates with the I3C communication slave board 131, the I2C slave device 230, or the I3C slave device 240 over the I3C bus 120; the second protocol communication master 132 communicates with the second protocol slave 220 through the second bus 150.

In the communication process of the communication device based on the I3C bus provided in the above embodiment, the method specifically includes the following steps:

s301: the MCU controller 250 generates the stimulus data and transmits the stimulus data to the first protocol master 210 through the register interface 260.

S302: the first protocol master device 210 encodes the excitation data, acquires first protocol communication data based on the first communication protocol, and sends the first protocol communication data to the first conversion bridge 110 via the first bus 140.

S303: the first conversion bridge 110 receives and analyzes the converted first protocol communication data, acquires I3C communication data and a target slave address based on the I3C communication protocol, and sends the I3C communication data and the target slave address to a target slave device corresponding to the target slave address through an I3C bus 120, where the target slave device is specifically any one of the I2C slave device 230, the I3C slave device 240, or the second protocol slave device 220.

S304: if the target slave device is the I2C slave device 230 or the I3C slave device 240, the target slave device receives the I3C communication data, acquires corresponding I3C response data based on the I3C communication data, and sends the I3C response data to the first translation bridge 110 through the I3C bus 120.

S305: if the target slave device is the second protocol slave device 220, the second conversion bridge 130 receives and parses the I3C communication data, obtains the second protocol communication data, and sends the second protocol communication data to the second protocol slave device 220 through the second bus 150.

S306: the second protocol slave device 220 receives the second protocol communication data, acquires corresponding second protocol response data based on the second protocol communication data, and sends the second protocol response data to the second conversion bridge 130.

S307: the second conversion bridge 130 receives and parses the converted second protocol response data, obtains I3C response data, and sends I3C response data to the first conversion bridge 110 via the I3C bus 120.

S308: the first translation bridge 110 receives and parses the I3C response data, obtains the first protocol response data, and sends the first protocol response data to the first protocol master 210 over the first bus 140.

S309: the first protocol master 210 receives the first protocol response data and transmits the first protocol response data to the MCU controller 250.

In one embodiment, as shown in FIG. 3, first protocol master 210 includes SPI master 211, first bus 140 includes first SPI bus 141; the first conversion bridge 110 is specifically an SPI-I3C conversion bridge 1101, the first protocol communication slave board 111 is specifically an SPI communication slave board 1111, and the first protocol conversion adapter 113 is specifically an SPI-I3C conversion adapter 1131. That is, the SPI-I3C translation bridge 1101 may implement that the SPI master device 211 communicates with the I3C bus 120, so that the power consumption of the SPI master device 211, which is a conventional protocol master device, is lower in the process of communicating with the I2C slave device 230, the I3C slave device 240, or the second protocol slave device 220 connected to the general second translation bridge 130 through the I3C bus 120, and the transmission performance is higher, and the communication process is as shown in the above steps S301 to S309, which is not repeated herein.

Further, as shown in fig. 3, the second protocol slave device 220 includes a UART slave device 221, and the second bus 150 includes a second UART bus 152; the second conversion bridge 130 is specifically an I3C-UART conversion bridge 1301, the second protocol communication motherboard 132 is specifically a UART communication motherboard 1321, and the second protocol conversion adapter 133 is specifically an I3C-UART conversion adapter 1331. That is, the I3C bus 120 can communicate with the UART slave 221 through the I3C-UART conversion bridge 1301, and the communication process has the advantages of low power consumption and high transmission performance of the I3C bus 120 communication. It is understood that when the first protocol master device 210 is the SPI master device 211 and the second protocol slave device 220 is the UART slave device 221, the SPI master device 211 is connected to the I3C bus 120 through the SPI-I3C converting bridge 1101, and the I3C bus 120 is connected to the UART slave device 221 through the I3C-UART converting bridge 1301, so that the SPI master device 211 can communicate with the UART slave device 221 through the I3C bus 120, so that the communication process between the SPI master device 211 and the UART slave device 221 is low in power consumption and high in transmission performance.

In one embodiment, as shown in fig. 4, the first protocol master 210 includes a UART master 212, the first bus 140 includes a first UART bus 142; the first conversion bridge 110 is specifically a UART-I3C conversion bridge 1102, the first protocol communication slave board 111 is specifically a UART communication slave board 1112, and the first protocol conversion adapter 113 is specifically a UART-I3C conversion adapter 1132. The UART-I3C converting bridge 1102 may implement communication between the UART master 212 and the I3C bus 120, so that the UART master 212, which is a conventional protocol master, has lower power consumption and higher transmission performance during communication with the I2C slave 230, the I3C slave 240 or the second protocol slave 220 connected to the universal second converting bridge 130 through the I3C bus 120, and the communication process is as shown in the above steps S301 to S309, which is not repeated herein.

Further, as shown in fig. 4, second protocol slave 220 includes SPI slave 222, and second bus 150 includes second SPI bus 151; the second conversion bridge 130 is specifically an I3C-SPI conversion bridge 1302, the second protocol communication motherboard 132 is specifically an SPI communication motherboard 1322, and the second protocol conversion adapter 133 is specifically an I3C-SPI conversion adapter 1332. That is, the communication between the I3C bus 120 and the SPI slave device 222 can be realized through the I3C-SPI conversion bridge 1302, and the communication process has the advantages of less power consumption and higher transmission performance of the I3C bus 120 communication. It is understood that when the first protocol master device 210 is the UART master device 212 and the second protocol slave device 220 is the SPI slave device 222, the UART master device 212 is connected to the I3C bus 120 through the SPI-I3C translation bridge 1101, and the I3C bus 120 is connected to the SPI slave device 222 through the I3C-SPI translation bridge 1302, so that the UART master device 212 can communicate with the SPI slave device 222 through the I3C bus 120, so that the communication process between the UART master device 212 and the SPI slave device 222 is low in power consumption and high in transmission performance.

The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims

1. An I3C bus-based communication device, which is characterized by comprising a first conversion bridge for connecting a first protocol master device, an I3C bus connected with the first conversion bridge, and a second conversion bridge connected with the I3C bus for connecting a second protocol slave device;

2. The I3C bus-based communication device of claim 1, wherein the first translation bridge is specifically an SPI-I3C translation bridge, the first protocol communication slave board is specifically an SPI communication slave board, and the first protocol translation adapter is specifically an SPI-I3C translation adapter.

3. The I3C bus-based communication device of claim 2, wherein the second conversion bridge is specifically an I3C-UART conversion bridge, the second protocol communication motherboard is specifically a UART communication motherboard, and the second protocol conversion adapter is specifically an I3C-UART conversion adapter.

4. The I3C bus-based communication device of claim 1, wherein the first conversion bridge is specifically a UART-I3C conversion bridge, the first protocol communication slave board is specifically a UART communication slave board, and the first protocol conversion adapter is specifically a UART-I3C conversion adapter.

5. The I3C bus-based communication device of claim 4, wherein the second conversion bridge is specifically an I3C-SPI conversion bridge, the second protocol communication motherboard is specifically an SPI communication motherboard, and the second protocol conversion adapter is specifically an I3C-SPI conversion adapter.

6. An I3C bus-based communication device, comprising the I3C bus-based communication device of any one of claims 1-5, a first protocol master device connected to a first conversion bridge through a first bus, a second protocol slave device connected to a second conversion bridge through a second bus, and an I2C slave device and/or an I3C slave device mounted on an I3C bus, wherein the first protocol master device is connected to an MCU controller; the first protocol master device and the first protocol communication slave plate communicate through the first bus; the I3C communication motherboard communicates with the I3C communication slave, the I2C slave, or the I3C slave over the I3C bus; the second protocol communication main board is communicated with the second protocol slave equipment through the second bus.

7. The I3C bus-based communication apparatus of claim 6, wherein the first protocol master device comprises an SPI master device, the first bus comprises a first SPI bus; the first conversion bridge is specifically an SPI-I3C conversion bridge, the first protocol communication slave board is specifically an SPI communication slave board, and the first protocol conversion adapter is specifically an SPI-I3C conversion adapter.

8. The I3C bus-based communication apparatus of claim 7, wherein the second protocol slave device comprises a UART slave device, the second bus comprises a second UART bus; the second conversion bridge is specifically an I3C-UART conversion bridge, the second protocol communication mainboard is specifically a UART communication mainboard, and the second protocol conversion adapter is specifically an I3C-UART conversion adapter.

9. The I3C bus-based communication apparatus of claim 6, wherein the first protocol master comprises a UART master, the first bus comprises a first UART bus; the first conversion bridge is specifically a UART-I3C conversion bridge, the first protocol communication slave board is specifically a UART communication slave board, and the first protocol conversion adapter is specifically a UART-I3C conversion adapter.

10. The I3C bus-based communication apparatus of claim 9, wherein the second protocol slave device comprises an SPI slave device, the second bus comprises a second SPI bus; the second conversion bridge is specifically an I3C-SPI conversion bridge, the second protocol communication mainboard is specifically an SPI communication mainboard, and the second protocol conversion adapter is specifically an I3C-SPI conversion adapter.