CN210628294U - High-performance chip - Google Patents
High-performance chip Download PDFInfo
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- CN210628294U CN210628294U CN201922193671.5U CN201922193671U CN210628294U CN 210628294 U CN210628294 U CN 210628294U CN 201922193671 U CN201922193671 U CN 201922193671U CN 210628294 U CN210628294 U CN 210628294U
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- outer shell
- chip
- heat dissipation
- graphene
- shell body
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Abstract
The utility model provides a high-performance chip, which comprises an outer shell, two chips and two cover plates, wherein the outer shell is provided with a placing cavity, the two chips are respectively arranged in the placing cavity along the length direction of the outer shell, one cover plate is covered on one end surface of the outer shell, the other cover plate is covered on the other end surface of the outer shell, the high-performance chip also comprises two graphene radiating fins and two graphene substrates, the top plane and the bottom plane of the outer shell are provided with a plurality of radiating holes, one graphene radiating fin is fixed on the top plane of the outer shell, and the other graphene radiating fin is fixed on the bottom plane; one of them graphite alkene base plate sets up respectively between the lower surface at shell body top and a chip, and another graphite alkene base plate sets up respectively between the upper surface of shell body bottom and another chip, and the graphite alkene fin passes through the louvre and sets up rather than adjacent graphite alkene base plate relatively. Compared with the prior art, the utility model, ensured the high-efficient operation of chip, increase of service life.
Description
Technical Field
The utility model relates to a high performance chip.
Background
At present, in prior art, there is a chip, including shell body, two chips and two apron, the shell body has places the chamber, and two chips set up in placing the chamber along shell body length direction respectively, and one of them apron lid fits a shell body terminal surface, and another apron lid fits another terminal surface of shell body. It has the problems that: the performance of the chip is reduced due to the temperature rise after the chip works, the chip cannot run efficiently, and the service life is shortened.
Therefore, the utility model provides a high performance chip.
SUMMERY OF THE UTILITY MODEL
In view of the above-mentioned problem that prior art exists, the utility model aims to provide a high performance chip has ensured the high-efficient operation of chip, increase of service life.
The purpose of the utility model can be realized by the following technical proposal:
a high-performance chip comprises an outer shell, two chips and two cover plates, wherein the outer shell is provided with a placing cavity, the two chips are respectively arranged in the placing cavity along the length direction of the outer shell, one cover plate covers one end face of the outer shell, the other cover plate covers the other end face of the outer shell, the high-performance chip also comprises two graphene radiating fins and two graphene substrates, a plurality of radiating holes are formed in the top plane and the bottom plane of the outer shell, one graphene radiating fin is fixed on the top plane of the outer shell, and the other graphene radiating fin is fixed on the bottom plane of the outer shell; one of them graphite alkene base plate sets up respectively between the lower surface at shell body top and a chip, and another graphite alkene base plate sets up respectively between the upper surface of shell body bottom and another chip, and the graphite alkene fin passes through the louvre and sets up rather than adjacent graphite alkene base plate relatively.
As the preferred technical scheme, the number of the heat dissipation holes in the top plane of the outer shell and the number of the heat dissipation holes in the bottom plane of the outer shell are five respectively, the five heat dissipation holes in the top plane of the outer shell are arranged at intervals along the length direction of the outer shell at equal intervals respectively, and the five heat dissipation holes in the bottom plane of the outer shell are arranged at intervals along the length direction of the outer shell at equal intervals respectively.
As a preferred technical solution, the graphene heat sink and the graphene substrate are both flat.
As a preferred technical scheme, the outer shell is in a hollow column shape, and two end faces of the outer shell are in a hexagon shape.
As described above, the utility model relates to a high performance chip has following beneficial effect:
after the high-performance chip is utilized, compared with the prior art, the utility model is provided with two graphene radiating fins and two graphene substrates, and is provided with a plurality of radiating holes by combining the top plane and the bottom plane of the outer shell; due to the adoption of the structure, the heat generated after the chip works can be conducted to the graphene radiating fin through the graphene substrate and the radiating holes which are in contact with the chip, so that the performance of the chip arranged in the placing cavity is prevented from being reduced due to high temperature, the efficient operation of the chip is ensured, and the service life is prolonged.
The present invention will be further described with reference to the following embodiments.
Drawings
FIG. 1 is a perspective view of a high performance chip;
FIG. 2 is a front view of a high performance chip;
FIG. 3 is an enlarged cross-sectional view taken along line A-A of a high performance chip;
FIG. 4 is a side view of a high performance chip;
fig. 5 is an enlarged view of a section B-B of fig. 4.
Detailed Description
The following description is provided for illustrative purposes, and other advantages and features of the present invention will become apparent to those skilled in the art from the following detailed description.
It should be understood that the structures, ratios, sizes, etc. shown in the drawings of the present application are only used for matching with the contents disclosed in the specification, so as to be known and read by those skilled in the art, and are not used for limiting the limit conditions that the present invention can be implemented, so that the present invention has no technical essential meaning, and any modification of the structures, change of the ratio relationship or adjustment of the sizes should still fall within the scope of the present invention without affecting the functions and the achievable purposes of the present invention. Meanwhile, the terms such as "upper", "lower", "left", "right", "middle" and "one" used in the present specification are for convenience of description only, and are not intended to limit the scope of the present invention, and changes or adjustments of the relative relationship thereof are considered as the scope of the present invention without substantial changes in the technical content. The specific structure can be explained with reference to the drawings of the patent application.
In the following embodiments, the direction is defined by the arrow in fig. 1, the left side of the paper surface is the left direction, the right side of the paper surface is the right direction, the upper side of the paper surface is the upper direction, the lower side of the paper surface is the lower direction, the front side perpendicular to the paper surface is the front direction, the rear side perpendicular to the paper surface is the rear direction, the housing chamber of the outer case is the inside, and the outer wall of the outer case is the outside.
Referring to fig. 1 to 5, a high-performance chip includes an outer shell 1, two chips 2, two cover plates 3, wherein the outer shell 1 has a placing cavity 10, the two chips 2 are respectively disposed in the placing cavity 10 along a length direction of the outer shell 1, one of the cover plates 3 covers an end surface of the outer shell 1, the other cover plate 3 covers the other end surface of the outer shell 1, the high-performance chip further includes two graphene heat dissipation fins 4 and two graphene substrates 5, a plurality of heat dissipation holes 11 are disposed on a top plane and a bottom plane of the outer shell 1, one of the graphene heat dissipation fins 4 is fixed on the top plane of the outer shell 1, and the other graphene heat dissipation fin 4 is fixed on the bottom plane of;
one of them graphite alkene base plate 5 sets up respectively between the lower surface at shell body 1 top and a chip 2, and another graphite alkene base plate 5 sets up respectively between the upper surface of shell body 1 bottom and another chip 2, and graphite alkene fin 4 sets up rather than adjacent graphite alkene base plate 5 relatively through louvre 11.
It should be noted that: compared with the prior art, the utility model is provided with a plurality of heat dissipation holes 11 by arranging two graphene heat dissipation sheets 4 and two graphene substrates 5 and combining the top plane and the bottom plane of the outer shell 1 as shown in figures 1 to 5; due to the adoption of the structure, the heat generated after the chip 2 works can be conducted to the graphene radiating fin 4 through the graphene substrate 5 and the radiating hole 11 which are in contact with the chip 2, so that the performance of the chip 2 arranged in the placing cavity 10 is prevented from being reduced due to high temperature, the efficient operation of the chip 2 is ensured, and the service life is prolonged.
Referring to fig. 4 and 5, the number of the heat dissipation holes 11 located in the top plane of the outer casing 1 and the number of the heat dissipation holes 11 located in the bottom plane of the outer casing 1 are five, the five heat dissipation holes 11 located in the top plane of the outer casing 1 are arranged at intervals along the length direction of the outer casing 1, and the five heat dissipation holes 11 located in the bottom plane of the outer casing 1 are arranged at intervals along the length direction of the outer casing 1. It should be noted that: the number of the heat dissipation holes can be selected according to actual needs, and is not limited to five.
As shown in fig. 3 and 5, the graphene heat dissipation sheet 4 and the graphene substrate 5 are both flat.
Referring to fig. 3, the outer shell 1 is a hollow cylinder, and two end faces of the outer shell 1 are both hexagonal.
As described above, the utility model relates to a high performance chip has following beneficial effect:
after the high-performance chip is utilized, compared with the prior art, the utility model is provided with two graphene radiating fins and two graphene substrates, and is provided with a plurality of radiating holes by combining the top plane and the bottom plane of the outer shell; due to the adoption of the structure, the heat generated after the chip works can be conducted to the graphene radiating fin through the graphene substrate and the radiating holes which are in contact with the chip, so that the performance of the chip arranged in the placing cavity is prevented from being reduced due to high temperature, the efficient operation of the chip is ensured, and the service life is prolonged.
To sum up, the utility model discloses various shortcomings in the prior art have effectively been overcome and high industry value has.
The above embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (4)
1. The utility model provides a high performance chip, includes shell body, two chips and two apron, and the shell body has places the chamber, and two chips set up in placing the chamber along shell body length direction respectively, and one of them apron lid fits a shell body terminal surface, and another apron lid fits another terminal surface of shell body, its characterized in that: the heat dissipation structure comprises an outer shell, and is characterized by further comprising two graphene heat dissipation fins and two graphene substrates, wherein a plurality of heat dissipation holes are formed in the top plane and the bottom plane of the outer shell, one graphene heat dissipation fin is fixed on the top plane of the outer shell, and the other graphene heat dissipation fin is fixed on the bottom plane of the outer shell; one of them graphite alkene base plate sets up respectively between the lower surface at shell body top and a chip, and another graphite alkene base plate sets up respectively between the upper surface of shell body bottom and another chip, and the graphite alkene fin passes through the louvre and sets up rather than adjacent graphite alkene base plate relatively.
2. The high performance chip of claim 1, wherein: the number of the heat dissipation holes in the top plane of the outer shell and the number of the heat dissipation holes in the bottom plane of the outer shell are five respectively, the five heat dissipation holes in the top plane of the outer shell are arranged at intervals along the length direction of the outer shell at equal intervals, and the five heat dissipation holes in the bottom plane of the outer shell are arranged at intervals along the length direction of the outer shell at equal intervals.
3. The high performance chip of claim 1 or 2, wherein: the graphene radiating fins and the graphene substrate are both flat.
4. The high performance chip of claim 1 or 2, wherein: the shell body is in a hollow column shape, and two end faces of the shell body are in a hexagon shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922193671.5U CN210628294U (en) | 2019-12-10 | 2019-12-10 | High-performance chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922193671.5U CN210628294U (en) | 2019-12-10 | 2019-12-10 | High-performance chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210628294U true CN210628294U (en) | 2020-05-26 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922193671.5U Active CN210628294U (en) | 2019-12-10 | 2019-12-10 | High-performance chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112530876A (en) * | 2020-12-22 | 2021-03-19 | 江西龙芯微科技有限公司 | Integrated circuit SIP packaging structure |
-
2019
- 2019-12-10 CN CN201922193671.5U patent/CN210628294U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112530876A (en) * | 2020-12-22 | 2021-03-19 | 江西龙芯微科技有限公司 | Integrated circuit SIP packaging structure |
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