CN210536507U - Multi-path power supply voltage rapid discharge circuit - Google Patents
Multi-path power supply voltage rapid discharge circuit Download PDFInfo
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- CN210536507U CN210536507U CN201921023959.1U CN201921023959U CN210536507U CN 210536507 U CN210536507 U CN 210536507U CN 201921023959 U CN201921023959 U CN 201921023959U CN 210536507 U CN210536507 U CN 210536507U
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Abstract
The utility model relates to a multichannel mains voltage quick discharge circuit, include: the power supply management chip outputs a level signal to control the conduction of the control circuit, and the control circuit outputs a control signal to the first discharge circuit; the first end of the switch circuit is connected with the power management chip, and the power management chip outputs a level signal to control the switch circuit to be switched on and switched off; the second end of the first discharging circuit is connected with the second end of the switching circuit, and when the switching circuit is conducted, the first discharging circuit discharges through the switching circuit; the first discharge circuit includes a plurality of power supply circuits. The utility model provides a technical scheme all discharges through a switch circuit with all power supply circuit for electronic component's quantity significantly reduces, consequently saves the space that occupies the circuit board, makes the product miniaturized.
Description
Technical Field
The utility model relates to a protection circuit especially relates to a multichannel mains voltage quick discharge circuit.
Background
When Arria 10 FPGA is powered down, the discharge circuit respectively controls the power supply rails of each group of FPGA to be powered down in sequence through the power supply management chip, and simultaneously respectively controls mos tubes to be conducted in sequence, and rapid discharge is carried out through the high-power resistor.
When the FPGA discharges, each power rail needs a set of mos transistor and high-power resistor to discharge, and the volume of the high-power resistor is relatively large, so that a plurality of high-power resistors occupy a large space of a PCB (Printed Circuit Board), resulting in a large chip volume.
Therefore, it is desirable to provide a fast discharging circuit with multiple power supply voltages to solve the deficiencies of the prior art.
SUMMERY OF THE UTILITY MODEL
In order to solve the problems in the prior art, the utility model provides a multichannel mains voltage discharge circuit fast, through the structure of optimizing circuit, reduces electronic component to save the space that occupies the circuit board, make the product miniaturized.
The utility model provides a multichannel mains voltage quick discharge circuit, include: a control circuit, a switch circuit and a first discharge circuit,
the first end of the control circuit is connected with a power management chip, the second end of the control circuit is connected with the first end of the first discharge circuit, the power management chip outputs a level signal to control the conduction of the control circuit, and the control circuit outputs a control signal to the first discharge circuit;
the first end of the switch circuit is connected with the power management chip, and the power management chip outputs a level signal to control the switch circuit to be switched on and switched off;
the second end of the first discharging circuit is connected with the second end of the switch circuit, and when the switch circuit is conducted, the first discharging circuit discharges through the switch circuit; the first discharge circuit includes a plurality of power supply circuits.
Further, the control circuit includes: a first control circuit and a second control circuit,
the input end of the first control circuit is connected with the power management chip, and the output end of the first control circuit is connected with the reset input end of the circuit board;
the input end of the second control circuit is connected with the power management chip, and the output end of the second control circuit is connected with the first end of the first discharge circuit.
Further, the first control circuit includes: a first switching device for switching the first switching element,
the first end of the first switching device is connected with the power management chip, the second end of the first switching device is connected with the reset output end of the circuit board, and the third end of the first switching device is grounded;
the first switching device is used for inverting the signal output by the power management chip and controlling the reset input end of the circuit board through the inverted signal.
Further, the second control circuit includes a plurality of sub-control circuits connected in parallel;
the number of the sub-control circuits of the second control circuit is equal to the number of the power supply circuits of the first discharge circuit.
Further, any one of the sub-control circuits of the second control circuit includes: a second switching device for switching the first switching device,
the first end of the second switching device is connected with the power management chip, the second end of the second switching device is connected with the first end of the first discharge circuit, and the third end of the second switching device is grounded;
and the second switching device is used for inverting the signal output by the power management chip and controlling the first discharging circuit through the inverted signal.
Further, the switching circuit includes: a third switching device and a first resistor,
the first end of the third switching device is connected with the power management chip, the second end of the third switching device is connected with the second end of the first discharge circuit, and the third end of the third switching device is connected with one end of the first resistor;
the other end of the first resistor is grounded.
Further, any one of the power supply circuits of the first discharge circuit includes: a fourth switching device and a second resistor,
the first end of the fourth switching device is respectively connected with the second end of the control circuit and one end of the second resistor, the second end of the fourth switching device is connected with the second end of the switching circuit, and the third end of the fourth switching device is connected with the power management chip;
the other end of the second resistor is grounded.
Further, the fast discharge circuit further includes: a time-delay circuit is arranged in the circuit,
and the first end of the delay circuit is connected with the power management chip, and the second end of the delay circuit is connected with the third end of the first discharge circuit.
Further, the delay circuit includes: a third resistor and a first capacitor, wherein the third resistor is connected with the first capacitor,
one end of the third resistor is connected with the power management chip, and the other end of the third resistor is respectively connected with a third end of the first discharge circuit and one end of the first capacitor;
the other end of the first capacitor is grounded.
Further, the fast discharge circuit further includes: a second discharge circuit for discharging the first discharge voltage,
the first end of the second discharge circuit is connected with the power supply terminal, and the second end of the second discharge circuit is grounded;
the second discharge circuit comprises a second capacitor and a third capacitor which are connected in parallel, one end of the second capacitor is connected with the power supply terminal, and the other end of the second capacitor is grounded.
The utility model provides a technical scheme compares with closest prior art and has following advantage:
the utility model provides a technical scheme includes control circuit, switch circuit and first discharge circuit, and control circuit generates the first discharge circuit of control signal control according to the level signal of power management chip, and switch circuit carries out the switching according to the level signal of power management chip, and when switch circuit switched on, first discharge circuit discharged through switch circuit, and first discharge circuit includes many power supply circuit. The utility model provides a technical scheme is when the circuit board outage, and many power supply circuit of first discharge circuit all can discharge through switch circuit, and all power supply circuit all discharge through a switch circuit for electronic component's quantity significantly reduces, consequently sparingly occupies the space of circuit board, makes the product miniaturized.
Drawings
Fig. 1 is a block diagram of a multi-path power supply voltage fast discharging circuit provided by an embodiment of the present invention;
fig. 2 is a schematic diagram of a detailed structure of a multi-path power voltage fast discharging circuit provided in an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
As shown in fig. 1, the utility model provides a multichannel mains voltage fast discharge circuit, this fast discharge circuit includes: the control circuit comprises a switching circuit and a first discharging circuit.
The first end of the control circuit is connected with the power management chip, the second end of the control circuit is connected with the first end of the first discharge circuit, the power management chip outputs a level signal to control the conduction of the control circuit, and the control circuit outputs a control signal to the first discharge circuit.
The first end of the switch circuit is connected with the power management chip, and the power management chip outputs a level signal to control the switch circuit to be switched on and switched off.
The second end of the first discharging circuit is connected with the second end of the switch circuit, and when the switch circuit is conducted, the first discharging circuit discharges through the switch circuit.
Wherein the first discharge circuit includes a plurality of power supply circuits.
Further, the control circuit includes: a first control circuit and a second control circuit.
The input end of the first control circuit is connected with the power management chip, and the output end of the first control circuit is connected with the reset input end of the circuit board. The input end of the second control circuit is connected with the power management chip, and the output end of the second control circuit is connected with the first end of the first discharge circuit.
Specifically, the first control circuit includes a first switching device.
The first end of the first switching device is connected with the power management chip, the second end of the first switching device is connected with the reset output end of the circuit board, and the third end of the first switching device is grounded.
The second control circuit includes a plurality of sub-control circuits connected in parallel. Each sub-control circuit includes: and the first end of the second switching device is connected with the power management chip, the second end of the second switching device is connected with the first end of the first discharge circuit, the third end of the second switching device is grounded, and the second switching device is used for inverting the signal output by the power management chip and controlling the first discharge circuit through the inverted signal.
The number of the sub-control circuits of the second control circuit is equal to the number of the power supply circuits of the first discharge circuit.
Further, the switching circuit includes: a third switching device and a first resistor.
The first end of the third switching device is connected with the power management chip, the second end of the third switching device is connected with the first discharge circuit, and the third end of the third switching device is connected with one end of the first resistor; the other end of the first resistor is grounded.
Further, any one of the power supply circuits of the first discharge circuit includes: a fourth switching device and a second resistor.
The first end of the fourth switching device is respectively connected with the second end of the control circuit and one end of the second resistor, the second end of the fourth switching device is connected with the second end of the switching circuit, and the third end of the fourth switching device is connected with the power management chip; the other end of the second resistor is grounded.
Further, the fast discharge circuit further includes: a delay circuit.
The first end of the delay circuit is connected with the power management chip, and the second end of the delay circuit is connected with the third end of the first discharge circuit.
Specifically, the delay circuit includes: a third resistor and a first capacitor.
One end of the third resistor is connected with the power management chip, and the other end of the third resistor is respectively connected with the third end of the first discharge circuit and one end of the first capacitor; the other end of the first capacitor is grounded.
Further, the fast discharge circuit further includes: a second discharge circuit.
The second discharge circuit has a first end connected to the power supply terminal and a second end grounded.
Specifically, the second discharge circuit includes: and the second capacitor and the third capacitor are connected in parallel. One end of the second capacitor is connected to the power supply terminal, and the other end is grounded.
More specifically, as shown in fig. 2, a detailed structure diagram of a multi-power-supply-voltage fast discharging circuit is shown.
The first control circuit specifically includes: the first switch device D1 has a first terminal connected to the level signal output terminal of the power management chip, a second terminal connected to the reset output (RSTB) terminal and the start-up loading input signal (NCONFIG) terminal of the circuit board, and a third terminal connected to ground.
The second control circuit specifically comprises five sub-control circuits connected in parallel, namely a first sub-control circuit, a second sub-control circuit, a third sub-control circuit, a fourth sub-control circuit and a fifth sub-control circuit.
Specifically, the first sub-control circuit includes a switching device D2, a first end of which is connected to the level signal output terminal of the power management chip, a second end of which is connected to the first end of the power circuit having the power terminal of the first discharge circuit at 1.03V, and a third end of which is grounded.
After receiving the high level signal output by the power management chip, the switching device D2 outputs a low level to the first end of the power circuit with the power terminal of the first discharge circuit being 1.03V, so that the 1.03V power supply is powered off, and the power circuit enters a discharge mode.
The second sub-control circuit comprises a switching device D3, wherein a first end of the switching device D3 is connected with a level signal output terminal of the power management chip, a second end of the switching device D3 is connected with a first end of a power circuit of which the power supply terminal of the first discharge circuit is 1.8V, and a third end of the switching device D3 is grounded.
After receiving the high level signal output by the power management chip, the switching device D3 outputs a low level to the first end of the power circuit whose power terminal of the first discharge circuit is 1.8V, so that the 1.8V power supply is powered off, and the circuit enters a discharge mode.
The third sub-control circuit comprises a switching device D4, wherein a first end of the switching device D4 is connected with a level signal output terminal of the power management chip, a second end of the switching device D4 is connected with a first end of a power circuit of which the power supply terminal of the first discharge circuit is 2.5V, and a third end of the switching device D4 is grounded.
After receiving the high level signal output by the power management chip, the switching device D4 outputs a low level to the first end of the power circuit with the power terminal of the first discharge circuit being 2.5V, so that the 2.5V power supply is powered off, and the circuit enters a discharge mode.
The fourth sub-control circuit comprises a switching device D5, wherein a first end of the switching device D5 is connected with a level signal output terminal of the power management chip, a second end of the switching device D5 is connected with a first end of a power circuit of which the power supply terminal of the first discharge circuit is 3.3V, and a third end of the switching device D5 is grounded.
After receiving the high level signal output by the power management chip, the switching device D5 outputs a low level to the first end of the power circuit with the power terminal of the first discharge circuit being 3.3V, so that the 3.3V power supply is powered off, and the circuit enters a discharge mode.
The fifth sub-control circuit comprises a switching device D6, wherein a first end of the switching device D6 is connected with a level signal output terminal of the power management chip, a second end of the switching device D6 is connected with a first end of a power circuit of which the power supply terminal of the first discharge circuit is 1.2V, and a third end of the switching device D6 is grounded.
After receiving the high level signal output by the power management chip, the switching device D6 outputs a low level signal to the first end of the power circuit with the power terminal of the first discharge circuit being 1.2V, so that the 1.2V power supply is disconnected, and the circuit enters a discharge mode.
It should be noted that, when the power supply of the circuit board main body is cut off, the power supply management chip outputs a high level signal; when the main body power is restored, a low level signal is output. The output signal of the power management chip is F _ DISCHARGE _ EN in the figure.
The switching circuit specifically includes: a third switching device Q1 and a first resistor R1.
Specifically, a first terminal of the third switching device Q1 is connected to a level signal output terminal of the power management chip, a second terminal is connected to a second terminal of the first discharge circuit, and a third terminal is connected to one terminal of the first resistor R1; the other end of the first resistor R1 is connected to ground.
The third switching device Q1 is turned on after receiving the high level signal output by the power management chip, and at this time, the first discharging circuit can discharge on the first resistor R1 through the third switching device Q1.
More specifically, the first resistor R1 can be selected from 0.5-1 ohm, a package above 2512 and a resistor above 1W rated power.
The first discharge circuit specifically includes: the same number of power supply circuits as the control circuit, namely five power supply circuits. Namely the above-mentioned 1.03V power supply circuit, 1.8V power supply circuit, 2.5V power supply circuit, 3.3V power supply circuit, and 1.2V power supply circuit.
The number of sub-control circuits of the second control circuit is equal to the number of first discharge circuits.
Specifically, the 1.03V power supply circuit includes: a switching device Q6 and a resistor R6.
The first terminal of the switching device Q6 is connected to the second terminal of the first sub-control circuit of the control circuit and one terminal of the resistor R6, respectively, the second terminal is connected to the second terminal of the third switching device Q1 of the switching circuit, and the third terminal is connected to the level signal output terminal of the power management chip.
After receiving the output signal of the first control sub-circuit of the control circuit, the 1.03V power supply circuit is cut off, the diode inside the switching device Q6 is turned on, and the energy stored in the power supply circuit is discharged on the first resistor R1 of the switching circuit through the diode of the switching device Q6.
Based on the same working principle, the structures and the conduction discharge principles of the 1.8V power circuit, the 2.5V power circuit, the 3.3V power circuit and the 1.2V power circuit are the same, and are not described again here.
In the present application, each switching device may be a MOS transistor, or may be another device having a switching function. In fig. 2, an N-channel type MOS transistor is used.
The MOS pipe is metal (metal), oxide, semiconductor (semiconductor) field effect transistor, has the advantage that input impedance is high, the noise is low, thermal stability is good, and the MOS pipe plays the effect of switch in the quick discharge circuit that this application provided.
More specifically, the switching devices Q2 to Q6 of each power supply circuit of the first discharge circuit function such that when the switching device Q1 is turned on, the power supply voltages of the sources (i.e., the S-poles) of Q2 to Q6 sequentially pass through the diodes inside the corresponding switching devices (i.e., MOS transistors) from high to low to perform on-discharge, and when the circuit board is operating normally, the MOS transistors are turned off and do not perform discharge.
The delay circuit specifically includes: a third resistor R7 and a first capacitor C1.
Specifically, one end of the third resistor R7 is connected to the level signal output terminal of the power management chip, and the other ends are respectively connected to the third ends of the first discharge circuit (i.e., the third ends of the switching devices in the respective power circuits of the third circuit in the figure); the other terminal of the first capacitor C1 is connected to ground.
The RC circuit formed by the third resistor R7 and the first capacitor C1 has the function of enabling the Q2-Q6 to be conducted after a certain time delay. The aim is to avoid the following situations: if the F _ DISCHARGE _ EN signal becomes high, Q2-Q6 are immediately conducted, at the moment, the power supply voltage of each S pole in Q2-Q6 is connected with the drain (namely D pole), and the voltages are connected together without discharging, so that short circuit is caused, and the low-voltage pin of the FPGA is damaged. After a time delay, each power supply voltage has been partially discharged through the diode inside its MOS tube, so that each power supply voltage becomes a uniform lower voltage value. After the delay, Q2 to Q6 are all turned on, and the final residual voltages are all discharged together. The RC device takes a value which meets the requirement of 30-50 milliseconds of time delay.
The second discharge circuit specifically includes: a second capacitor C2 and a third capacitor C3 connected in parallel.
Specifically, one end of the second capacitor C2 is connected to the power supply terminal of 0.9V, and the other end is grounded.
After the discharge of each power supply circuit in the first discharge circuit is finished, the second discharge circuit can keep longer due to the energy storage of the capacitor, so that the requirement of the last power supply voltage discharge is met, and finally the power-off and power-down sequence protection of the whole circuit board is realized.
More specifically, the operating principle of the entire circuit is as follows:
when the power supply of the circuit board main body is cut off, the power management chip outputs a high-level signal of a trigger signal F _ DISCHARGE _ EN, so that the switching devices D1-D6 are switched on, the reset signal (namely RSTB) of the circuit board is changed into a low-level signal, and the circuit board enters a reset state. The enable signal of the power supply chip corresponding to each power supply voltage also becomes low level, so that each power supply chip stops outputting the power supply voltage. At this time, each power supply circuit does not immediately power down due to the fact that more capacitors are arranged on the board for storing energy, and needs to be discharged through the quick discharge circuit.
The Q1 is turned on, the 3.3V power circuit is first discharged through the diode in the switching device Q3, and since the forward voltage of the diode after being turned on is 0.8V, the voltage across the high power resistor R1 is about 2.5V, and the instantaneous discharge current reaches 5A. R1 can withstand 30W of instantaneous power consumption in 100 milliseconds, so the 5A current has no problem. And the D pole voltage of Q1 drops rapidly in the discharge process, when the D pole voltage drops to 1.7V, the voltage in the 2.5V power supply circuit also begins to discharge through the diode in the switching device Q4, then the voltage in the 1.8V, 1.2V and 1.03V power supply circuits sequentially discharges through the diodes in the respective switching devices, when the D pole voltage of Q1 drops to 0V, the voltage below 0.8V still exists in each power supply circuit, the discharge current will gradually decrease until the diodes in the respective switching devices are not conducted, and the discharge current becomes 0.
After about 30ms has elapsed since F _ DISCHARGE _ EN became high, the remaining voltage DISCHARGE enable signal ALL _ DISC _ EN is charged by R7 and C1 and becomes high, so that the switching devices Q2 to Q6 are turned on, and the remaining voltage (less than 0.8V) of each power supply circuit is completely discharged. The whole discharging time is about 30 milliseconds approximately, and at the moment, the 0.9V power circuit needing to be powered off can keep longer events due to the stored energy of the capacitor, so that the discharging requirement of the last power circuit is met, and the power-off and power-down sequential protection of the whole circuit board is finally realized.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (10)
1. A multi-supply voltage fast discharge circuit, comprising: a control circuit, a switch circuit and a first discharge circuit,
the first end of the control circuit is connected with a power management chip, the second end of the control circuit is connected with the first end of the first discharge circuit, the power management chip outputs a level signal to control the conduction of the control circuit, and the control circuit outputs a control signal to the first discharge circuit;
the first end of the switch circuit is connected with the power management chip, and the power management chip outputs a level signal to control the switch circuit to be switched on and switched off;
the second end of the first discharging circuit is connected with the second end of the switch circuit, and when the switch circuit is conducted, the first discharging circuit discharges through the switch circuit; the first discharge circuit includes a plurality of power supply circuits.
2. The multi-supply voltage fast discharge circuit of claim 1, wherein the control circuit comprises: a first control circuit and a second control circuit,
the input end of the first control circuit is connected with the power management chip, and the output end of the first control circuit is connected with the reset input end of the circuit board;
the input end of the second control circuit is connected with the power management chip, and the output end of the second control circuit is connected with the first end of the first discharge circuit.
3. The multi-supply-voltage fast discharge circuit of claim 2, wherein the first control circuit comprises: a first switching device for switching the first switching element,
the first end of the first switching device is connected with the power management chip, the second end of the first switching device is connected with the reset output end of the circuit board, and the third end of the first switching device is grounded;
the first switching device is used for inverting the signal output by the power management chip and controlling the reset input end of the circuit board through the inverted signal.
4. The multiple power supply voltage fast discharge circuit according to claim 2, wherein the second control circuit comprises a plurality of sub-control circuits connected in parallel;
the number of the sub-control circuits of the second control circuit is equal to the number of the power supply circuits of the first discharge circuit.
5. The multiple power supply voltage fast discharge circuit according to claim 4, wherein any one of the sub-control circuits of the second control circuit comprises: a second switching device for switching the first switching device,
the first end of the second switching device is connected with the power management chip, the second end of the second switching device is connected with the first end of the first discharge circuit, and the third end of the second switching device is grounded;
and the second switching device is used for inverting the signal output by the power management chip and controlling the first discharging circuit through the inverted signal.
6. The multiple power supply voltage fast discharge circuit according to claim 1, wherein the switching circuit comprises: a third switching device and a first resistor,
the first end of the third switching device is connected with the power management chip, the second end of the third switching device is connected with the second end of the first discharge circuit, and the third end of the third switching device is connected with one end of the first resistor;
the other end of the first resistor is grounded.
7. The multiple power supply voltage fast discharge circuit according to claim 1, wherein any one of the power supply circuits of the first discharge circuit comprises: a fourth switching device and a second resistor,
the first end of the fourth switching device is respectively connected with the second end of the control circuit and one end of the second resistor, the second end of the fourth switching device is connected with the second end of the switching circuit, and the third end of the fourth switching device is connected with the power management chip;
the other end of the second resistor is grounded.
8. The multiple supply voltage fast discharge circuit of claim 1, further comprising: a time-delay circuit is arranged in the circuit,
and the first end of the delay circuit is connected with the power management chip, and the second end of the delay circuit is connected with the third end of the first discharge circuit.
9. The multiple power supply voltage fast discharge circuit of claim 8, wherein the delay circuit comprises: a third resistor and a first capacitor, wherein the third resistor is connected with the first capacitor,
one end of the third resistor is connected with the power management chip, and the other end of the third resistor is respectively connected with a third end of the first discharge circuit and one end of the first capacitor;
the other end of the first capacitor is grounded.
10. The multiple supply voltage fast discharge circuit of claim 1, further comprising: a second discharge circuit for discharging the first discharge voltage,
the first end of the second discharge circuit is connected with the power supply terminal, and the second end of the second discharge circuit is grounded;
the second discharge circuit comprises a second capacitor and a third capacitor which are connected in parallel, one end of the second capacitor is connected with the power supply terminal, and the other end of the second capacitor is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921023959.1U CN210536507U (en) | 2019-07-01 | 2019-07-01 | Multi-path power supply voltage rapid discharge circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921023959.1U CN210536507U (en) | 2019-07-01 | 2019-07-01 | Multi-path power supply voltage rapid discharge circuit |
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| Publication Number | Publication Date |
|---|---|
| CN210536507U true CN210536507U (en) | 2020-05-15 |
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| CN201921023959.1U Active CN210536507U (en) | 2019-07-01 | 2019-07-01 | Multi-path power supply voltage rapid discharge circuit |
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