CN210469235U - Dual-band reconfigurable radio frequency power amplifier - Google Patents
Dual-band reconfigurable radio frequency power amplifier Download PDFInfo
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Abstract
The utility model provides a two wave band restructural radio frequency power amplifier relates to the communication technology field. The system comprises an input port, an input matching circuit, a single-pole single-throw switch, a transistor, a biasing circuit, an output matching circuit and an output port. The control method comprises the following steps: the method comprises the steps of collecting a target signal to be amplified, converting the target signal into a target frequency band, then amplifying the converted signal, and meanwhile transmitting the converted and amplified signal into a signal receiving device. The utility model discloses combine together reconfigurable power amplifier and dual-frenquency matching network, increased the design degree of freedom, simplified circuit structure, solved the problem of matching circuit to reconfigurable power amplifier frequency channel interval restriction, circuit wholeness can show the promotion, has realized that the signal switches between two frequency channels of difference, can work at current mainstream communication frequency channel, has solved compatibility problem between each system, can utilize communication system's frequency spectrum resource more rationally.
Description
Technical Field
The utility model relates to the field of communication technology, especially, relate to a dual-band reconfigurable radio frequency power amplifier.
Background
With the advent of 5G communication, the frequency bands and standards of communication systems are increasing, and the demands on communication quality and capacity are also increasing. Communication systems need to be continually updated to accommodate multi-standard, multi-mode wireless communications. However, the conventional power amplifier has a single working standard, which limits the development of the communication industry. Therefore, a wireless communication system will develop towards intellectualization and diversification, and a reconfigurable theory as a key technology for realizing the intellectualization and diversification of the system means that a passive network is controlled by reconfigurable devices such as a switch and a variable capacitance device, so that a module can be reconfigured to realize different functions. The power amplifier is taken as a key module of a system, and the research on the reconfiguration of the power amplifier becomes a hotspot in the academic and industrial fields. However, the existing broadband power amplifier has different performance in the whole frequency band range and cannot cover more communication systems due to the limited bandwidth.
Compared with other dual-band power amplifiers, the dual-band reconfigurable power amplifier can independently work in two different frequency bands, has the advantages of intelligence, flexibility and reconfigurability, reduces the volume and the cost of multimode multi-band wireless communication equipment, relieves the problem of spectrum resource shortage, and has wider application prospect in the future 5G communication and other fields.
SUMMERY OF THE UTILITY MODEL
Not enough to prior art, the utility model provides a two wave band restructural radio frequency power amplifier. The utility model discloses combine together reconfigurable power amplifier and dual-frenquency matching network, increased the design degree of freedom, simplified circuit structure, solved the problem of matching circuit to reconfigurable power amplifier frequency channel interval restriction, circuit wholeness can show the promotion. The utility model discloses a signal switches between two frequency channels of difference, can work at current mainstream communication frequency channel, has solved compatibility problem between each system, can utilize communication system's frequency spectrum resource more rationally.
In order to solve the technical problem, the utility model discloses the technical scheme who takes is:
a dual-band reconfigurable radio frequency power amplifier comprises an input port, an input matching circuit, a single-pole single-throw switch, a stabilizing network, a transistor, a bias circuit, an output matching circuit, an output port and a trunk microstrip line;
the input port, the input matching circuit, the single-pole single-throw switch, the stabilizing network, the biasing circuit, the transistor, the output matching circuit and the output port are sequentially connected in series;
the input matching circuit comprises a main microstrip line and a capacitor, wherein a port P1 is connected with an input end of a microstrip line TL1, an output end of the microstrip line TL1 is connected with an input end of a capacitor C1, an output end of the capacitor C1 is connected with an input end of a T-shaped connector Tee1, an output end of the T-shaped connector Tee1 is connected with a capacitor C2 and ground, an output end of the T-shaped connector Tee1 is connected with an input end of a microstrip line TL2, an output end of the microstrip line TL2 is connected with an input end of a T-shaped connector Tee2, an output end of the T-shaped connector Tee2 is connected with a capacitor C3 and ground, an output end of the T-shaped connector Tee2 is connected with an input end of the microstrip line TL3, an output end of the microstrip line TL3 is connected with an input end of the T-shaped connector Tee3, an output end of the T-shaped connector Tee3 is connected with a capacitor C3, an output end of the microstrip line TL3 is connected with an input end, an inductor L1 is connected with an input end of a T-type connector Tee6, a middle end of the T-type connector Tee6 is connected with a capacitor C8 and ground, an output end of the T-type connector Tee 8 is connected with a resistor R8, the resistor R8 is connected with a power supply SRC 8 and ground, an output end of the T-type connector Tee 8 is connected with a PIN switch X8 and ground, an output end of the T-type connector Tee 8 is connected with an input end of a microstrip line TL 8, an output end of the microstrip line TL 8 is connected with the T-type connector Tee 8, an end of the T-type connector Tee 8 is connected with the capacitor C8, an output end of the microstrip line TL 8 is connected with an input end of the capacitor C8, an output end of the capacitor C8 is connected with an input end of the T-type connector Tee 8, an end of the T-type connector Tee 8 is connected with the inductor L8, an input end of the inductor L8 is connected with the T-type connector Tee 8, an output end of the resistor R8 and the resistor C8 is connected with the power supply SRC 8, and the ground, the, the output end of the T-shaped connector Tee5 is connected with the PIN switch X2 and the ground, the output end of the T-shaped connector Tee4 is connected with the input end of the TL5, and the output end of the microstrip line TL5 is connected with the port P2.
The single-pole single-throw switch is a lumped parameter structure based on PIN diodes and comprises two term ports, PIN diodes, capacitors C1 and C2 and a resistor R1; the single-pole single-throw switch is directly connected with the biasing circuit and the transistor in series; the input matching circuit realizes the switching function of two different frequency bands under the condition of keeping the main circuit microstrip line unchanged by opening and closing different single-pole single-throw switches;
an input port P1 of the stabilizing network is connected with an input end of a resistor R3 connected with a capacitor C10 in parallel, an output end of the resistor R3 connected with the capacitor C10 in parallel is connected with an input end of a T-shaped connector Tee9, the middle end of the T-shaped connector Tee9 is connected with a capacitor C11 and the ground, and an output end of the T-shaped connector Tee9 is connected with an output P2 of the stabilizing network.
The transistor is sequentially connected with the bias circuit and the output matching circuit in series;
the bias circuit comprises a microstrip line TL-TL, fan-shaped microstrip lines Stub and Stub, microstrip lines Taper and Stub, ports P, P and a connecting microstrip line, the design parts are connected in series in sequence, the port P is connected with the input end of the microstrip line TL, the output end of the microstrip line TL is connected with an arc-shaped connector Curve, the arc-shaped connector Curve is connected with the microstrip line TL, the microstrip line TL is connected with the fan-shaped microstrip line Stub, the fan-shaped microstrip line Stub is connected with the microstrip line TL, the microstrip line TL is connected with the input end of the microstrip line Taper, the microstrip line Taper is connected with the middle end of a T-shaped connector Tee, the input end of the T-shaped connector Tee is connected with an input matching circuit, the output end of the T-shaped connector Tee is connected with the grid of a power amplifier tube CGH40010, the drain of the power amplifier tube CH40010 is connected with the ground, the source of the power amplifier tube CH40010 is connected with the input end of the T-shaped connector Tee, the microstrip line is connected with the Taper, the microstrip line TL is connected with the microstrip, the fan-shaped microstrip line Stub2 is connected with a microstrip line TL14, the microstrip line TL14 is connected with an arc-shaped connector Curve2, the arc-shaped connector Curve2 is connected with a microstrip line TL15, and the microstrip line TL15 is connected with a port P2;
the output matching circuit is a dual-frequency matching network and comprises ports P1 and P2, a serial capacitor C12, microstrip lines TL16-TL25, a port P1 connected with a capacitor C12, a capacitor C12 connected with a microstrip line TL16, microstrip lines TL16 are respectively connected with microstrip lines TL17 and TL18 in series and then connected with the microstrip line TL19 in parallel and then connected with the microstrip line TL22 in series, the microstrip line TL18 is grounded, microstrip lines TL19 are connected with microstrip lines TL20 and TL21, microstrip lines TL21 are grounded, microstrip lines TL22 and TL23 are connected with the microstrip lines, microstrip lines TL23 and TL24 are connected with the microstrip lines TL25 in series after being connected with the microstrip lines TL24 in parallel, and microstrip lines TL 25;
the output port is adapted and connected with the output matching circuit;
the trunk microstrip line is respectively connected with the input port, the transistor and the bias circuit; and 5 capacitors are connected to the main circuit microstrip line.
Adopt the produced beneficial effect of above-mentioned technical scheme to lie in:
the utility model realizes the switching of signals between two different frequency bands, can work in the current main stream communication frequency band, solves the compatibility problem among various systems, and can more reasonably utilize the frequency spectrum resources of the communication system; through the construction of the single-pole single-throw switch, the design difficulty of the reconfigurable power amplifier and other radio frequency modules is reduced; the method of using single-pole single-throw switch to control the input matching circuit makes the matching network easy to realize; the double-frequency matching network is adopted as an output matching circuit, so that the efficiency of the whole power amplifier is improved; make the power amplifier easily realize and reach efficient purpose through above-mentioned design, be favorable to communication system's miniaturization and integration more simultaneously, the utility model relates to a rationally, easily realize, fine practical value has.
Drawings
FIG. 1 is a schematic structural diagram of a dual-band reconfigurable radio frequency power amplifier;
in the figure, 1-input port, 2-input matching circuit, 3-single-pole single-throw switch, 4-stable network, 5-transistor, 6-bias circuit, 7-output matching circuit, 8-output port and 9-main microstrip line;
FIG. 2 is a diagram of an exemplary input matching circuit
FIG. 3 is a circuit diagram of an embodiment of a single pole single throw switch;
FIG. 4 is a diagram showing simulation results of the single-pole single-throw switch in the embodiment;
FIG. 5 is a diagram of a stabilizing circuit in an embodiment;
FIG. 6 is a diagram of a bias circuit in an embodiment;
FIG. 7 is a diagram of an embodiment of an output matching circuit;
FIG. 8 is a flow chart of a method of controlling a dual band reconfigurable radio frequency power amplifier;
FIG. 9 is a diagram of a simulation result of 0.945GHz reconfigurable power amplifier performance in the embodiment;
in the figure: (a) gain, PAE curve, (b) output power curve;
FIG. 10 is a graph of simulation results of 2.6GHz reconfigurable power amplifier performance in the embodiment;
in the figure: (a) gain, PAE curves, and (b) output power curves.
Detailed Description
The following describes the embodiments of the present invention in detail with reference to the accompanying drawings.
A dual-band reconfigurable radio frequency power amplifier is shown in figure 1 and comprises an input port, an input matching circuit, a single-pole single-throw switch, a stabilizing network, a transistor, a bias circuit, an output matching circuit, an output port and a main line microstrip line;
the input port, the input matching circuit, the single-pole single-throw switch, the stabilizing network, the biasing circuit, the transistor, the output matching circuit and the output port are sequentially connected in series;
the input matching circuit comprises a main circuit microstrip line and a capacitor; in the input matching circuit of the present embodiment, as shown in fig. 2, a port P1 is connected to an input end of a microstrip line TL1, an output end of the microstrip line TL1 is connected to an input end of a capacitor C1, an output end of the capacitor C1 is connected to an input end of a T-type connector Tee1, an output end of the T-type connector Tee1 is connected to a capacitor C2 and ground, an output end of the T-type connector Tee1 is connected to an input end of a microstrip line TL2, an output end of the microstrip line TL2 is connected to an input end of a T-type connector Tee2, an output end of the T-type connector Tee2 is connected to a capacitor C3 and ground, an output end of the T-type connector Tee2 is connected to an input end of the microstrip line TL3, an output end of the microstrip line TL3 is connected to an input end of the T-type connector Tee3, an output end of the T-type connector Tee3 is connected to a capacitor C3, an output end of the microstrip line TL3 is connected to an inductor L3, an inductor L1 is connected with an input end of a T-type connector Tee6, a middle end of the T-type connector Tee6 is connected with a capacitor C8 and ground, an output end of the T-type connector Tee 8 is connected with a resistor R8, the resistor R8 is connected with a power supply SRC 8 and ground, an output end of the T-type connector Tee 8 is connected with a PIN switch X8 and ground, an output end of the T-type connector Tee 8 is connected with an input end of a microstrip line TL 8, an output end of the microstrip line TL 8 is connected with the T-type connector Tee 8, an end of the T-type connector Tee 8 is connected with the capacitor C8, an output end of the microstrip line TL 8 is connected with an input end of the capacitor C8, an output end of the capacitor C8 is connected with an input end of the T-type connector Tee 8, an end of the T-type connector Tee 8 is connected with the inductor L8, an input end of the inductor L8 is connected with the T-type connector Tee 8, an output end of the resistor R8 and the resistor C8 is connected with the power supply SRC 8, and the ground, the, the output end of a T-shaped connector Tee5 is connected with a PIN switch X2 and the ground, the output end of a T-shaped connector Tee4 is connected with the input end of TL5, and the output end of a microstrip line TL5 is connected with a port P2;
the single-pole single-throw switch in this embodiment is a lumped parameter structure based on PIN diodes, as shown in fig. 3, and the number of the lumped parameter structure is 2, and the lumped parameter structure includes two term ports, one PIN diode with the model of smp1322, two capacitors C1 and C2, and one resistor R1. The input matching circuit realizes the switching function of two different frequency bands under the condition of keeping the main circuit microstrip line unchanged by opening and closing different single-pole single-throw switches; the simulation result of the S parameter of the single-pole single-throw switch is shown in FIG. 4, and it can be seen from FIG. 4 that in three frequency bands of 0.945GHz and 2.6GHz, when the switch is switched on, the return loss S (1,1) is less than-11.5 dB, and the insertion loss S (2,1) is greater than-0.4 dB; when the switch is off, the return loss S (1,1) is greater than-0.3 dB, and the insertion loss S (2,1) is less than-12 dB. According to the simulation result, the utility model discloses a single-pole single-throw switch performance is better when switching on and breaking off, can satisfy the designing requirement.
As shown in FIG. 5, the port P1 is connected with the input end of a resistor R3 connected with the capacitor C10 in parallel, the output end of the resistor R3 connected with the capacitor C10 in parallel is connected with the input end of a T-shaped connector Tee9, the middle end of the T-shaped connector Tee9 is connected with the capacitor C11 and the ground, and the output end of the T-shaped connector Tee9 is connected with the port P2.
The transistor is sequentially connected with the bias circuit and the output matching circuit in series;
in the embodiment, as shown in fig. 6, the bias circuit includes microstrip lines TL10-TL15, sector microstrip lines Stub1 and Stub2, microstrip lines tper 2 and tper 2, ports P2, P2 and connecting microstrip lines, the design portions are sequentially connected in series, the port P2 is connected to an input end of the microstrip line TL2, an output end of the microstrip line TL2 is connected to the arc connector currve 2, the arc connector currve 2 is connected to the microstrip line TL2, the microstrip line TL2 is connected to the sector microstrip line Stub2, the sector microstrip line Stub2 is connected to the microstrip line TL2, the microstrip line TL2 is connected to the microstrip line tper 2, the microstrip line tper 2 is connected to an end of the T-type connector Tee2, an input end of the T-type connector Tee2 is connected to the power amplifier tube 2, the drain amplifier CH40010 is connected to the ground, the microstrip line Tee connector 40072 is connected to the microstrip line Tee2, the microstrip line Tee connector 2 is connected to the source electrode 40072, and the microstrip line Tee connector 2 is connected to the source electrode 40072, the microstrip line TL13 is connected with a fan-shaped microstrip line Stub1, the fan-shaped microstrip line Stub2 is connected with a microstrip line TL14, the microstrip line TL14 is connected with an arc-shaped connector Curve2, the arc-shaped connector Curve2 is connected with a microstrip line TL15, and the microstrip line TL15 is connected with a port P2. The effect obtained by setting Vhigh to 28V and Vlow to-2.5V is good through simulation debugging.
The output matching circuit is a double-frequency matching network; as shown in fig. 7, the output matching circuit in this embodiment adopts a method of combining a dual-frequency matching network and a microstrip line structure, so that the circuit structure is simplified, the simulation result is more accurate, and the efficiency of the whole power amplifier is improved. According to the obtained optimal load impedance value, a Smith chart in ADS simulation software is used for designing an output matching circuit, the output matching circuit comprises ports P1 and P2, a serial capacitor C12, microstrip lines TL16-TL25, a port P1 is connected with a capacitor C12, a capacitor C12 is connected with a microstrip line TL16, the microstrip line TL16 is connected with microstrip line TL17 and microstrip line TL18 in series and then connected with microstrip line TL19 in parallel, and then connected with microstrip line TL22 in series, the microstrip line TL18 is grounded, the microstrip line TL19 is connected with microstrip line TL20 and microstrip line TL21, the microstrip line TL21 is grounded, the microstrip line TL22 is connected with TL23 in series, the microstrip line TL23 is connected with microstrip line TL25 in series after being connected with microstrip line TL24 in parallel, and the microstrip line 25 is;
the output port is adapted and connected with the output matching circuit;
the trunk microstrip line is respectively connected with the input port, the transistor and the bias circuit; the trunk microstrip line is connected with 5 capacitors;
the utility model also provides a control method of the dual-band reconfigurable radio frequency power amplifier, which is realized by the dual-band reconfigurable radio frequency power amplifier; as shown in fig. 8, the method comprises the following steps:
step 1: a target signal to be amplified is connected to an input port and is transmitted into the trunk microstrip line;
step 2: converting a target signal into a target frequency band by controlling the single-pole single-throw switch;
and step 3: amplifying the converted signal through a transistor and a bias circuit;
and 4, step 4: the converted and amplified signal is transmitted out through an output port, and the frequency band switching and amplifying function of the signal to be amplified is completed;
this embodiment is right the utility model discloses gain, PAE and output's emulation is through "opening" and "the close" that whether insert external voltage to the PIN switch and control single-pole single-throw switch to change the mode of power amplifier. The performance simulation result when the mode "1" is 0.945GHz frequency and a large signal is input is shown in fig. 9, where the switch 1 is in the "on" state and the switch 2 is in the "off" state.
Fig. 9(a) is a graph showing the conversion of gain and PAE with input power, the small signal gain of the power amplifier is about 15dB, the increase of output power makes the power amplifier work in the saturation region, the gain compression phenomenon occurs, the gain curve begins to decrease, but no sudden drop occurs, when the input power is 29dBm, the corresponding gain is 13dB, and the PAE is 56.29%. Fig. 9(b) is a graph showing the output power of the power amplifier converted with the input power, and it can be seen that the output power can reach 42dBm when the input power is 29 dBm.
The simulation result of the mode "2" at the frequency of 2.6GHz is shown in fig. 10, and the switching state is opposite to the mode "1". As can be seen from the simulation results, fig. 10(a) is a graph of the gain and PAE along with the input power conversion, the small signal gain of the power amplifier is about 13dB, fig. 10(b) is a graph of the output power of the power amplifier along with the input power conversion, the corresponding output power can reach 40dBm when the input power is 29dBm, the PAE can reach 61.67%, the gain is about 11.05dB, and the gain fluctuation range is small. From the performance simulation result chart of the reconfigurable power amplifier, the working state of the power amplifier can be switched through the switch, and the reconfigurable power amplifier has excellent performance.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; but such modifications and substitutions do not depart from the spirit of the corresponding technical solutions and the scope of the present invention as defined in the appended claims.
Claims (1)
1. A dual band reconfigurable radio frequency power amplifier, characterized by: the circuit comprises an input port, an input matching circuit, a single-pole single-throw switch, a stabilizing network, a transistor, a biasing circuit, an output matching circuit, an output port and a trunk microstrip line;
the input port, the input matching circuit, the single-pole single-throw switch, the stabilizing network, the biasing circuit, the transistor, the output matching circuit and the output port are sequentially connected in series;
the input matching circuit comprises a main microstrip line and a capacitor, wherein a port P1 is connected with an input end of a microstrip line TL1, an output end of the microstrip line TL1 is connected with an input end of a capacitor C1, an output end of the capacitor C1 is connected with an input end of a T-shaped connector Tee1, an output end of the T-shaped connector Tee1 is connected with a capacitor C2 and ground, an output end of the T-shaped connector Tee1 is connected with an input end of a microstrip line TL2, an output end of the microstrip line TL2 is connected with an input end of a T-shaped connector Tee2, an output end of the T-shaped connector Tee2 is connected with a capacitor C3 and ground, an output end of the T-shaped connector Tee2 is connected with an input end of the microstrip line TL3, an output end of the microstrip line TL3 is connected with an input end of the T-shaped connector Tee3, an output end of the T-shaped connector Tee3 is connected with a capacitor C3, an output end of the microstrip line TL3 is connected with an input end, the inductor L is connected with the input end of a T-shaped connector Tee, the middle end of the T-shaped connector Tee is connected with a capacitor C and ground, the output end of the T-shaped connector Tee is connected with a resistor R, the resistor R is connected with a power supply SRC and ground, the output end of the T-shaped connector Tee is connected with a PIN switch X and ground, the output end of the T-shaped connector Tee is connected with the input end of a microstrip line TL, the output end of the microstrip line TL is connected with the T-shaped connector Tee, the middle end of the T-shaped connector Tee is connected with the capacitor C, the capacitor C is connected with the input end of the microstrip line TL, the output end of the microstrip line TL is connected with the input end of the T-shaped connector Tee, the middle end of the T-shaped connector Tee is connected with the inductor L, the inductor L is connected with the input end of the T-shaped connector Tee, the middle end of the T-shaped connector Tee is connected with the capacitor C and ground, the output end of the T-shaped connector Tee is connected with the resistor R, the resistor R is connected, the output end of the T-shaped connector Tee4 is connected with the input end of TL5, and the output end of the microstrip line TL5 is connected with a port P2;
the single-pole single-throw switch is a lumped parameter structure based on PIN diodes and comprises two term ports, PIN diodes, capacitors C1 and C2 and a resistor R1; the single-pole single-throw switch is directly connected with the biasing circuit and the transistor in series; the input matching circuit realizes the switching function of two different frequency bands under the condition of keeping the main circuit microstrip line unchanged by opening and closing different single-pole single-throw switches;
an input port P1 of the stabilizing network is connected with an input end of a resistor R3 connected with a capacitor C10 in parallel, an output end of the resistor R3 connected with a capacitor C10 in parallel is connected with an input end of a T-shaped connector Tee9, the middle end of the T-shaped connector Tee9 is connected with a capacitor C11 and the ground, and the output end of the T-shaped connector Tee9 is connected with an output port P2 of the stabilizing network;
the transistor is sequentially connected with the bias circuit and the output matching circuit in series;
the bias circuit comprises a microstrip line TL-TL, fan-shaped microstrip lines Stub and Stub, microstrip lines Taper and Stub, ports P, P and a connecting microstrip line, the design parts are connected in series in sequence, the port P is connected with the input end of the microstrip line TL, the output end of the microstrip line TL is connected with an arc-shaped connector Curve, the arc-shaped connector Curve is connected with the microstrip line TL, the microstrip line TL is connected with the fan-shaped microstrip line Stub, the fan-shaped microstrip line Stub is connected with the microstrip line TL, the microstrip line TL is connected with the input end of the microstrip line Taper, the microstrip line Taper is connected with the middle end of a T-shaped connector Tee, the input end of the T-shaped connector Tee is connected with an input matching circuit, the output end of the T-shaped connector Tee is connected with the grid of a power amplifier tube CGH40010, the drain of the power amplifier tube CH40010 is connected with the ground, the source of the power amplifier tube CH40010 is connected with the input end of the T-shaped connector Tee, the microstrip line is connected with the Taper, the microstrip line TL is connected with the microstrip, the fan-shaped microstrip line Stub2 is connected with a microstrip line TL14, the microstrip line TL14 is connected with an arc-shaped connector Curve2, the arc-shaped connector Curve2 is connected with a microstrip line TL15, and the microstrip line TL15 is connected with a port P2;
the output matching circuit is a dual-frequency matching network and comprises ports P1 and P2, a serial capacitor C12, microstrip lines TL16-TL25, a port P1 connected with a capacitor C12, a capacitor C12 connected with a microstrip line TL16, microstrip lines TL16 are respectively connected with microstrip lines TL17 and TL18 in series and then connected with the microstrip line TL19 in parallel and then connected with the microstrip line TL22 in series, the microstrip line TL18 is grounded, microstrip lines TL19 are connected with microstrip lines TL20 and TL21, microstrip lines TL21 are grounded, microstrip lines TL22 and TL23 are connected with the microstrip lines, microstrip lines TL23 and TL24 are connected with the microstrip lines TL25 in series after being connected with the microstrip lines TL24 in parallel, and microstrip lines TL 25;
the output port is adapted and connected with the output matching circuit;
the trunk microstrip line is respectively connected with the input port, the transistor and the bias circuit; and 5 capacitors are connected to the main circuit microstrip line.
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| CN110445471A (en) * | 2019-09-11 | 2019-11-12 | 辽宁工程技术大学 | A kind of restructural radio-frequency power amplifier of two waveband and its control method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110445471A (en) * | 2019-09-11 | 2019-11-12 | 辽宁工程技术大学 | A kind of restructural radio-frequency power amplifier of two waveband and its control method |
| CN110445471B (en) * | 2019-09-11 | 2024-03-22 | 辽宁工程技术大学 | Dual-band reconfigurable radio frequency power amplifier and control method thereof |
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