CN210444482U - Headset driven test circuit - Google Patents
Headset driven test circuit Download PDFInfo
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- CN210444482U CN210444482U CN201921434322.1U CN201921434322U CN210444482U CN 210444482 U CN210444482 U CN 210444482U CN 201921434322 U CN201921434322 U CN 201921434322U CN 210444482 U CN210444482 U CN 210444482U
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Abstract
The utility model provides a compatible good, be convenient for maintain and headset drive test circuit that efficiency of software testing is high. The earphone signal simulation circuit comprises an earphone insertion simulation circuit (2) and an earphone key simulation circuit (3), wherein the earphone signal simulation circuit is connected with an earphone drive to be tested through a test probe, the earphone insertion simulation circuit is used for detecting different positions, corresponding to earphone sound channels, of the earphone drive to be tested through the test probe, and pulling-down low-level operation is sequentially carried out on detected signals to simulate the insertion of the earphone; the headset key simulation circuit is used for simulating a carrier waveform during headset key operation and outputting the carrier waveform to a headset driver to be tested for testing; and the headset driver to be tested makes an action corresponding to the analog signal after receiving the analog signal, and a test result is judged through the action made by the headset driver to be tested. The utility model is used for the power control field.
Description
Technical Field
The utility model relates to a test field especially relates to a headset driven test circuit.
Background
The headset driver is one of basic functions of most communication electronic equipment at present, and the work of the headset driver can be directly influenced by circuit design and component welding. In order to ensure the yield and the delivery quality of products, detecting whether the headset driver can work normally is a necessary link for ensuring the performance of electronic products. In recent years, the earphone interface is continuously updated from 3.55mm to TYPE-C interface, but the headset wire control standard is basically not changed, and the principle of the internal driving circuit is basically maintained. The headset is compatible, simple, convenient and low in cost, and becomes the primary target of headset drive test intelligently. The current test is mainly to use the test equipment to directly insert into the headset to be tested for testing.
However, the test solution using the test equipment directly inserted into the headset to be tested requires the test to be in the final assembly stage, and the problem is found late and inconvenient to maintain. The existing test scheme needs continuous plugging and unplugging equipment, and can damage a tested product and cause unnecessary loss. The product with different interfaces needs corresponding test equipment to be tested, and the compatibility is poor. The direct insertion device test mode has low test efficiency and is difficult to be synchronously performed with other function tests.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem that overcome prior art not enough, provide a compatible good, be convenient for maintain and headset drive test circuit that efficiency of software testing is high.
The utility model adopts the technical proposal that: the utility model comprises a control circuit and a headset signal simulation circuit connected with the control circuit through an I2C bus, wherein the headset signal simulation circuit is connected with a headset to be tested through a test probe in a driving way, the headset signal simulation circuit comprises a headset insertion simulation circuit and a headset button simulation circuit,
the control circuit controls the on-off of an analog multi-way switch of the headset inserted into the analog circuit through the I2C bus, controls the output of the headset key analog circuit to the headset driver to be tested, and collects the parameter information of the headset driver to be tested;
the headset insertion analog circuit detects different positions corresponding to the earphone sound channel driven by the test probe and the headset to be tested, and sequentially performs pull-down low-level operation on detected signals to simulate the insertion of the headset;
the headset key simulation circuit is used for simulating a carrier waveform during headset key operation and outputting the carrier waveform to a headset driver to be tested for testing;
and the headset driver to be tested makes an action corresponding to the analog signal after receiving the analog signal, and a test result is judged through the action made by the headset driver to be tested.
Further, the headset inserting analog circuit comprises an analog multi-way switch and a peripheral circuit thereof, and the model of the analog multi-way switch is TS3A 4741.
Still further, the headset key simulation circuit comprises a simulation headset interface transmitter and a peripheral circuit thereof, the model of the simulation headset interface transmitter is CD3271, a B2 connection pin of the simulation headset interface transmitter is connected with a first key resistor, a second key resistor, a third key resistor and a fourth key resistor in series, and a first simulation key, a second simulation key, a third simulation key and a fourth simulation key are respectively arranged between the first key resistor and the second key resistor, between the second key resistor and the third key resistor, between the third key resistor and the fourth key resistor and at the other end of the fourth key resistor.
In addition, the A1 connecting pin of the analog earphone interface transmitter is in driving connection with the headset to be tested after passing through a blocking capacitor.
Furthermore, the control circuit comprises a single chip microcomputer and a peripheral circuit thereof, and the model of the single chip microcomputer is STM32F 429.
In addition, an I/O port expansion circuit is arranged between the control circuit and the headset signal analog circuit and comprises an I/O port expansion chip and a peripheral circuit thereof.
Still further, the control circuit is also in communication connection with a peripheral computer through a network port.
The utility model has the advantages that: in the utility model, the control circuit controls the on-off of the analog multi-way switch inserted into the analog circuit by the earphone microphone through the I2C bus, controls the output of the earphone microphone drive to be tested by the earphone microphone press analog circuit, and collects the parameter information of the earphone microphone drive to be tested; the headset insertion analog circuit detects different positions corresponding to headset sound channels driven by the test probe and the headset to be tested, pull-down low-level operation is sequentially carried out on detected signals, and the headset insertion analog circuit corresponds to the control circuit which controls the on-off of an analog multi-way switch inserted into the headset insertion analog circuit through an I2C bus, so that the insertion of the headset is simulated; after the headset is inserted in a simulation mode, a carrier waveform used for simulating headset key operation is output to a headset key simulation circuit used for testing a headset driver to be tested, the volume of the headset driver to be tested is controlled by the simulation circuit, the headset driver to be tested makes an action corresponding to an analog signal after receiving the analog signal (namely, the volume sent out is changed along with the change of the analog signal), and a test result is judged through the action made by the headset driver to be tested; therefore, the utility model adopts the test probe to drive and connect with the headset to be tested to complete the test, and the test can be carried out in the PCBA design stage of the headset product without waiting for the final product to complete the assembly and then carrying out the test, thereby being beneficial to the timely discovery of the problems and being convenient for maintenance and repair; the test is simulated by adopting a test probe mode, so that the headset can be compatible with different interfaces for testing, and the compatibility is better; through the cooperation of the headset signal simulation circuit and the control circuit, the plugging test and the manual intervention on actual products are avoided, the test precision and the stability are greatly improved, the test efficiency is greatly accelerated, and the test cost is reduced.
In addition, a first key resistor, a second key resistor, a third key resistor and a fourth key resistor are connected in series to a B2 connecting pin of an analog earphone interface transmitter of the headset key analog circuit, and a first analog key, a second analog key, a third analog key and a fourth analog key are respectively arranged between the first key resistor and the second key resistor, between the second key resistor and the third key resistor, between the third key resistor and the fourth key resistor and at the other end of the fourth key resistor; through the setting of first button resistance to fourth button resistance to and the setting of first simulation button to fourth simulation button that corresponds with it, can satisfy the button control test requirement of most headset, and adopt the analog quantity to realize, avoided the damage to real product, also promoted efficiency of software testing greatly.
And the A1 connecting pin of the analog earphone interface transmitter is in driving connection with the headset to be tested after passing through a blocking capacitor, so that the headset product is better protected, and the headset product is prevented from being damaged due to impact of instantaneous current and the like.
An I/O port expansion circuit is arranged between the control circuit and the headset signal simulation circuit, so that a special I/O port can be provided for a test circuit, more efficient signal transmission is realized, and the control circuit is prevented from occupying excessive resources; of course, under general requirements, output can be realized by directly configuring pins in the control circuit singlechip as I/O ports.
The connection between the control circuit and a peripheral computer is realized through the network port, the computer can be used for finishing man-machine interaction, the setting information of an operator is obtained and transmitted to the controller, and meanwhile, the measurement result is further calculated, analyzed, stored and displayed, so that a data base is provided for large-scale automatic testing.
Drawings
Fig. 1 is a schematic block diagram of the circuit principle structure of the present invention;
FIG. 2 is a diagram illustrating interface signal definitions of a headset product under test in an exemplary embodiment;
fig. 3 is a schematic diagram of the headset inserted in the first part of the analog circuit;
FIG. 4 is a schematic diagram of the headset inserted into the second part of the analog circuit;
FIG. 5 is a schematic diagram of the third part of the headset plug-in analog circuit;
FIG. 6 is a schematic diagram of a first portion of the headset key simulation circuit;
FIG. 7 is a schematic diagram of a second portion of the headset key simulation circuit;
FIG. 8 is a schematic diagram of a third portion of the headset key simulation circuit;
FIG. 9 is a schematic diagram of a fourth portion of the headset key simulation circuit;
FIG. 10 is a schematic diagram of the U6A portion of the control circuit;
FIG. 11 is a schematic diagram of the U6B portion of the control circuit;
FIG. 12 is a schematic diagram of the U6C portion of the control circuit;
FIG. 13 is a schematic diagram of the U6D portion of the control circuit;
fig. 14 is a schematic diagram of the peripheral circuits of the control circuit.
Detailed Description
As shown in fig. 1, the utility model discloses a control circuit 1 and through the I2C bus with the headset signal analog circuit that control circuit 1 is connected, headset signal analog circuit passes through the test probe and is connected with the headset drive that awaits measuring, headset signal analog circuit includes that the headset inserts analog circuit 2 and headset button analog circuit 3. The control circuit 1 controls the on-off of an analog multi-way switch U1102 of the headset inserted into the analog circuit 2 through the I2C bus, controls the output of the headset key analog circuit 3 to the headset driver to be tested, and collects the parameter information of the headset driver 5 to be tested. The headset insertion analog circuit 2 sequentially performs pull-down low level operation on detected signals through detection of the test probes and different positions, corresponding to headset sound channels, driven by the headset to be detected, and simulates insertion of the headset. The headset key simulation circuit 3 is used for simulating a carrier waveform during headset key operation and outputting the carrier waveform to a headset driver to be tested for testing. The headset driver 5 to be tested makes an action corresponding to the analog signal after receiving the analog signal, and a test result is judged through the action made by the headset driver to be tested.
Specifically, as shown in fig. 3 to 5, the headset insertion analog circuit 2 includes an analog multiplexer U1102 and its peripheral circuits, and the analog multiplexer U1102 has a model number TS3a 4741. As shown in fig. 6 to 9, the headset key simulation circuit 3 includes an analog headset interface transmitter U1001 and peripheral circuits thereof, and the analog headset interface transmitter U1001 has a model number of CD 3271. A first key resistor R1003, a second key resistor R1004, a third key resistor R1005 and a fourth key resistor R1006 are connected in series to a B2 connection pin of the analog headphone interface transmitter U1001, and a first analog key T _ SW1, a second analog key T _ SW2, a third analog key T _ SW3 and a fourth analog key T _ SW4 are respectively arranged at the other end of the first key resistor R1003, the second key resistor R1004, the third key resistor R1005 and the fourth key resistor R1006 and at the other end of the fourth key resistor R1006. The A1 connecting pin of the analog earphone interface transmitter U1001 is in driving connection with the headset to be tested through a blocking capacitor C1002. As shown in fig. 10 to 14, the control circuit 1 includes a single chip microcomputer and a peripheral circuit thereof, and the model of the single chip microcomputer is STM32F 429. The control circuit 1 is also connected with a peripheral computer 4 in a communication way through a network port. An I/O port expansion circuit is arranged between the control circuit and the headset signal analog circuit, the I/O port expansion circuit comprises an I/O port expansion chip and peripheral circuits thereof, and the I/O port expansion chip can be a CAT 9555I/O expansion chip. The purpose of this is to provide a dedicated I/O port for the test circuit, to achieve more efficient signal transmission, and to avoid the control circuit from occupying too many resources. Of course, under general requirements, output can be realized by directly configuring pins in the control circuit singlechip as I/O ports.
The utility model discloses a test procedure as follows:
(1) controlling the headset insertion analog circuit to complete an analog headset insertion action, so that the headset driver to be tested can enter a headset mode;
(2) controlling the first analog key T _ SW1, the second analog key T _ SW2, the third analog key T _ SW3 and the fourth analog key T _ SW4 to pull the ground first and then, at this time, connecting pins B2 of the analog headphone jack transmitter U1001 are connected to GND through different resistance values;
(3) the analog earphone interface transmitter U1001 (CD 3271) generates carrier signals corresponding to different Vp-p at an A1 connecting pin according to different pull-down resistance values, and transmits the carrier signals to an earphone driver to be tested through an MIC end after being isolated by a DC isolation capacitor C1002;
(4) the headset driver to be tested can make corresponding response after receiving the signal, and all response information is converted into uniform output information aiming at different products;
(5) and judging whether the headset driver to be tested works normally by means of an acoustic instrument or comparing the analog output signal with the response of the headset driver to be tested through a computer.
Compared with the prior art, the utility model discloses a mode of test probe is connected with the product that awaits measuring down, causes the signal on the test circuit to at test circuit integrated earphone signal analog circuit and the control circuit who corresponds, the overall process can full automation realize, human intervention has been reduced, test stability has been improved, also greatly accelerated efficiency, the test cost has been alleviateed, test occupation space has been reduced, compatibility has been improved, can test the product that has different interfaces through the test probe.
Claims (7)
1. A headset-driven test circuit, characterized by: the device comprises a control circuit (1) and an earphone signal simulation circuit connected with the control circuit (1) through an I2C bus, wherein the earphone signal simulation circuit is in driving connection with an earphone to be tested through a test probe, the earphone signal simulation circuit comprises an earphone insertion simulation circuit (2) and an earphone key simulation circuit (3),
the control circuit (1) controls the on-off of an analog multi-way switch (U1102) of the headset inserted into the analog circuit (2) through the I2C bus, controls the output of the headset key analog circuit (3) to the headset driver to be tested, and collects the parameter information of the headset driver to be tested;
the headset insertion analog circuit (2) detects different positions corresponding to the earphone sound channel driven by the test probe and the headset to be tested, and sequentially performs pull-down low-level operation on detected signals to simulate the insertion of the headset;
the headset key simulation circuit (3) is used for simulating a carrier waveform during headset key operation and outputting the carrier waveform to a headset driver to be tested for testing;
and the headset driver to be tested makes an action corresponding to the analog signal after receiving the analog signal, and a test result is judged through the action made by the headset driver to be tested.
2. The headset-driven test circuit of claim 1, wherein: the headset insertion analog circuit (2) comprises an analog multi-way switch (U1102) and peripheral circuits thereof, and the model of the analog multi-way switch (U1102) is TS3A 4741.
3. The headset-driven test circuit of claim 1, wherein: the headset key simulation circuit (3) comprises a simulation earphone interface transmitter (U1001) and a peripheral circuit thereof, the model of the analog earphone interface transmitter (U1001) is CD3271, a B2 connecting pin of the analog earphone interface transmitter (U1001) is connected with a first key resistor (R1003), a second key resistor (R1004), a third key resistor (R1005) and a fourth key resistor (R1006) in series, a first analog key (T _ SW 1), a second analog key (T _ SW 2), a third analog key (T _ SW 3) and a fourth analog key (T _ SW 4) are respectively arranged between the first key resistor (R1003) and the second key resistor (R1004), between the second key resistor (R1004) and the third key resistor (R1005), between the third key resistor (R1005) and the fourth key resistor (R1006) and at the other end of the fourth key resistor (R1006).
4. A headset driven test circuit according to claim 3, characterized in that: and an A1 connecting pin of the analog earphone interface transmitter (U1001) is in driving connection with the headset to be tested through a blocking capacitor (C1002).
5. A headset driven test circuit according to any of claims 1 to 4, characterized in that: the control circuit (1) comprises a single chip microcomputer and a peripheral circuit thereof, and the model of the single chip microcomputer is STM32F 429.
6. The headset-driven test circuit of claim 5, wherein: an I/O port expansion circuit is further arranged between the control circuit (1) and the headset signal simulation circuit, and the I/O port expansion circuit comprises an I/O port expansion chip and a peripheral circuit thereof.
7. The headset-driven test circuit of claim 1, wherein: the control circuit (1) is also in communication connection with a peripheral computer (4) through a network port.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921434322.1U CN210444482U (en) | 2019-08-31 | 2019-08-31 | Headset driven test circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921434322.1U CN210444482U (en) | 2019-08-31 | 2019-08-31 | Headset driven test circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210444482U true CN210444482U (en) | 2020-05-01 |
Family
ID=70409735
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921434322.1U Active CN210444482U (en) | 2019-08-31 | 2019-08-31 | Headset driven test circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210444482U (en) |
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2019
- 2019-08-31 CN CN201921434322.1U patent/CN210444482U/en active Active
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