CN210378995U

CN210378995U - Chip surface protection structure based on chip thinning

Info

Publication number: CN210378995U
Application number: CN201921626693.XU
Authority: CN
Inventors: 詹健龙; 陶晟
Original assignee: Zhejiang Kunteng Infrared Technology Co ltd
Current assignee: Zhejiang Kunteng Infrared Technology Co ltd
Priority date: 2019-09-27
Filing date: 2019-09-27
Publication date: 2020-04-21
Anticipated expiration: 2029-09-27

Abstract

The utility model discloses a chip surface protection structure based on chip thinning, which relates to the chip processing field, comprising a chip body, wherein the center of the top of the chip body is provided with an outer photoresist layer in a bonding way and the edge of the top of the chip body is provided with an inner photoresist layer in a bonding way; an auxiliary positioning mechanism is sleeved on the outer side of the chip body, a photoetching plate is arranged at the center of the top of the auxiliary positioning mechanism, and an exposure part is arranged at the center of the top of the photoetching plate; the auxiliary positioning mechanism comprises four L-shaped limiting plates, the four L-shaped limiting plates are located at four corners of the chip body, and a linear type connecting plate is fixedly arranged between any two adjacent L-shaped limiting plates. The utility model discloses can be simple and convenient and accurate fix a position the portion of reducing thinness, photoresist layer's protection in can also utilizing simultaneously avoids the protection portion fish tail or the condition of pollution to appear, and the in-service use effect is better.

Description

Chip surface protection structure based on chip thinning

Technical Field

The utility model relates to a chip processing field, in particular to chip surface protection structure when based on chip attenuate.

Background

Thinning of a chip refers to reducing the size of the chip in the process of manufacturing an integrated circuit so as to manufacture a more complex integrated circuit.

When the chip is thinned in the prior art, a necessary protection positioning function is lacked, the surface of the chip is easily scratched and polluted in the processing process, and meanwhile, the thinned area cannot be positioned simply, conveniently and accurately.

Therefore, it is necessary to invent a chip surface protection structure for chip thinning to solve the above problems.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a chip surface protection structure when based on the chip attenuate to solve the problem that proposes among the above-mentioned background art.

In order to achieve the above object, the utility model provides a following technical scheme: a chip surface protection structure based on chip thinning comprises a chip body, wherein an outer photoetching adhesive layer is bonded at the center of the top of the chip body, and an inner photoetching adhesive layer is bonded at the edge of the top of the chip body;

an auxiliary positioning mechanism is sleeved on the outer side of the chip body, a photoetching plate is arranged at the center of the top of the auxiliary positioning mechanism, and an exposure part is arranged at the center of the top of the photoetching plate;

the auxiliary positioning mechanism comprises four L-shaped limiting plates, four L-shaped limiting plates are located at four corners of the chip body, and any two adjacent limiting plates are fixedly arranged between the L-shaped limiting plates, a positioning frame is arranged on the inner side of the linear connecting plate, U-shaped connecting rods are fixedly arranged on two sides of the top of the linear connecting plate, one end of each U-shaped connecting rod is fixedly connected with the top of the linear connecting plate, and the other end of each U-shaped connecting rod is fixedly connected with the positioning frame.

Preferably, the chip body includes a protection portion and a thinning portion.

Preferably, the exposed portion is located at the top of the outer photoresist layer, the outer photoresist layer is located at the top of the thinned portion, and the inner photoresist layer is located at the top of the protection portion.

Preferably, an accommodating space is arranged between the outer photoresist layer and the inner photoresist layer.

Preferably, the positioning frame is located inside the accommodating space.

Preferably, the bottom of the positioning frame is bonded with a silica gel pad.

The utility model discloses a technological effect and advantage:

1. the utility model discloses an utilize the cover to establish the supplementary positioning mechanism outside the chip body and accomplish the location of the portion of reducing thickness and the location of the photolithography mask, then utilize outer photoresist layer and interior photoresist layer to shelter from the portion of reducing thickness and protection portion, and then can be simple and convenient and accurate fix a position the portion of reducing thickness, can also utilize the protection of interior photoresist layer simultaneously, avoid the protection portion to appear the fish tail or the condition of pollution, the actual use effect is better;

2. the utility model discloses a set up the silica gel pad bottom the locating frame to when utilizing the locating frame to fix a position the portion of reducing thickness, can utilize the silica gel pad to shelter from bottom the locating frame, and then avoid locating frame and chip body direct contact, effectively prevent to take place wearing and tearing between locating frame and the chip body.

Drawings

Fig. 1 is a schematic view of the overall overlooking structure of the present invention.

Fig. 2 is a schematic view of the top view structure of the chip body of the present invention.

Fig. 3 is a schematic view of the overlooking structure of the outer photoresist layer and the inner photoresist layer of the present invention.

Fig. 4 is a schematic view of the overhead structure of the auxiliary positioning mechanism of the present invention.

Fig. 5 is a schematic side sectional view of the positioning frame of the present invention.

In the figure: 1. a chip body; 2. an outer photoresist layer; 3. an inner photoresist layer; 4. an auxiliary positioning mechanism; 5. photoetching a plate; 6. an exposure section; 7. a protection part; 8. a thinning portion; 9. a receiving space; 10. an L-shaped limiting plate; 11. a linear connecting plate; 12. a positioning frame; 13. a U-shaped connecting rod; 14. a silica gel pad.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

The utility model provides a chip surface protection structure when based on chip attenuate as shown in fig. 1-5, as shown in fig. 1, including

chip body

1, 1 outsides of chip body cup joint and set up

auxiliary positioning mechanism

4, and 4 top center departments of auxiliary positioning mechanism set up

photoetching version

5, and 5 top center departments of photoetching version set up the exposure portion 6 that is used for the exposure.

As shown in fig. 2, the chip body 1 includes a protection portion 7 to be protected and a thinning portion 8 to be thinned, the exposure portion 6 is located on top of the outer photoresist layer 2, and the outer photoresist layer 2 is located on top of the thinning portion 8, so as to expose the thinning portion 8 at the bottom of the outer photoresist layer 2 by using the exposure portion 6 on the photolithography mask 5.

Meanwhile, the inner photoresist layer 3 is located on the top of the protection portion 7, so that the protection portion 7 is protected by the inner photoresist layer 3 in the thinning process.

As shown in fig. 3, the top center of the chip body 1 is bonded with the outer photoresist layer 2 and the top edge of the chip body 1 is bonded with the inner photoresist layer 3, and an accommodating space 9 is formed between the outer photoresist layer 2 and the inner photoresist layer 3.

As shown in fig. 4, the auxiliary positioning mechanism 4 includes four L-shaped limiting plates 10, the four L-shaped limiting plates 10 are located at four corners of the chip body 1, a linear connecting plate 11 is fixedly arranged between any two adjacent L-shaped limiting plates 10, a positioning frame 12 is arranged on the inner side of the linear connecting plate 11, U-shaped connecting rods 13 are fixedly arranged on two sides of the top of the linear connecting plate 11, one end of each U-shaped connecting rod 13 is fixedly connected with the top of the linear connecting plate 11, the other end of each U-shaped connecting rod 13 is fixedly connected with the positioning frame 12, and the positioning frame 12 is located inside the accommodating.

As shown in fig. 5, the bottom of the positioning frame 12 is bonded with a silica gel pad 14, so that when the positioning frame 12 is used to position the thinning portion 8, the bottom of the positioning frame 12 can be shielded by the silica gel pad 14, thereby avoiding direct contact between the positioning frame 12 and the chip body 1, and effectively preventing abrasion between the positioning frame 12 and the chip body 1.

The utility model discloses the theory of operation:

during assembly, the auxiliary positioning mechanism 4 is integrally sleeved outside the chip body 1, so that the four L-shaped limiting plates 10 are respectively positioned outside the four corners of the chip body 1;

at the moment, the positioning frame 12 is positioned at the top of the chip body 1, the thinning part 8 is positioned at the inner side of the positioning frame 12, and then the photoresist is sequentially coated on the outer side of the positioning frame 12 and the inner side of the positioning frame 12, so that an outer photoresist layer 2 and an inner photoresist layer 3 are formed;

finally, the photoetching plate 5 is placed at the top of the positioning frame 12, and then the thinned part 8 at the bottom of the external photoresist layer 2 is exposed by using the exposure part 6 on the photoetching plate 5;

after exposure is completed, the photoetching plate 5 is taken down, then the outer photoetching glue layer 2 at the top of the thinning part 8 is taken down, then the thinning part 8 is thinned, after processing is completed, the auxiliary positioning mechanism 4 is wholly taken down from the outer side of the chip body 1, then the inner photoetching glue layer 3 at the outer side of the protection part 7 is taken down, and the chip body 1 is wholly cleaned.

Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications and variations can be made in the embodiments or in part of the technical features of the embodiments without departing from the spirit and the scope of the invention.

Claims

1. The utility model provides a chip surface protection structure when based on chip attenuate which characterized in that: the chip comprises a chip body (1), wherein an outer photoresist layer (2) is arranged at the center of the top of the chip body (1) in an adhering mode, and an inner photoresist layer (3) is arranged at the edge of the top of the chip body (1) in an adhering mode;

an auxiliary positioning mechanism (4) is sleeved on the outer side of the chip body (1), a photoetching plate (5) is arranged at the center of the top of the auxiliary positioning mechanism (4), and an exposure part (6) is arranged at the center of the top of the photoetching plate (5);

the auxiliary positioning mechanism (4) comprises four L-shaped limiting plates (10) and four L-shaped limiting plates (10) located at four corners of the chip body (1) and adjacent to the four L-shaped limiting plates (10), linear connecting plates (11) are fixedly arranged between the L-shaped limiting plates (10), the inner sides of the linear connecting plates (11) are provided with positioning frames (12) and the two sides of the tops of the linear connecting plates (11) are fixedly provided with U-shaped connecting rods (13), and one ends of the U-shaped connecting rods (13) are fixedly connected with the tops of the linear connecting plates (11) and the other ends of the U-shaped connecting rods (13) are fixedly connected with the positioning frames (.

2. The chip surface protection structure based on chip thinning according to claim 1, wherein: the chip body (1) comprises a protection part (7) and a thinning part (8).

3. The chip surface protection structure based on chip thinning according to claim 2, wherein: the exposure part (6) is positioned at the top of the outer photoresist layer (2), the outer photoresist layer (2) is positioned at the top of the thinning part (8), and the inner photoresist layer (3) is positioned at the top of the protection part (7).

4. The chip surface protection structure based on chip thinning according to claim 1, wherein: and an accommodating space (9) is arranged between the outer photoresist layer (2) and the inner photoresist layer (3).

5. The chip surface protection structure based on chip thinning according to claim 4, wherein: the positioning frame (12) is located inside the accommodating space (9).

6. The chip surface protection structure based on chip thinning according to claim 1, wherein: and a silica gel pad (14) is adhered to the bottom of the positioning frame (12).