CN210245484U

CN210245484U - SOI structure with high voltage resistance and high heat dissipation performance

Info

Publication number: CN210245484U
Application number: CN201921196861.6U
Authority: CN
Inventors: Liang Zhang; 张亮; Xiaozhi Wang; 汪小知; Xiangyu Zeng; 曾翔宇
Original assignee: Zhejiang University ZJU
Current assignee: Zhejiang University ZJU
Priority date: 2019-07-26
Filing date: 2019-07-26
Publication date: 2020-04-03
Anticipated expiration: 2029-07-26

Abstract

The utility model discloses a high withstand voltage high heat dissipating's SOI structure. The silicon-based composite structure comprises top silicon, a composite insulating layer and a back substrate, wherein the top silicon, the composite insulating layer and the back substrate are sequentially arranged from top to bottom, the composite insulating layer mainly comprises a silicon dioxide layer, a boron nitride layer, a hafnium oxide layer and fluorine silicon oxide layers positioned on two sides of the composite structure, the top silicon mainly comprises a first silicon wafer layer, and the back substrate mainly comprises a silicon layer and a second silicon wafer layer; the first silicon chip layer is arranged on the silicon dioxide layer, the boron nitride layer is arranged in the center of the lower surface of the silicon dioxide layer, the hafnium oxide layer is arranged below the boron nitride layer, the silicon layer is arranged below the hafnium oxide layer, and the silicon oxyfluoride layer is uniformly arranged between the silicon layer and the silicon dioxide layer on two sides of the boron nitride layer and the hafnium oxide layer. The utility model discloses the structure can help improving the pressure resistance of device, improves the heat dispersion of SOI, improves the insulating properties of SOI simultaneously.

Description

SOI structure with high voltage resistance and high heat dissipation performance

Technical Field

The utility model relates to a semiconductor SOI technical field, concretely relates to high withstand voltage high heat dissipating's SOI structure.

Background

SOI (Silicon-On-Insulator, Silicon On insulating substrate) technology introduces an insulating layer between the top Silicon and the backing substrate. By forming a semiconductor thin film on an insulator, the SOI material has advantages over bulk silicon: the dielectric isolation of components in the integrated circuit can be realized, and the parasitic latch-up effect in a bulk silicon CMOS circuit is thoroughly eliminated; the integrated circuit made of the material also has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, particular application to low-voltage and low-power consumption circuits and the like, so that the SOI can possibly become the mainstream technology of deep submicron low-voltage and low-power consumption integrated circuits and enter the practical application stage. The power device with the SOI structure has higher working speed and better insulation performance. However, the application of SOI technology is limited due to the self-heating effect caused by the low thermal conductivity silicon dioxide insulating layer, which causes the channel current of the device to decrease and the negative differential resistance to be formed. In addition, the longitudinal breakdown voltage of the power device with the SOI structure is low, so that the improvement of the longitudinal voltage withstanding performance and the overall heat dissipation performance of the device with the SOI structure is a key subject of current research.

SUMMERY OF THE UTILITY MODEL

In order to solve the problem in the background art, the utility model provides a novel SOI structure effectively restraines the self-heating effect and improves vertical breakdown voltage, improves device heat dispersion and voltage resistance.

Because the SOI structure is provided with an additional insulating layer on the basis of a bulk silicon process, the heat dissipated from the substrate part is greatly reduced. On the basis, the fluorine silicon oxide with low relative dielectric constant is added to improve the longitudinal breakdown voltage, so that the voltage resistance of the device can be improved. The utility model discloses to change the traditional structure and the material of insulating layer, adopt special composite construction, under the prerequisite that does not influence the film performance, improve the heat dispersion and the compressive property of SOI structure.

The utility model adopts the technical scheme as follows:

the utility model discloses a top layer silicon, composite insulation layer and the back of the body substrate, its characterized in that from top to bottom arrange in proper order: the composite insulating layer mainly comprises a silicon dioxide layer, a boron nitride layer, a hafnium oxide layer and silicon oxyfluoride layers positioned on two sides, the top silicon mainly comprises a first silicon wafer layer, and the back substrate mainly comprises a silicon layer and a second silicon wafer layer; the first silicon chip layer is arranged on the silicon dioxide layer, the boron nitride layer is arranged in the center of the lower surface of the silicon dioxide layer, the hafnium oxide layer is arranged below the boron nitride layer, the silicon layer is arranged below the hafnium oxide layer, and the silicon oxyfluoride layer is uniformly arranged between the silicon layer and the silicon dioxide layer on two sides of the boron nitride layer and the hafnium oxide layer.

The boron nitride layer is centered over the hafnium oxide layer.

The thickness of the silicon dioxide layer is 10 nm. With such a thickness, heat dissipation performance is not affected even if the thermal conductivity of silicon dioxide is low. The silicon dioxide layer mainly plays a role in improving the interface bonding performance between the composite insulating layer and the top silicon.

The boron nitride layer has a thickness of 300nm, and has high insulating property and very high heat conduction coefficient. Because the boron nitride has good insulating property and high thermal conductivity, the thermal resistance of the insulating layer is greatly reduced, and the heat dissipation is facilitated.

The hafnium oxide layer has a thickness of 300nm, has a very high insulating property, and ensures a good insulating property of the insulating layer.

The back substrate mainly comprises a silicon layer and a second silicon wafer layer.

The boron nitride layer is made of boron nitride or other materials with the dielectric constant similar to that of boron nitride and high thermal conductivity. The boron nitride film used in the utility model has a relative dielectric constant of 4 and a thermal conductivity of about 360W/(mK).

The hafnium oxide layer is made of hafnium oxide or other materials with relative dielectric constant larger than 10.

The silicon oxyfluoride layer is positioned on two sides of the boron nitride layer and the hafnium oxide layer and is 600nm thick. The relative dielectric constant of the silicon oxyfluoride layer is about 2.7, the critical breakdown electric field is 9.5MV/cm, the longitudinal breakdown voltage of the SOI structure is greatly improved, and the voltage resistance of the SOI structure device is enhanced. Thus, the novel SOI structure of the invention has two regions composed of silicon oxyfluoride on two sides of the composite insulating layer respectively, has lower relative dielectric constant, and can modulate the top silicon electric field by utilizing the additional field at the interface, thereby improving the voltage resistance of the device.

The structure of the utility model is designed with a silicon oxyfluoride layer, and the additional field at the interface of the silicon oxyfluoride with low dielectric constant is utilized to modulate the top silicon electric field, so that the voltage resistance of the device is improved; meanwhile, compared with the traditional silicon dioxide insulating layer, the boron nitride layer in the composite insulating layer has very high heat conductivity coefficient, the heat dissipation performance of the SOI is improved, and meanwhile, the hafnium oxide layer with high dielectric constant improves the insulating performance of the SOI.

The utility model has the advantages that:

the utility model discloses an insulating layer adopts silicon dioxide, boron nitride, hafnium oxide and fluorine silicon oxide composite construction to replace traditional silica insulating layer, has effectively restrained self-heating effect to the pressure resistance of SOI structure device has been improved.

The utility model discloses the pressure resistance and the heat dispersion of traditional SOI structure have been improved under the condition that does not influence other performance, make the utility model discloses can improve the performance of power device, can improve holistic heat dispersion, insulating properties and the pressure resistance of SOI, be favorable to the further popularization that the SOI structure applied.

Drawings

Fig. 1 is a cross-sectional view of an SOI structure of the present invention.

In the figure: a first silicon layer (1), a silicon dioxide layer (2), a boron nitride layer (3), a hafnium oxide layer (4), a silicon layer (5), a second silicon layer (6) and a silicon oxyfluoride layer (7).

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples.

Example one

As shown in fig. 1, the utility model discloses a top silicon, composite insulation layer, the back of the body substrate that from top to bottom arranges in proper order, composite insulation layer mainly comprises

silicon dioxide layer

2, 3 hafnium oxide layers 4 of boron nitride layer and 7 composite construction of fluorine silicon oxide layer, top silicon includes first silicon chip layer 1, mainly comprise silicon layer 5 and second silicon chip layer 6 at the bottom of the back of the body substrate, 2 upper surfaces on silicon dioxide layer are first silicon chip layer 1, the lower surface is

boron nitride layer

3, 3 lower surfaces on boron nitride layer are

hafnium oxide layers

4, 4 lower surfaces on hafnium oxide layers are silicon layer 5, fluorine silicon oxide layer 7 is located

boron nitride layer

3 and 4 both ends on hafnium oxide layers.

As shown in FIG. 1, the first silicon wafer layer is a standard 4-inch silicon wafer with a thickness of 0.52 mm; the thickness of the silicon dioxide layer 2 is 10 nm; the thickness of the boron nitride layer 3 is 300 nm; the hafnium oxide layer 4 has a thickness of 300 nm; the thickness of the silicon layer 5 is 100 nm; the second silicon wafer layer 6 is a standard four-inch silicon wafer with the thickness of 0.52 mm; and a silicon oxyfluoride layer 7 having a thickness of 600nm located at both ends of the boron nitride layer 3 and the hafnium oxide layer 4.

Example two

silicon dioxide layer

boron nitride layer

3, 3 lower surfaces on boron nitride layer are

hafnium oxide layers

boron nitride layer

3 and 4 both ends on hafnium oxide layers.

As shown in FIG. 1, the first silicon wafer layer is a standard 4-inch silicon wafer with a thickness of 0.52 mm; the thickness of the silicon dioxide layer 2 is 10 nm; in contrast to the first embodiment, the boron nitride layer 3 has a thickness of 500 nm; in distinction from the first embodiment, the hafnium oxide layer 4 has a thickness of 100 nm; the thickness of the silicon layer 5 is 100 nm; the second silicon wafer layer 6 is a standard four-inch silicon wafer with the thickness of 0.52 mm; and a silicon oxyfluoride layer 7 having a thickness of 600nm located at both ends of the boron nitride layer 3 and the hafnium oxide layer 4.

The conventional SOI substrate insulating layer is made of silicon dioxide, which is a poor thermal conductor and has a thermal conductivity of about 1.39W/(mK), so the conventional SOI has poor heat dissipation performance. In addition, in the conventional SOI structure, the longitudinal breakdown voltage is low, and the overall voltage resistance is poor.

The utility model discloses a composite insulation layer in the heat conductivity coefficient of boron nitride insulating layer be 360W/(mK), be about 260 times of silicon dioxide, improved the heat-sinking capability of SOI base greatly, the fluorine silicon oxide who is located boron nitride layer and hafnium oxide layer both ends has lower relative dielectric constant, additional field modulation top silicon electric field through interface department makes the device compressive property of SOI structure improve.

It will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims and their equivalents, the present invention is also intended to include such modifications and variations.

Claims

1. The utility model provides a high withstand voltage high heat dissipating's SOI structure, includes top silicon, composite insulation layer and the back of the body substrate that from top to bottom arranges in proper order, its characterized in that: the composite insulating layer mainly comprises a silicon dioxide layer (2), a boron nitride layer (3), a hafnium oxide layer (4) and silicon oxyfluoride layers (7) positioned on two sides, the top silicon mainly comprises a first silicon wafer layer (1), and the back substrate mainly comprises a silicon layer (5) and a second silicon wafer layer (6); the silicon dioxide layer (2) is arranged on the first silicon chip layer (1), the center of the lower surface of the silicon dioxide layer (2) is provided with the boron nitride layer (3), the lower surface of the boron nitride layer (3) is provided with the hafnium oxide layer (4), the lower surface of the hafnium oxide layer (4) is provided with the silicon layer (5), and the fluorine silicon oxide layer (7) is uniformly arranged between the silicon dioxide layer (2) and the silicon layer (5) on two sides of the boron nitride layer (3) and the hafnium oxide layer (4).

2. The SOI structure of claim 1 wherein:

the boron nitride layer (3) is centrally located on top of the hafnium oxide layer (4).

3. The SOI structure of claim 1 wherein:

the thickness of the silicon dioxide layer (2) is 10 nm.

4. The SOI structure of claim 1 wherein:

the thickness of the boron nitride layer (3) is 300 nm.

5. The SOI structure of claim 1 wherein:

the hafnium oxide layer (4) has a thickness of 300 nm.

6. The SOI structure of claim 1 wherein:

the back substrate mainly comprises a silicon layer (5) and a second silicon wafer layer (6).

7. The SOI structure of claim 1 wherein:

the boron nitride layer (3) is made of a boron nitride material.

8. The SOI structure of claim 1 wherein:

the hafnium oxide layer (4) adopts a hafnium oxide material.

9. The SOI structure of claim 1 wherein:

the silicon oxyfluoride layer (7) is positioned on two sides of the boron nitride layer (3) and the hafnium oxide layer (4) and has the thickness of 600 nm.