CN210182370U - Semiconductor chip structure - Google Patents

Semiconductor chip structure Download PDF

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Publication number
CN210182370U
CN210182370U CN201921347793.9U CN201921347793U CN210182370U CN 210182370 U CN210182370 U CN 210182370U CN 201921347793 U CN201921347793 U CN 201921347793U CN 210182370 U CN210182370 U CN 210182370U
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China
Prior art keywords
layer
semiconductor chip
chip structure
ferromagnetic material
semiconductor substrate
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CN201921347793.9U
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Chinese (zh)
Inventor
Hao Chen
陈浩
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Hefei Qizhong Technology Co ltd
Chipmore Technology Corp Ltd
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Jiaozhong Science And Technology (suzhou) Co Ltd
Beijing Eswin Technology Co Ltd
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Priority to CN201921347793.9U priority Critical patent/CN210182370U/en
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Abstract

The utility model provides a semiconductor chip structure, be in including semiconductor substrate, formation circuit layer, electric connection on the semiconductor substrate the electrically conductive lug on circuit layer, electrically conductive lug includes the lug body, sets up the lug body deviates from a circuit layer side surface metal layer, is located ferromagnetic material layer between lug body and the surface metal layer, ferromagnetic material layer's coverage area is less than the top surface of lug body. By reducing the size of the ferromagnetic material layer, the influence of the ferromagnetic material layer on the magnetic field of the magnetic circuit area is reduced, and the normal work of the product is ensured.

Description

Semiconductor chip structure
Technical Field
The utility model relates to a semiconductor manufacturing technical field especially relates to a semiconductor chip structure.
Background
With the continuous development of the electronic industry, the market demand for the performance of semiconductor chips and their packaging structures is also increasing. The circuit layer of the existing semiconductor chip usually needs to be provided with corresponding conductive bumps to realize external connection, and conductive bumps adopting a Cu/Ni/Au structure have been disclosed in the industry, and the structure fully utilizes the advantages of good heat dissipation performance, low impedance and the like of metal Cu, and also overcomes the disadvantages of difficult bonding and easy oxidation of the metal Cu.
However, the presence of the metal Ni in the conductive bump structure may affect the acquisition and measurement of the magnetic field signal, affect the magnetic field in the magnetic circuit area, and may cause the failure of functional components such as the transformer, the inductor, and the filter. In other words, the chip structure related to the measurement and control of the magnetic field signal is usually difficult to adopt the conductive bump made of ferromagnetic material, which limits the development and performance optimization of the chip products. In addition, the conductive bump of the Cu/Ni/Au structure has a larger Au layer area, which increases the manufacturing cost.
In view of the above, it is desirable to provide a new semiconductor chip structure.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a semiconductor chip structure can reduce the influence that conductive convex block probably caused to the magnetic field in magnetic circuit district, ensures that the product normally works.
In order to achieve the above object, the present invention provides a semiconductor chip structure, including the semiconductor substrate, forming circuit layer, electric connection on the semiconductor substrate the conductive bump on circuit layer, its characterized in that: the conductive bump comprises a bump body, a surface metal layer arranged on one side, away from the circuit layer, of the bump body, and a ferromagnetic material layer positioned between the bump body and the surface metal layer, wherein the coverage area of the ferromagnetic material layer is smaller than the top surface of the bump body.
As a further improvement of the present invention, the semiconductor chip structure further includes a metal seed layer disposed between the bump body and the circuit layer.
As a further improvement of the present invention, the semiconductor chip structure further includes a protection layer, the circuit layer is located between the semiconductor substrate and the protection layer, the protection layer is provided with a connection window corresponding to the conductive bump, the bump body has a first portion located in the connection window, a second portion located in the first portion and extending in the direction away from the semiconductor substrate, the second portion is located in the direction parallel to the semiconductor substrate, and the cross section of the direction of the semiconductor substrate is greater than the cross section of the first portion in the direction parallel to the semiconductor substrate.
As a further improvement of the present invention, the bump body is made of copper or copper alloy.
As a further improvement of the present invention, the surface metal layer is a gold layer; the ferromagnetic material layer is provided as a nickel layer.
As a further improvement of the present invention, the surface metal layer and the ferromagnetic material layer are overlapped with each other.
As a further improvement of the present invention, the conductive bump is disposed to extend in a direction perpendicular to the semiconductor substrate.
The utility model has the advantages that: by adopting the semiconductor chip structure of the utility model, the size of the ferromagnetic material layer is reduced, the influence of the ferromagnetic material layer on the magnetic field of the magnetic circuit area is reduced, and the normal work of the product is ensured; the application range of the conductive bump is enlarged, and the development and design of the product structure are facilitated.
Drawings
Fig. 1 is a schematic structural diagram of a semiconductor chip structure according to the present invention;
FIG. 2 is a schematic diagram of a wafer substrate for fabricating a semiconductor chip structure according to the present invention;
FIG. 3 is a schematic structural view of the semiconductor chip structure of the present invention after the bump body is prepared;
fig. 4 is a schematic structural diagram of the semiconductor chip structure when the preparation of the surface metal layer is completed.
Detailed Description
The present invention will be described in detail below with reference to embodiments shown in the drawings. The present invention is not limited to the embodiment, and structural, methodological, or functional changes made by one of ordinary skill in the art according to the embodiment are included in the scope of the present invention.
As shown in fig. 1, the present invention provides a semiconductor chip structure 100, which includes a semiconductor substrate 10, a circuit layer 20 formed on the surface of the semiconductor substrate 10, a protection layer 30, a metal seed layer 40, and a conductive bump 50 electrically connected to the circuit layer 20.
The conductive bump 50 includes a bump body 51, a surface metal layer 52 disposed on a side of the bump body 51 facing away from the circuit layer 20, and a ferromagnetic material layer 53 located between the bump body 51 and the surface metal layer 52, wherein a coverage area of the ferromagnetic material layer 53 is smaller than a top surface of the bump body 51. The ferromagnetic material layer 53 is made of a ferromagnetic material such as iron, cobalt, nickel, etc., which may affect the magnetic field signal generated when the semiconductor chip structure 100 operates, and may cause the failure of functional components such as a transformer, an inductor, a filter, etc. Here, on the premise of not changing the design of the bump body 51, the size of the ferromagnetic material layer 53 is reduced, the influence on the magnetic circuit area is reduced, and the normal operation of the semiconductor chip structure 100 is ensured. Further, the ferromagnetic material layer 53 is disposed on a side relatively far from the magnetic circuit region, so that the influence of the magnetic field on the magnetic circuit region is more effectively reduced.
Here, the surface metal layer 52 and the ferromagnetic material layer 53 are overlapped with each other, that is, the surface metal layer 52 and the ferromagnetic material layer 53 are uniform in size in a direction parallel to the semiconductor substrate 10. In this embodiment, the bump body 51 is made of copper or copper alloy, the surface metal layer 52 is a gold layer, and the ferromagnetic material layer 53 is a nickel layer. The ferromagnetic material layer 53 serves as a bonding layer between the bump body 51 and the surface metal layer 52, so that the electrical conductivity of the conductive bump 50 can be ensured and the formation of a copper-gold eutectic can be avoided.
The circuit layer 20 is located between the semiconductor substrate 10 and the protection layer 30, the protection layer 30 is provided with a connection window 31 corresponding to the conductive bump 50, and the metal seed layer 40 is disposed on the inner wall of the connection window 31 and the surface of the protection layer 30. The protection layer 30 is used to effectively protect the circuit layer 20, and the composition and thickness thereof can be set according to different product requirements.
The conductive bumps 50 extend in a direction perpendicular to the semiconductor substrate 10. The bump body 51 has a first portion 511 located within the connection window 31, a second portion 512 extending from the first portion 511 in a direction away from the semiconductor substrate 10, the second portion 512 having a larger cross-section in a direction parallel to the semiconductor substrate 10 than the first portion 511 in a direction parallel to the semiconductor substrate 10.
With reference to fig. 2 to 4, in an actual manufacturing process of the semiconductor chip structure 100, firstly, a metal seed layer 40 is sputtered on a wafer substrate, where the wafer substrate includes a semiconductor substrate 10, a circuit layer 20 and a protection layer 30 disposed on a surface of one side of the semiconductor substrate 10, and the protection layer 30 is provided with a connection window 31; secondly, coating a first photoresist 60, exposing and developing to obtain an opening for preparing the bump body 51, and electroplating to obtain the bump body 51, wherein the first photoresist 60 exceeds the top surface of the bump body 51 to be prepared along the thickness direction; then, etching and removing the first photoresist 60, coating a second photoresist 70, exposing and developing to obtain openings for preparing the surface metal layer 52 and the ferromagnetic material layer 53, and electroplating to obtain the surface metal layer 52 and the ferromagnetic material layer 53, wherein the second photoresist 70 is also arranged to exceed the top surface of the surface metal layer 52 to be prepared in the thickness direction; finally, the second photoresist 70 and a portion of the metal seed layer 40 beside the bump body 51 are removed by etching, so as to obtain the semiconductor chip structure 100. It should be noted that the above method description is only for better illustrating the structural features of the aforementioned semiconductor chip structure 100, and the forming manner of the metal seed layer 40 and the conductive bump 50 is not limited to the above processes and steps.
To sum up, the utility model discloses semiconductor chip structure 100 is through reducing ferromagnetic material layer 53's size reduces its influence to the magnetic field in magnetic circuit district caused, ensures the normal work of product, and, the material cost of surface metal layer 52 also can effectively reduce. Through the above design, the application range of the existing conductive bump 50 with the ferromagnetic material layer 53 is expanded, which is beneficial to the development and design of chip product structures.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.
The above-listed detailed description is only a specific description of a possible embodiment of the present invention, and they are not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention should be included in the scope of the present invention.

Claims (7)

1. A semiconductor chip structure comprises a semiconductor substrate, a circuit layer formed on the semiconductor substrate, and a conductive bump electrically connected with the circuit layer, and is characterized in that: the conductive bump comprises a bump body, a surface metal layer arranged on one side, away from the circuit layer, of the bump body, and a ferromagnetic material layer positioned between the bump body and the surface metal layer, wherein the coverage area of the ferromagnetic material layer is smaller than the top surface of the bump body.
2. The semiconductor chip structure of claim 1, wherein: the semiconductor chip structure further comprises a metal seed layer arranged between the bump body and the circuit layer.
3. The semiconductor chip structure of claim 1, wherein: the semiconductor chip structure further comprises a protective layer, the circuit layer is located between the semiconductor substrate and the protective layer, the protective layer is provided with a connecting window corresponding to the conductive bump, the bump body is provided with a first portion located in the connecting window and a second portion extending from the first portion in a direction away from the semiconductor substrate, and the cross section of the second portion in a direction parallel to the semiconductor substrate is larger than that of the first portion in a direction parallel to the semiconductor substrate.
4. The semiconductor chip structure of claim 1, wherein: the bump body is made of copper or a copper alloy.
5. The semiconductor chip structure of claim 4, wherein: the surface metal layer is a gold layer; the ferromagnetic material layer is provided as a nickel layer.
6. The semiconductor chip structure of claim 1, wherein: the surface metal layer and the ferromagnetic material layer are superposed with each other.
7. The semiconductor chip structure of claim 1, wherein: the conductive bump extends in a direction perpendicular to the semiconductor substrate.
CN201921347793.9U 2019-08-19 2019-08-19 Semiconductor chip structure Active CN210182370U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201921347793.9U CN210182370U (en) 2019-08-19 2019-08-19 Semiconductor chip structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201921347793.9U CN210182370U (en) 2019-08-19 2019-08-19 Semiconductor chip structure

Publications (1)

Publication Number Publication Date
CN210182370U true CN210182370U (en) 2020-03-24

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201921347793.9U Active CN210182370U (en) 2019-08-19 2019-08-19 Semiconductor chip structure

Country Status (1)

Country Link
CN (1) CN210182370U (en)

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GR01 Patent grant
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CP01 Change in the name or title of a patent holder

Address after: 215000 No.166, Fengli street, Suzhou Industrial Park, Jiangsu Province

Patentee after: CHIPMORE TECHNOLOGY Corp.,Ltd.

Patentee after: Xi'an yisiwei Material Technology Co.,Ltd.

Address before: 215000 No.166, Fengli street, Suzhou Industrial Park, Jiangsu Province

Patentee before: CHIPMORE TECHNOLOGY Corp.,Ltd.

Patentee before: Beijing yisiwei Material Technology Co.,Ltd.

Address after: 215000 No.166, Fengli street, Suzhou Industrial Park, Jiangsu Province

Patentee after: CHIPMORE TECHNOLOGY Corp.,Ltd.

Patentee after: Beijing yisiwei Material Technology Co.,Ltd.

Address before: 215000 No.166, Fengli street, Suzhou Industrial Park, Jiangsu Province

Patentee before: CHIPMORE TECHNOLOGY Corp.,Ltd.

Patentee before: Beijing yisiwei Technology Co.,Ltd.

CP01 Change in the name or title of a patent holder
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Effective date of registration: 20210622

Address after: 215000 No.166, Fengli street, Suzhou Industrial Park, Jiangsu Province

Patentee after: CHIPMORE TECHNOLOGY Corp.,Ltd.

Patentee after: Hefei Qizhong Sealing Technology Co.,Ltd.

Address before: 215000 No.166, Fengli street, Suzhou Industrial Park, Jiangsu Province

Patentee before: CHIPMORE TECHNOLOGY Corp.,Ltd.

Patentee before: Xi'an yisiwei Material Technology Co.,Ltd.

TR01 Transfer of patent right
CP01 Change in the name or title of a patent holder

Address after: 215000 No.166, Fengli street, Suzhou Industrial Park, Jiangsu Province

Patentee after: CHIPMORE TECHNOLOGY Corp.,Ltd.

Patentee after: Hefei Qizhong Technology Co.,Ltd.

Address before: 215000 No.166, Fengli street, Suzhou Industrial Park, Jiangsu Province

Patentee before: CHIPMORE TECHNOLOGY Corp.,Ltd.

Patentee before: Hefei Qizhong Sealing Technology Co.,Ltd.

CP01 Change in the name or title of a patent holder