CN210109798U

CN210109798U - DSP and PC communication system

Info

Publication number: CN210109798U
Application number: CN201921200854.9U
Authority: CN
Inventors: 宫鑫; 王飞; 张小凤; 苏禹
Original assignee: Beijing Institute of Technology Zhuhai
Current assignee: Beijing Institute of Technology Zhuhai
Priority date: 2019-07-26
Filing date: 2019-07-26
Publication date: 2020-02-21
Anticipated expiration: 2029-07-26

Abstract

The utility model discloses a communication system of DSP and PC, comprising a PC, a USB controller, a conversion unit and a DSP; the USB controller is a first controller provided with an SPI interface; the conversion unit is a second controller provided with an SPI interface; the DSP is a third controller provided with an HPI interface; the USB controller is connected with the PC through a USB interface; the USB controller is connected with the SPI interface of the conversion unit through the SPI interface; the conversion unit is connected with an HPI (high-performance input/output) interface of the DSP through an IO (input/output) interface; and the SPI interface of the conversion unit is isolated from the SPI interface of the USB controller through a high-speed optocoupler. The utility model discloses make PC can visit DSP's internal resources, improved communication rate through HPI interface and high-speed opto-coupler, and DSP's data can be in real time, not limit length ground to transmit PC and save or show, but wide application in communication system technical field.

Description

DSP and PC communication system

Technical Field

The utility model belongs to the technical field of communication system technique and specifically relates to a communication system of DSP and PC.

Background

Interpretation of terms:

and (4) DSP: digital signal processing, referred to as digital signal processor;

HPI: host port interface, which refers to a host interface;

RAM: ramdom access memory, refers to random access memory

PC: personal computer refers to a personal computer

DMA: direct memory access, refers to direct memory access

MCU: micro controller unit refers to a microcontroller

IO: input output refers to input/output.

After the DSP is developed, real-time monitoring is required to dynamically adjust applications such as DSP software, which often require access to all address spaces of the DSP, including external memory or devices connected to the DSP through address mapping.

The traditional method is to share the RAM with the host, and to realize the RAM by external expansion and trigger, latch and other chips. The method still cannot access resources such as a timer inside the DSP on line except for the need of adding extra design and cost, and therefore the problem is not solved fundamentally. For this reason, TI company adds a host interface HPI to its C5000 and C6000 series products, where the HPI is a fast channel for communicating a host (host refers to a device with a master control capability, not a computer host PC) and a DSP chip, and the host can access all address spaces of the DSP through the HPI interface, including external memories or devices connected through address mapping and the DSP.

However, if only HPI is available, the problem still exists, and the existing communication between the DSP and the PC can only be realized by a serial port, which is slow in communication speed. The HPI can communicate with the application software on the PC to monitor the DSP and adjust its software in real time.

SUMMERY OF THE UTILITY MODEL

In view of this, embodiments of the present invention provide a communication system of a DSP and a PC with fast communication speed and high real-time performance.

The embodiment of the utility model provides a communication system of DSP and PC, including PC, USB controller, converting unit and DSP;

the USB controller is a first controller provided with an SPI interface;

the conversion unit is a second controller provided with an SPI interface;

the DSP is a third controller provided with an HPI interface;

the USB controller is connected with the PC through a USB interface; the USB controller is connected with the SPI interface of the conversion unit through the SPI interface;

the conversion unit is connected with an HPI (high-performance input/output) interface of the DSP through an IO (input/output) interface;

and the SPI interface of the conversion unit is isolated from the SPI interface of the USB controller through a high-speed optical coupler.

Further, the SPI interface of the USB controller includes four pins, which are a data input pin, a data output pin, an enable pin, and a synchronous clock pin, respectively.

Further, the USB controller is composed of peripheral circuits of a MAX3420E chip and a MAX3420E chip.

Further, a capacitor is arranged between the enabling pin of the USB controller and the ground.

Further, the conversion unit comprises a USB controller access module and an HPI read-write module, the USB controller access module is connected with the USB controller, and the HPI read-write module is connected with an HPI interface of the DSP.

Further, the HPI interface of the DSP includes a control register, an address register, and a data register.

Furthermore, the high-speed optical coupler consists of an HCPL-0723 chip and a peripheral circuit of the HCPL-0723 chip.

Further, the conversion unit is composed of a 56F8356 chip and peripheral circuits of the 56F8356 chip.

Above-mentioned the utility model discloses technical scheme in the embodiment has following advantage: the embodiment of the utility model discloses an including PC, USB controller, converting unit and DSP, be connected with USB controller, converting unit and DSP in proper order through PC, indirectly realized being connected between the HPI interface of PC and DSP, compare in the scheme that carries out communication through the serial ports between current PC and DSP, the utility model discloses make PC can visit DSP's internal resource, improved communication rate through HPI interface and high-speed opto-coupler, and DSP's data can be in real time, transmit PC and save or show unlimited length ground.

Drawings

Fig. 1 is a block diagram of the overall structure of a communication system of DSP and PC according to the present invention;

fig. 2 is a schematic circuit diagram of the USB controller of the present invention;

fig. 3 is a pin position diagram of a type B connector of MAX3420E according to the present invention;

fig. 4 is a schematic circuit diagram of the switching unit of the present invention;

fig. 5 is a schematic circuit diagram of the high-speed optocoupler of the present invention.

Detailed Description

Referring to fig. 1, the utility model provides a communication system of DSP and PC, comprising a PC, a USB controller, a conversion unit and a DSP;

the USB controller is a first controller provided with an SPI interface;

the conversion unit is a second controller provided with an SPI interface;

the DSP is a third controller provided with an HPI interface;

Further, as a preferred embodiment, the SPI interface of the USB controller includes four pins, which are a data input pin, a data output pin, an enable pin, and a synchronous clock pin.

Further preferably, the USB controller includes peripheral circuits of a MAX3420E chip and a MAX3420E chip.

Further as a preferred embodiment, a capacitor is arranged between the enable pin of the USB controller and the ground.

Further as a preferred embodiment, the conversion unit includes a USB controller access module and an HPI read/write module, the USB controller access module is connected to the USB controller, and the HPI read/write module is connected to an HPI interface of the DSP.

Further as a preferred embodiment, the HPI interface of the DSP includes a control register, an address register, and a data register.

Further, as a preferred embodiment, the high-speed optical coupler is composed of a HCPL-0723 chip and a peripheral circuit of the HCPL-0723 chip.

Further, as a preferred embodiment, the conversion unit is composed of a 56F8356 chip and a peripheral circuit of the 56F8356 chip.

The following describes in detail the specific implementation principle of the DSP and PC communication system of the present invention:

as shown in the hardware structure of figure 1, the utility model provides a system for realizing DSP and PC high-speed communication, this system comprises USB controller, the high-speed opto-coupler of converting unit and DSP's HPI.

The USB controller is a controller (i.e., a first controller) having an SPI interface to meet the requirement of high-speed communication. The USB controller is connected with the PC through a USB interface to realize communication with a PC application program; and the SPI interface is connected with the SPI interface of the conversion unit through the SPI interface.

The conversion unit is a microcontroller (namely a second controller, referred to as MCU in this embodiment) with an SPI port, and is connected with the SPI port of the USB controller through the SPI port, and the middle is isolated through a high-speed optocoupler. The data line of the MCU is connected with the data line of the HPI port of the DSP, four general IO ports are utilized to send out four control signals of the HPI, and one IO port is used as a handshaking signal of the DSP.

The DSP is a digital signal processor (i.e., a third controller) with an HPI interface, such as the C5000 series and C6000 series by TI corporation. The DSP interfaces with the conversion unit through the HPI.

Table 1 lists the basic signals of HPI:

TABLE 1

Wherein, HD is the data line of HPI, and is connected with the data line of the conversion unit. HCNTL [1:0] plays the role of an address line in communication for selecting the register to be accessed and the access mode.

Referring to table 2:

TABLE 2

Wherein, HCNTL [1:0] is connected with 2 IO port lines of the conversion unit. The bus width of the HPI is half the word length of the DSP, but the HPI register is word length, so accessing the HPI register involves two half-word transfers. The function of HWWIL is to determine whether the data currently on the HPI bus is the previous half word or the next half word, and connect to 1 IO port line of the translation unit. The HAS is an address latch signal, which is suitable for a host in which a data signal and an address signal are multiplexed, and the HAS is set to a high level in the system. The HDS1, HDS2, and HCS collectively complete data latching. Inside the DSP, these three control signals output the true data latch signal STROBE through a combination circuit. In order to reduce the complexity of control, the system adopts the method that the HDS1 is set to be high, the HDS2 is set to be low, and the HCS is used for controlling the internal STROBE of the HPI and connecting the internal STROBE with one IO port line of the conversion unit.

In addition, the functional module of the MCU in this embodiment can be divided into two parts, which are a USB controller access module and an HPI read/write module.

The USB controller access module reads and writes each register in the USB controller through the SPI interface to complete data receiving and sending operations, and specifically, after the PC is executed to send data to the USB controller, the data is received and stored for processing, such as receiving a sampling period address and a sampling result address defined by a user; the function of the MCU to transmit data to the PC is executed. When the data of the HPI does not exist, a fixed character is sent, and the character must be sent to the PC continuously, otherwise, a dead halt condition occurs when a read function is called in the PC application program. In order to distinguish which data is valid on the PC side, when no data can be sent, "FF" is written, and after the PC receives the "FF", the invalid data is deleted. In addition, the module also completes the functions of identifying and responding to the reset of the USB bus, identifying and responding to the USB bus suspension event, and realizing USB enumeration by MCU recovery (awakening suspension state).

And the HPI read-write module realizes the function of accessing the internal resources of the DSP through the access of the MCU to the HPI register. The MCU communication with the HPI is actually an access to the HPI registers. The DSP is responsible for linking the HPI register with the DSP internal unit in a DMA mode, so that the purpose of accessing the DSP internal resource by the host is achieved. The HPI register includes three: HPIC, HPIA, HPID. The HPIC is a control register, accessible by the MCU or DSP, and the register contents are control and status bits for HPI operations. The HPIA is an address register, directly accessed by the MCU, whose contents are the address pointers currently addressing the HPI memory. The HPID is a data register, directly accessed by the MCU.

The invention will be further explained and explained with reference to the schematic circuit diagram:

the circuit schematic of the present system is shown in fig. 3-5.

Specifically, the MAX3420E is selected as a USB controller, the USB side is directly powered by the USB, an isolation power supply is not needed, and an SPI data interface is isolated through a high-speed optical coupler. After the isolation, data conversion is needed, the SPI interface signal is converted into an HPI interface, and the conversion unit selects a 56F8356 chip.

In the embodiment, the MAX3420 with the SPI interface is selected as the USB controller, the MAX3420 supports a full-speed mode (12Mbps full duplex) of USB2.0, and the frequency of an SCLK signal of the SPI interface can reach 26MHZ, so that the requirements of high communication speed and high real-time performance are met, and isolation is convenient. In the system, the frequency of the SCLK signal of the SPI port is set to be 7.5MHZ by the SPI timing analysis and the actual test of MAX3420 and 56F 8356.

As shown in fig. 2, the SPI of the MAX3420E includes four pins, i.e., an I data input pin MOS, a data output pin MISO, an enable pin SS, and a synchronous clock pin SCLK, which are optically coupled to the SPI of the 56F8356, specifically, the MOSI, MISO, SS, and SCLK pins of the MAXE3420E are respectively connected to the MOSI0, MISO0, SS0, and SCLK0 pins of the 56F8356, wherein a 33PF capacitor is required between the SS input pin and the ground to eliminate noise. INT at MAXE3420E is the interrupt request pin, which is an open drain when level mode is used and must be pulled high, to IRQA at 56F 8356. VBCOMP is connected to VBUS, and when a USB peripheral is inserted, MAX3420E will detect whether VCOMP pin is effectively connected to VBUS. A bypass capacitance of 1 muf is required between VBCOMP and ground. The VOUT pin of the power chip MC33269DT _3.3 is connected to the VCC pin and VL pin of MAX3420ED to provide 3.3V supply voltage for MAX 3420E; the VIN of the MC33269DT _3.3 is connected to pin 1 of the USB connector, the GND pin is connected to ground, the VI pin is connected to ground via a capacitor of 0.33 μ F, and the VOUT pin is connected to ground via a capacitor of 10 μ F. MAX803 provides it with a reset signal, which

The pin is connected with a reset pin of MAX3420EThe VCC pin is connected with the VOUT pin of MC33269DT _3.3, and the GND pin is grounded. The X0 pin and the X1 pin of the MAX3420E are respectively connected with two pins of a 12MHZ crystal oscillator, and a 33PF capacitor is connected between the two pins and the ground.

The D + and D-of the MAX3420E of this embodiment are connected to the D + and D-of the USB type B connector through a 33 ohm resistor. With particular attention to the connection of the two, fig. 3 is a pin location of a type B connector.

As shown in fig. 4, the present embodiment selects 56F8356 as the conversion unit, and the main consideration is that the programming is easier to implement. 56F8356 is connected with the interface of MAX3420E through SPI port, and the middle is isolated by high-speed optical coupler. 56F8356 is operating in master mode and MAX3420E is operating in slave mode. 56F8356 of 16The pins D0-D15 of the root data line are connected with the pins HD0-HD15 of the 16 data lines of the HPI; four general IO pins GPIO8-GPIO11 are connected with four control signal pins HCNTL0-1, HHWIL,and then one IO port pin GPIO12 is connected with HPIAs handshake signals, GPIO13 pin is connected with HCS pin of HPI, and these signals are connected to a connector to form a flat cable, which is connected with HPI port of DSP. The clock adopts an internal clock, an XTAL pin and an EXTAL pin are connected with two pins of an 8MHZ crystal oscillator, and the two pins are grounded with a 20PF capacitor. Pin 80 bit power pin is connected to the VOUT pin of MC33269DT _3.3, and is connected to ground with two 10 μ F electrolytic capacitors and a 0.1 μ F chip capacitor. MAX803 provides it with a reset signal, whichReset pin of pin connection 56F8356The VCC pin is connected with the VOUT pin of MC33269DT _3.3, and the GND pin is grounded. The rest unused input pins on the chip are grounded through a 10k omega resistor, and the output pins are suspended.

In the HPI aspect of the DSP, HAS is set to high, HDS1 is set to high, HDS2 is set to low, and the rest of pins related to HPI are connected to a connector to form a socket.

As known from the SPI timing analysis of MAX3420E and 56F8356, this embodiment must use 50M high-speed optocouplers. The HCPL-0723 optocoupler chip adopts the most advanced CMOS IC technology, and a driving circuit is arranged in the HCPL-0723 optocoupler chip, so that the requirement on the current driving capability of an input signal is low, and the current driving capability of the input signal only needs to be more than 10 muA. This allows the 4mA current at 56F8356 SPI to drive it without the need for additional circuitry. Compared with other optocouplers, the logic of the optocoupler is positive logic, namely the input is low and the output is low; the input is high and the output is high, further simplifying the circuit design.

The optocoupler and its peripheral circuits in the system are shown in fig. 5, power supply pins VDD1 and VDD2 are connected to a 5V power supply, two 0.022uF bypass capacitors are connected between the two power supply pins and ground, a VI pin is connected to a signal of MAX3420E, and VO is connected to a signal of 56F 8356. The whole communication system hardware circuit needs to adopt 5 same optical couplers.

Based on the aforesaid the utility model discloses a communication system of DSP and PC, the flow of PC application developments visit DSP in this embodiment is:

firstly, after a hardware circuit is powered on, an application program of a PC communicates with a USB device by calling an API function, and the application program sends a data acquisition command;

secondly, the MCU reads and writes a register in the USB controller through the SPI to acquire a command;

and thirdly, the MCU writes the HPIC firstly, sets HPI control parameters, then writes the HPIA, tells the HPI the DSP internal address to be accessed, and then accesses the DSP internal resources by accessing the HPID.

And fourthly, the MCU feeds back the acquired data to an application program of the PC through the USB controller to finish data acquisition.

To sum up, the utility model has the advantages of it is following:

the utility model discloses a HPI of DSP and the USB communication of PC, the HPI interface is 16 parallel interfaces, can reach very high communication rate, this makes the data that convey a plurality of passageways (8 at least passageways) in a control cycle become possible, and realize in real time (every control cycle gathers once), the data acquisition of length not limited, make the PC can visit all resources of DSP, realize the purpose of PC to the real time monitoring of DSP system, dynamic adjustment.

While the preferred embodiments of the present invention have been described, the present invention is not limited to the above embodiments, and those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and such equivalent modifications or substitutions are intended to be included within the scope of the present invention as defined by the appended claims.

Claims

1. A communication system between a DSP and a PC, characterized by: the system comprises a PC, a USB controller, a conversion unit and a DSP;

the USB controller is a first controller provided with an SPI interface;

the conversion unit is a second controller provided with an SPI interface;

the DSP is a third controller provided with an HPI interface;

2. A DSP and PC communication system according to claim 1, wherein: the SPI interface of the USB controller comprises four pins which are a data input pin, a data output pin, an enabling pin and a synchronous clock pin respectively.

3. A DSP and PC communication system according to claim 2, wherein: the USB controller consists of MAX3420E chip and MAX3420E chip peripheral circuits.

4. A DSP and PC communication system according to claim 3, wherein: and a capacitor is arranged between the enabling pin of the USB controller and the ground.

5. A DSP and PC communication system according to claim 1, wherein: the conversion unit comprises a USB controller access module and an HPI read-write module, the USB controller access module is connected with the USB controller, and the HPI read-write module is connected with an HPI interface of the DSP.

6. A DSP and PC communication system according to claim 1, wherein: the HPI interface of the DSP comprises a control register, an address register and a data register.

7. A DSP and PC communication system according to claim 1, wherein: the high-speed optical coupler consists of an HCPL-0723 chip and a peripheral circuit of the HCPL-0723 chip.

8. A DSP and PC communication system according to claim 1, wherein: the conversion unit is composed of a 56F8356 chip and peripheral circuits of the 56F8356 chip.